1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_hal_qspi.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of QSPI HAL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup HAL_DRIVER HAL Driver
43 * @{
44 */
45
46 /** @defgroup HAL_QSPI QSPI
47 * @brief QSPI HAL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55xx_HAL_QSPI_H__
53 #define __GR55xx_HAL_QSPI_H__
54
55 /* Includes ------------------------------------------------------------------*/
56 #include <stdbool.h>
57 #include "gr55xx_ll_spi.h"
58 #include "gr55xx_hal_def.h"
59
60 #ifdef __cplusplus
61 extern "C" {
62 #endif
63
64 #define MAX 7
65 #define QSPI_CYCLE_MAX 31
66
67 /* Exported types ------------------------------------------------------------*/
68 /** @addtogroup HAL_QSPI_ENUMERATIONS Enumerations
69 * @{
70 */
71
72 /** @defgroup HAL_QSPI_state HAL QSPI state
73 * @{
74 */
75
76 /**
77 * @brief HAL QSPI State Enumerations definition
78 */
79 typedef enum {
80 HAL_QSPI_STATE_RESET = 0x00, /**< Peripheral not initialized */
81 HAL_QSPI_STATE_READY = 0x01, /**< Peripheral initialized and ready for use */
82 HAL_QSPI_STATE_BUSY = 0x02, /**< Peripheral in indirect mode and busy */
83 HAL_QSPI_STATE_BUSY_INDIRECT_TX = 0x12, /**< Peripheral in indirect mode with transmission ongoing */
84 HAL_QSPI_STATE_BUSY_INDIRECT_RX = 0x22, /**< Peripheral in indirect mode with reception ongoing */
85 HAL_QSPI_STATE_ABORT = 0x08, /**< Peripheral with abort request ongoing */
86 HAL_QSPI_STATE_ERROR = 0x04 /**< Peripheral in error */
87 } hal_qspi_state_t;
88
89 /** @} */
90
91 /** @} */
92
93 /** @addtogroup HAL_QSPI_STRUCTURES Structures
94 * @{
95 */
96
97 /** @defgroup QSPI_Configuration QSPI Configuration
98 * @{
99 */
100
101 /**
102 * @brief QSPI init Structure definition
103 */
104 typedef struct _qspi_init_t {
105 uint32_t clock_prescaler; /**< Specifies the prescaler factor for generating clock based on the AHB clock.
106 This parameter can be a number between 0 and 0xFFFF */
107
108 uint32_t clock_mode; /**< Specifies the Clock Mode. It indicates the level that clock takes between commands.
109 This parameter can be a value of @ref QSPI_Clock_Mode */
110
111 uint32_t rx_sample_delay; /**< Specifies the RX sample delay. It is used to delay the sample of the RX input port.
112 This parameter can be a number between 0 and 0x7 */
113 } qspi_init_t;
114 /** @} */
115
116 /** @defgroup QSPI_handle QSPI handle
117 * @{
118 */
119
120 /**
121 * @brief QSPI handle Structure definition
122 */
123 typedef struct _qspi_handle {
124 ssi_regs_t *p_instance; /**< QSPI registers base address */
125
126 qspi_init_t init; /**< QSPI communication parameters */
127
128 uint8_t *p_tx_buffer; /**< Pointer to QSPI Tx transfer Buffer */
129
130 __IO uint32_t tx_xfer_size; /**< QSPI Tx Transfer size */
131
132 __IO uint32_t tx_xfer_count; /**< QSPI Tx Transfer Counter */
133
134 uint8_t *p_rx_buffer; /**< Pointer to QSPI Rx transfer Buffer */
135
136 __IO uint32_t rx_xfer_size; /**< QSPI Rx Transfer size */
137
138 __IO uint32_t rx_xfer_count; /**< QSPI Rx Transfer Counter */
139
140 void (*write_fifo)(struct _qspi_handle *p_qspi); /**< Pointer to QSPI Tx transfer FIFO write function */
141
142 void (*read_fifo)(struct _qspi_handle *p_qspi); /**< Pointer to QSPI Rx transfer FIFO read function */
143
144 dma_handle_t *p_dma; /**< QSPI Rx/Tx DMA Handle parameters */
145
146 __IO hal_lock_t lock; /**< Locking object */
147
148 __IO hal_qspi_state_t state; /**< QSPI communication state */
149
150 __IO uint32_t error_code; /**< QSPI Error code */
151
152 uint32_t timeout; /**< Timeout for the QSPI memory access */
153
154 uint32_t retention[9]; /**< DMA important register information. */
155 } qspi_handle_t;
156 /** @} */
157
158 /** @defgroup QSPI_Command QSPI command
159 * @{
160 */
161
162 /**
163 * @brief QSPI command Structure definition
164 */
165 typedef struct _qspi_command_t {
166 uint32_t instruction; /**< Specifies the Instruction to be sent.
167 This parameter can be a value (8-bit) between 0x00 and 0xFF. */
168
169 uint32_t address; /**< Specifies the Address to be sent.
170 Size from 1 to 4 bytes according AddressSize.
171 This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF. */
172
173 uint32_t instruction_size; /**< Specifies the Instruction Size.
174 This parameter can be a value of @ref QSPI_Instruction_Size. */
175
176 uint32_t address_size; /**< Specifies the Address Size.
177 This parameter can be a value of @ref QSPI_Address_Size. */
178
179 uint32_t dummy_cycles; /**< Specifies the Number of Dummy Cycles.
180 This parameter can be a number between 0 and 31. */
181
182 uint32_t data_size; /**< Specifies the QSPI address width.
183 This parameter can be a value of @ref QSPI_Data_Size. */
184
185 uint32_t instruction_address_mode; /**< Specifies the Instruction and Address Mode.
186 This parameter can be a value of @ref QSPI_Inst_Addr_Mode. */
187
188 uint32_t data_mode; /**< Specifies the Data Mode (used for dummy cycles and data phases).
189 This parameter can be a value of @ref QSPI_Data_Mode. */
190
191 uint32_t length; /**< Specifies the number of data to transfer. (This is the number of bytes).
192 This parameter can be any value between 0 and 0xFFFFFFFF
193 (0 means undefined length until end of memory). */
194 } qspi_command_t;
195 /** @} */
196
197 /** @} */
198
199 /** @addtogroup HAL_QSPI_CALLBACK_STRUCTURES Callback Structures
200 * @{
201 */
202
203 /** @defgroup HAL_QSPI_Callback Callback
204 * @{
205 */
206
207 /**
208 * @brief HAL_QSPI Callback function definition
209 */
210
211 typedef struct _hal_qspi_callback {
212 void (*qspi_msp_init)(qspi_handle_t *p_qspi); /**< QSPI init MSP callback */
213 void (*qspi_msp_deinit)(qspi_handle_t *p_qspi); /**< QSPI de-init MSP callback */
214 void (*qspi_error_callback)(qspi_handle_t *p_qspi); /**< QSPI error callback */
215 void (*qspi_abort_cplt_callback)(qspi_handle_t *p_qspi); /**< QSPI abort complete callback */
216 void (*qspi_fifo_threshold_callback)(qspi_handle_t *p_qspi); /**< QSPI FIFO threshold callback */
217 void (*qspi_rx_cplt_callback)(qspi_handle_t *p_qspi); /**< QSPI rx transfer completed callback */
218 void (*qspi_tx_cplt_callback)(qspi_handle_t *p_qspi); /**< QSPI tx transfer completed callback */
219 } hal_qspi_callback_t;
220
221 /** @} */
222
223 /** @} */
224
225 /**
226 * @defgroup HAL_QSPI_MACRO Defines
227 * @{
228 */
229
230 /* Exported constants --------------------------------------------------------*/
231 /** @defgroup QSPI_Exported_Constants QSPI Exported Constants
232 * @{
233 */
234
235 /** @defgroup QSPI_Error_Code QSPI Error Code
236 * @{
237 */
238 #define HAL_QSPI_ERROR_NONE ((uint32_t)0x00000000) /**< No error */
239 #define HAL_QSPI_ERROR_TIMEOUT ((uint32_t)0x00000001) /**< Timeout error */
240 #define HAL_QSPI_ERROR_TRANSFER ((uint32_t)0x00000002) /**< Transfer error */
241 #define HAL_QSPI_ERROR_DMA ((uint32_t)0x00000004) /**< DMA transfer error */
242 #define HAL_QSPI_ERROR_INVALID_PARAM ((uint32_t)0x00000008) /**< Invalid parameter error */
243 /** @} */
244
245 /** @defgroup QSPI_Clock_Mode QSPI Clock Mode
246 * @{
247 */
248 #define QSPI_CLOCK_MODE_0 (LL_SSI_SCPOL_LOW | LL_SSI_SCPHA_1EDGE) /**< Inactive state of CLK is low;
249 CLK toggles at the start of
250 the first data bit */
251 #define QSPI_CLOCK_MODE_1 (LL_SSI_SCPOL_LOW | LL_SSI_SCPHA_2EDGE) /**< Inactive state of CLK is low;
252 CLK toggles in the middle of
253 the first data bit */
254 #define QSPI_CLOCK_MODE_2 (LL_SSI_SCPOL_HIGH | LL_SSI_SCPHA_1EDGE) /**< Inactive state of CLK is high;
255 CLK toggles at the start of
256 the first data bit */
257 #define QSPI_CLOCK_MODE_3 (LL_SSI_SCPOL_HIGH | LL_SSI_SCPHA_2EDGE) /**< Inactive state of CLK is high;
258 CLK toggles in the middle of
259 the first data bit */
260 /** @} */
261
262 /** @defgroup QSPI_Data_Mode QSPI Data Mode
263 * @{
264 */
265 #define QSPI_DATA_MODE_SPI LL_SSI_FRF_SPI /**< Standard SPI Frame Format */
266 #define QSPI_DATA_MODE_DUALSPI LL_SSI_FRF_DUALSPI /**< Dual SPI Frame Format */
267 #define QSPI_DATA_MODE_QUADSPI LL_SSI_FRF_QUADSPI /**< Quad SPI Frame Format */
268 /** @} */
269
270 /** @defgroup QSPI_Instruction_Size QSPI Instruction Size
271 * @{
272 */
273 #define QSPI_INSTSIZE_00_BITS LL_SSI_INSTSIZE_0BIT /**< 0-bit (No Instruction) */
274 #define QSPI_INSTSIZE_04_BITS LL_SSI_INSTSIZE_4BIT /**< 4-bit Instruction */
275 #define QSPI_INSTSIZE_08_BITS LL_SSI_INSTSIZE_8BIT /**< 8-bit Instruction */
276 #define QSPI_INSTSIZE_16_BITS LL_SSI_INSTSIZE_16BIT /**< 16-bit Instruction */
277 /** @} */
278
279 /** @defgroup QSPI_Address_Size QSPI Address Size
280 * @{
281 */
282 #define QSPI_ADDRSIZE_00_BITS LL_SSI_ADDRSIZE_0BIT /**< 0-bit address */
283 #define QSPI_ADDRSIZE_04_BITS LL_SSI_ADDRSIZE_4BIT /**< 4-bit address */
284 #define QSPI_ADDRSIZE_08_BITS LL_SSI_ADDRSIZE_8BIT /**< 8-bit address */
285 #define QSPI_ADDRSIZE_12_BITS LL_SSI_ADDRSIZE_12BIT /**< 12-bit address */
286 #define QSPI_ADDRSIZE_16_BITS LL_SSI_ADDRSIZE_16BIT /**< 16-bit address */
287 #define QSPI_ADDRSIZE_20_BITS LL_SSI_ADDRSIZE_20BIT /**< 20-bit address */
288 #define QSPI_ADDRSIZE_24_BITS LL_SSI_ADDRSIZE_24BIT /**< 24-bit address */
289 #define QSPI_ADDRSIZE_28_BITS LL_SSI_ADDRSIZE_28BIT /**< 28-bit address */
290 #define QSPI_ADDRSIZE_32_BITS LL_SSI_ADDRSIZE_32BIT /**< 32-bit address */
291 /** @} */
292
293 /** @defgroup QSPI_Data_Size Data Width
294 * @{
295 */
296 #define QSPI_DATASIZE_04_BITS LL_SSI_DATASIZE_4BIT /**< Data length for SPI transfer: 4 bits */
297 #define QSPI_DATASIZE_05_BITS LL_SSI_DATASIZE_5BIT /**< Data length for SPI transfer: 5 bits */
298 #define QSPI_DATASIZE_06_BITS LL_SSI_DATASIZE_6BIT /**< Data length for SPI transfer: 6 bits */
299 #define QSPI_DATASIZE_07_BITS LL_SSI_DATASIZE_7BIT /**< Data length for SPI transfer: 7 bits */
300 #define QSPI_DATASIZE_08_BITS LL_SSI_DATASIZE_8BIT /**< Data length for SPI transfer: 8 bits */
301 #define QSPI_DATASIZE_09_BITS LL_SSI_DATASIZE_9BIT /**< Data length for SPI transfer: 9 bits */
302 #define QSPI_DATASIZE_10_BITS LL_SSI_DATASIZE_10BIT /**< Data length for SPI transfer: 10 bits */
303 #define QSPI_DATASIZE_11_BITS LL_SSI_DATASIZE_11BIT /**< Data length for SPI transfer: 11 bits */
304 #define QSPI_DATASIZE_12_BITS LL_SSI_DATASIZE_12BIT /**< Data length for SPI transfer: 12 bits */
305 #define QSPI_DATASIZE_13_BITS LL_SSI_DATASIZE_13BIT /**< Data length for SPI transfer: 13 bits */
306 #define QSPI_DATASIZE_14_BITS LL_SSI_DATASIZE_14BIT /**< Data length for SPI transfer: 14 bits */
307 #define QSPI_DATASIZE_15_BITS LL_SSI_DATASIZE_15BIT /**< Data length for SPI transfer: 15 bits */
308 #define QSPI_DATASIZE_16_BITS LL_SSI_DATASIZE_16BIT /**< Data length for SPI transfer: 16 bits */
309 #define QSPI_DATASIZE_17_BITS LL_SSI_DATASIZE_17BIT /**< Data length for SPI transfer: 17 bits */
310 #define QSPI_DATASIZE_18_BITS LL_SSI_DATASIZE_18BIT /**< Data length for SPI transfer: 18 bits */
311 #define QSPI_DATASIZE_19_BITS LL_SSI_DATASIZE_19BIT /**< Data length for SPI transfer: 19 bits */
312 #define QSPI_DATASIZE_20_BITS LL_SSI_DATASIZE_20BIT /**< Data length for SPI transfer: 20 bits */
313 #define QSPI_DATASIZE_21_BITS LL_SSI_DATASIZE_21BIT /**< Data length for SPI transfer: 21 bits */
314 #define QSPI_DATASIZE_22_BITS LL_SSI_DATASIZE_22BIT /**< Data length for SPI transfer: 22 bits */
315 #define QSPI_DATASIZE_23_BITS LL_SSI_DATASIZE_23BIT /**< Data length for SPI transfer: 23 bits */
316 #define QSPI_DATASIZE_24_BITS LL_SSI_DATASIZE_24BIT /**< Data length for SPI transfer: 24 bits */
317 #define QSPI_DATASIZE_25_BITS LL_SSI_DATASIZE_25BIT /**< Data length for SPI transfer: 25 bits */
318 #define QSPI_DATASIZE_26_BITS LL_SSI_DATASIZE_26BIT /**< Data length for SPI transfer: 26 bits */
319 #define QSPI_DATASIZE_27_BITS LL_SSI_DATASIZE_27BIT /**< Data length for SPI transfer: 27 bits */
320 #define QSPI_DATASIZE_28_BITS LL_SSI_DATASIZE_28BIT /**< Data length for SPI transfer: 28 bits */
321 #define QSPI_DATASIZE_29_BITS LL_SSI_DATASIZE_29BIT /**< Data length for SPI transfer: 29 bits */
322 #define QSPI_DATASIZE_30_BITS LL_SSI_DATASIZE_30BIT /**< Data length for SPI transfer: 30 bits */
323 #define QSPI_DATASIZE_31_BITS LL_SSI_DATASIZE_31BIT /**< Data length for SPI transfer: 31 bits */
324 #define QSPI_DATASIZE_32_BITS LL_SSI_DATASIZE_32BIT /**< Data length for SPI transfer: 32 bits */
325
326 /** @} */
327
328
329 /** @defgroup QSPI_Inst_Addr_Mode QSPI Instruction and Address Mode
330 * @{
331 */
332 #define QSPI_INST_ADDR_ALL_IN_SPI LL_SSI_INST_ADDR_ALL_IN_SPI /**< Instruction and address are sent in
333 SPI mode */
334 #define QSPI_INST_IN_SPI_ADDR_IN_SPIFRF LL_SSI_INST_IN_SPI_ADDR_IN_SPIFRF /**< Instruction is sent in SPI mode,
335 address is sent in Daul/Quad SPI mode */
336 #define QSPI_INST_ADDR_ALL_IN_SPIFRF LL_SSI_INST_ADDR_ALL_IN_SPIFRF /**< Instruction and address are sent in
337 Daul/Quad SPI mode */
338 /** @} */
339
340 /** @defgroup QSPI_Flags QSPI Flags
341 * @{
342 */
343 #define QSPI_FLAG_DCOL LL_SSI_SR_DCOL /**< Data collision error flag */
344 #define QSPI_FLAG_TXE LL_SSI_SR_TXE /**< Transmission error flag */
345 #define QSPI_FLAG_RFF LL_SSI_SR_RFF /**< Rx FIFO full flag */
346 #define QSPI_FLAG_RFNE LL_SSI_SR_RFNE /**< Rx FIFO not empty flag */
347 #define QSPI_FLAG_TFE LL_SSI_SR_TFE /**< Tx FIFO empty flag */
348 #define QSPI_FLAG_TFNF LL_SSI_SR_TFNF /**< Tx FIFO not full flag */
349 #define QSPI_FLAG_BUSY LL_SSI_SR_BUSY /**< Busy flag */
350 /** @} */
351
352 /** @defgroup QSPI_Interrupts QSPI Interrupts
353 * @{
354 */
355 #define QSPI_IT_MST LL_SSI_IS_MST /**< Multi-Master Contention Interrupt flag */
356 #define QSPI_IT_RXF LL_SSI_IS_RXF /**< Receive FIFO Full Interrupt flag */
357 #define QSPI_IT_RXO LL_SSI_IS_RXO /**< Receive FIFO Overflow Interrupt flag */
358 #define QSPI_IT_RXU LL_SSI_IS_RXU /**< Receive FIFO Underflow Interrupt flag */
359 #define QSPI_IT_TXO LL_SSI_IS_TXO /**< Transmit FIFO Overflow Interrupt flag */
360 #define QSPI_IT_TXE LL_SSI_IS_TXE /**< Transmit FIFO Empty Interrupt flag */
361 /** @} */
362
363 /** @defgroup QSPI_Timeout_definition QSPI Timeout_definition
364 * @{
365 */
366 #define HAL_QSPI_TIMEOUT_DEFAULT_VALUE ((uint32_t)5000) /**< 5s */
367 /** @} */
368
369 /** @} */
370
371 /* Exported macro ------------------------------------------------------------*/
372 /** @defgroup QSPI_Exported_Macros QSPI Exported Macros
373 * @{
374 */
375
376 /** @brief Reset QSPI handle states.
377 * @param __HANDLE__ QSPI handle.
378 * @retval None
379 */
__HAL_QSPI_RESET_HANDLE_STATE(qspi_handle_t * __HANDLE__)380 __STATIC_INLINE void __HAL_QSPI_RESET_HANDLE_STATE(qspi_handle_t *__HANDLE__)
381 {
382 __HANDLE__->state = HAL_QSPI_STATE_RESET;
383 }
384
385 /** @brief Enable the specified QSPI peripheral.
386 * @param __HANDLE__ Specifies the QSPI Handle.
387 * @retval None
388 */
__HAL_QSPI_ENABLE(qspi_handle_t * __HANDLE__)389 __STATIC_INLINE void __HAL_QSPI_ENABLE(qspi_handle_t *__HANDLE__)
390 {
391 SET_BITS(__HANDLE__->p_instance->SSI_EN, SSI_SSIEN_EN);
392 }
393
394 /** @brief Disable the specified QSPI peripheral.
395 * @param __HANDLE__ Specifies the QSPI Handle.
396 * @retval None
397 */
__HAL_QSPI_DISABLE(qspi_handle_t * __HANDLE__)398 __STATIC_INLINE void __HAL_QSPI_DISABLE(qspi_handle_t *__HANDLE__)
399 {
400 CLEAR_BITS(__HANDLE__->p_instance->SSI_EN, SSI_SSIEN_EN);
401 }
402
403 /** @brief Enable the QSPI DMA TX Request.
404 * @param __HANDLE__ Specifies the QSPI Handle.
405 * @retval None
406 */
__HAL_QSPI_ENABLE_DMATX(qspi_handle_t * __HANDLE__)407 __STATIC_INLINE void __HAL_QSPI_ENABLE_DMATX(qspi_handle_t *__HANDLE__)
408 {
409 SET_BITS(__HANDLE__->p_instance->DMAC, SSI_DMAC_TDMAE);
410 }
411
412 /** @brief Enable the QSPI DMA RX Request.
413 * @param __HANDLE__ Specifies the QSPI Handle.
414 * @retval None
415 */
__HAL_QSPI_ENABLE_DMARX(qspi_handle_t * __HANDLE__)416 __STATIC_INLINE void __HAL_QSPI_ENABLE_DMARX(qspi_handle_t *__HANDLE__)
417 {
418 SET_BITS(__HANDLE__->p_instance->DMAC, SSI_DMAC_RDMAE);
419 }
420
421 /** @brief Disable the QSPI DMA TX Request.
422 * @param __HANDLE__ Specifies the QSPI Handle.
423 * @retval None
424 */
__HAL_QSPI_DISABLE_DMATX(qspi_handle_t * __HANDLE__)425 __STATIC_INLINE void __HAL_QSPI_DISABLE_DMATX(qspi_handle_t *__HANDLE__)
426 {
427 CLEAR_BITS(__HANDLE__->p_instance->DMAC, SSI_DMAC_TDMAE);
428 }
429
430 /** @brief Disable the QSPI DMA RX Request.
431 * @param __HANDLE__ Specifies the QSPI Handle.
432 * @retval None
433 */
__HAL_QSPI_DISABLE_DMARX(qspi_handle_t * __HANDLE__)434 __STATIC_INLINE void __HAL_QSPI_DISABLE_DMARX(qspi_handle_t *__HANDLE__)
435 {
436 CLEAR_BITS(__HANDLE__->p_instance->DMAC, SSI_DMAC_RDMAE);
437 }
438
439 /** @brief Enable the specified QSPI interrupts.
440 * @param __HANDLE__ Specifies the QSPI Handle.
441 * @param __INTERRUPT__ Specifies the interrupt source to enable.
442 * This parameter can be one of the following values:
443 * @arg @ref QSPI_IT_MST Multi-Master Contention Interrupt enable
444 * @arg @ref QSPI_IT_RXF Receive FIFO Full Interrupt enable
445 * @arg @ref QSPI_IT_RXO Receive FIFO Overflow Interrupt enable
446 * @arg @ref QSPI_IT_RXU Receive FIFO Underflow Interrupt enable
447 * @arg @ref QSPI_IT_TXO Transmit FIFO Overflow Interrupt enable
448 * @arg @ref QSPI_IT_TXE Transmit FIFO Empty Interrupt enable
449 * @retval None
450 */
__HAL_QSPI_ENABLE_IT(qspi_handle_t * __HANDLE__,uint32_t __INTERRUPT__)451 __STATIC_INLINE void __HAL_QSPI_ENABLE_IT(qspi_handle_t *__HANDLE__, uint32_t __INTERRUPT__)
452 {
453 SET_BITS(__HANDLE__->p_instance->INTMASK, __INTERRUPT__);
454 }
455
456 /** @brief Disable the specified QSPI interrupts.
457 * @param __HANDLE__ Specifies the QSPI handle.
458 * @param __INTERRUPT__ Specifies the interrupt source to disable.
459 * This parameter can be one of the following values:
460 * @arg @ref QSPI_IT_MST Multi-Master Contention Interrupt enable
461 * @arg @ref QSPI_IT_RXF Receive FIFO Full Interrupt enable
462 * @arg @ref QSPI_IT_RXO Receive FIFO Overflow Interrupt enable
463 * @arg @ref QSPI_IT_RXU Receive FIFO Underflow Interrupt enable
464 * @arg @ref QSPI_IT_TXO Transmit FIFO Overflow Interrupt enable
465 * @arg @ref QSPI_IT_TXE Transmit FIFO Empty Interrupt enable
466 * @retval None
467 */
__HAL_QSPI_DISABLE_IT(qspi_handle_t * __HANDLE__,uint32_t __INTERRUPT__)468 __STATIC_INLINE void __HAL_QSPI_DISABLE_IT(qspi_handle_t *__HANDLE__, uint32_t __INTERRUPT__)
469 {
470 CLEAR_BITS(__HANDLE__->p_instance->INTMASK, __INTERRUPT__);
471 }
472
473 /** @brief Check whether the specified QSPI interrupt source is enabled or not.
474 * @param __HANDLE__ Specifies the QSPI Handle.
475 * @param __INTERRUPT__ Specifies the interrupt source to check.
476 * This parameter can be one of the following values:
477 * @arg @ref QSPI_IT_MST Multi-Master Contention Interrupt enable
478 * @arg @ref QSPI_IT_RXF Receive FIFO Full Interrupt enable
479 * @arg @ref QSPI_IT_RXO Receive FIFO Overflow Interrupt enable
480 * @arg @ref QSPI_IT_RXU Receive FIFO Underflow Interrupt enable
481 * @arg @ref QSPI_IT_TXO Transmit FIFO Overflow Interrupt enable
482 * @arg @ref QSPI_IT_TXE Transmit FIFO Empty Interrupt enable
483 * @retval The new state of __IT__ (TRUE or FALSE).
484 */
__HAL_QSPI_GET_IT_SOURCE(qspi_handle_t * __HANDLE__,uint32_t __INTERRUPT__)485 __STATIC_INLINE bool __HAL_QSPI_GET_IT_SOURCE(qspi_handle_t *__HANDLE__, uint32_t __INTERRUPT__)
486 {
487 return (READ_BITS(__HANDLE__->p_instance->INTSTAT, __INTERRUPT__) == __INTERRUPT__);
488 }
489
490 /** @brief Check whether the specified QSPI flag is set or not.
491 * @param __HANDLE__ Specifies the QSPI Handle.
492 * @param __FLAG__ Specifies the flag to check.
493 * This parameter can be one of the following values:
494 * @arg @ref QSPI_FLAG_DCOL Data collision error flag
495 * @arg @ref QSPI_FLAG_TXE Transmission error flag
496 * @arg @ref QSPI_FLAG_RFF Rx FIFO full flag
497 * @arg @ref QSPI_FLAG_RFNE Rx FIFO not empty flag
498 * @arg @ref QSPI_FLAG_TFE Tx FIFO empty flag
499 * @arg @ref QSPI_FLAG_TFNF Tx FIFO not full flag
500 * @arg @ref QSPI_FLAG_BUSY Busy flag
501 * @retval The new state of __FLAG__ (TRUE or FALSE).
502 */
__HAL_QSPI_GET_FLAG(qspi_handle_t * __HANDLE__,uint32_t __FLAG__)503 __STATIC_INLINE bool __HAL_QSPI_GET_FLAG(qspi_handle_t *__HANDLE__, uint32_t __FLAG__)
504 {
505 return ((READ_BITS(__HANDLE__->p_instance->STAT, __FLAG__) != 0) ? SET : RESET);
506 }
507
508 /** @brief Clear the specified QSPI flag.
509 * @param __HANDLE__ Specifies the QSPI Handle.
510 * @param __FLAG__ Specifies the flag to clear.
511 * This parameter can be one of the following values:
512 * @arg @ref QSPI_FLAG_DCOL Data collision error flag
513 * @arg @ref QSPI_FLAG_TXE Transmission error flag
514 * @arg @ref QSPI_FLAG_RFF Rx FIFO full flag
515 * @arg @ref QSPI_FLAG_RFNE Rx FIFO not empty flag
516 * @arg @ref QSPI_FLAG_TFE Tx FIFO empty flag
517 * @arg @ref QSPI_FLAG_TFNF Tx FIFO not full flag
518 * @arg @ref QSPI_FLAG_BUSY Busy flag
519 * @retval None
520 */
__HAL_QSPI_CLEAR_FLAG(qspi_handle_t * __HANDLE__,uint32_t __FLAG__)521 __STATIC_INLINE void __HAL_QSPI_CLEAR_FLAG(qspi_handle_t *__HANDLE__, uint32_t __FLAG__)
522 {
523 READ_BITS(__HANDLE__->p_instance->STAT, __FLAG__);
524 }
525
526 /** @} */
527
528 /* Private macros ------------------------------------------------------------*/
529 /** @defgroup QSPI_Private_Macro QSPI Private Macros
530 * @{
531 */
532
533 /** @brief Check if QSPI Clock Prescaler is valid.
534 * @param __PRESCALER__ QSPI Clock Prescaler.
535 * @retval SET (__PRESCALER__ is valid) or RESET (__PRESCALER__ is invalid)
536 */
IS_QSPI_CLOCK_PRESCALER(uint32_t __PRESCALER__)537 __STATIC_INLINE bool IS_QSPI_CLOCK_PRESCALER(uint32_t __PRESCALER__)
538 {
539 return ((__PRESCALER__) <= 0xFFFF);
540 }
541
542 /** @brief Check if QSPI FIFO Threshold is valid.
543 * @param __THR__ QSPI FIFO Threshold.
544 * @retval SET (__THR__ is valid) or RESET (__THR__ is invalid)
545 */
IS_QSPI_FIFO_THRESHOLD(uint32_t __THR__)546 __STATIC_INLINE bool IS_QSPI_FIFO_THRESHOLD(uint32_t __THR__)
547 {
548 return (((__THR__) >= 0) && ((__THR__) <= MAX));
549 }
550
551 /** @brief Check if QSPI Clock Mode is valid.
552 * @param __CLKMODE__ QSPI Clock Mode.
553 * @retval SET (__CLKMODE__ is valid) or RESET (__CLKMODE__ is invalid)
554 */
IS_QSPI_CLOCK_MODE(uint32_t __CLKMODE__)555 __STATIC_INLINE bool IS_QSPI_CLOCK_MODE(uint32_t __CLKMODE__)
556 {
557 return (((__CLKMODE__) == QSPI_CLOCK_MODE_0) || ((__CLKMODE__) == QSPI_CLOCK_MODE_1) || \
558 ((__CLKMODE__) == QSPI_CLOCK_MODE_2) || ((__CLKMODE__) == QSPI_CLOCK_MODE_3));
559 }
560
561 /** @brief Check if QSPI Instruction Size is valid.
562 * @param __INST_SIZE__ QSPI Instruction Size.
563 * @retval SET (__INST_SIZE__ is valid) or RESET (__INST_SIZE__ is invalid)
564 */
IS_QSPI_INSTRUCTION_SIZE(uint32_t __INST_SIZE__)565 __STATIC_INLINE bool IS_QSPI_INSTRUCTION_SIZE(uint32_t __INST_SIZE__)
566 {
567 return (((__INST_SIZE__) == QSPI_INSTSIZE_00_BITS) || \
568 ((__INST_SIZE__) == QSPI_INSTSIZE_04_BITS) || \
569 ((__INST_SIZE__) == QSPI_INSTSIZE_08_BITS) || \
570 ((__INST_SIZE__) == QSPI_INSTSIZE_16_BITS));
571 }
572
573 /** @brief Check if QSPI Address Size is valid.
574 * @param __ADDR_SIZE__ QSPI Address Size .
575 * @retval SET (__ADDR_SIZE__ is valid) or RESET (__ADDR_SIZE__ is invalid)
576 */
IS_QSPI_ADDRESS_SIZE(uint32_t __ADDR_SIZE__)577 __STATIC_INLINE bool IS_QSPI_ADDRESS_SIZE(uint32_t __ADDR_SIZE__)
578 {
579 return (((__ADDR_SIZE__) == QSPI_ADDRSIZE_00_BITS) || ((__ADDR_SIZE__) == QSPI_ADDRSIZE_04_BITS) || \
580 ((__ADDR_SIZE__) == QSPI_ADDRSIZE_08_BITS) || ((__ADDR_SIZE__) == QSPI_ADDRSIZE_12_BITS) || \
581 ((__ADDR_SIZE__) == QSPI_ADDRSIZE_16_BITS) || ((__ADDR_SIZE__) == QSPI_ADDRSIZE_20_BITS) || \
582 ((__ADDR_SIZE__) == QSPI_ADDRSIZE_24_BITS) || ((__ADDR_SIZE__) == QSPI_ADDRSIZE_28_BITS) || \
583 ((__ADDR_SIZE__) == QSPI_ADDRSIZE_32_BITS));
584 }
585
586 /** @brief Check if QSPI Dummy Cycle is valid.
587 * @param __DCY__ QSPI Dummy Cycle.
588 * @retval SET (__DCY__ is valid) or RESET (__DCY__ is invalid)
589 */
IS_QSPI_DUMMY_CYCLES(uint32_t __DCY__)590 __STATIC_INLINE bool IS_QSPI_DUMMY_CYCLES(uint32_t __DCY__)
591 {
592 return ((__DCY__) <= QSPI_CYCLE_MAX);
593 }
594
595 /** @brief Check if QSPI Instruction and Address Mode is valid.
596 * @param __MODE__ QSPI Instruction and Address Mode.
597 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
598 */
IS_QSPI_INSTADDR_MODE(uint32_t __MODE__)599 __STATIC_INLINE bool IS_QSPI_INSTADDR_MODE(uint32_t __MODE__)
600 {
601 return (((__MODE__) == QSPI_INST_ADDR_ALL_IN_SPI) || \
602 ((__MODE__) == QSPI_INST_IN_SPI_ADDR_IN_SPIFRF) || \
603 ((__MODE__) == QSPI_INST_ADDR_ALL_IN_SPIFRF));
604 }
605
606 /** @brief Check if QSPI Data Mode is valid.
607 * @param __MODE__ QSPI Data Mode.
608 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
609 */
IS_QSPI_DATA_MODE(uint32_t __MODE__)610 __STATIC_INLINE bool IS_QSPI_DATA_MODE(uint32_t __MODE__)
611 {
612 return (((__MODE__) == QSPI_DATA_MODE_SPI) || \
613 ((__MODE__) == QSPI_DATA_MODE_DUALSPI) || \
614 ((__MODE__) == QSPI_DATA_MODE_QUADSPI));
615 }
616
617 /** @} */
618
619 /** @} */
620
621
622 /* Exported functions --------------------------------------------------------*/
623 /** @addtogroup HAL_QSPI_DRIVER_FUNCTIONS Functions
624 * @{
625 */
626
627 /** @defgroup QSPI_Exported_Functions_Group1 Initialization and de-initialization functions
628 * @brief Initialization and de-initialization functions
629 *
630 @verbatim
631 ===============================================================================
632 ##### Initialization and de-initialization functions #####
633 ===============================================================================
634 [..] This subsection provides a set of functions allowing to initialize and
635 de-initialize the QSPIx peripheral.
636
637 (+) User must implement hal_qspi_msp_init() function in which he configures
638 all related peripherals resources (GPIO, DMA, IT and NVIC ).
639
640 (+) Call the function hal_qspi_init() to configure the selected device with
641 the selected configuration:
642 (++) Clock Prescaler
643 (++) Clock Mode
644
645 (+) Call the function hal_qspi_deinit() to restore the default configuration
646 of the selected QSPIx peripheral.
647
648 @endverbatim
649 * @{
650 */
651
652 /**
653 ****************************************************************************************
654 * @brief Initialize the QSPI according to the specified parameters
655 * in the qspi_init_t and initialize the associated handle.
656 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
657 * @retval ::HAL_OK: Operation is OK.
658 * @retval ::HAL_ERROR: Parameter error or operation not supported.
659 * @retval ::HAL_BUSY: Driver is busy.
660 * @retval ::HAL_TIMEOUT: Timeout occurred.
661 ****************************************************************************************
662 */
663 hal_status_t hal_qspi_init(qspi_handle_t *p_qspi);
664
665 /**
666 ****************************************************************************************
667 * @brief De-initialize the QSPI peripheral.
668 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
669 * @retval ::HAL_OK: Operation is OK.
670 * @retval ::HAL_ERROR: Parameter error or operation not supported.
671 * @retval ::HAL_BUSY: Driver is busy.
672 * @retval ::HAL_TIMEOUT: Timeout occurred.
673 ****************************************************************************************
674 */
675 hal_status_t hal_qspi_deinit(qspi_handle_t *p_qspi);
676
677 /**
678 ****************************************************************************************
679 * @brief Initialize the QSPI MSP.
680 * @note This function should not be modified. When the callback is needed,
681 * the hal_qspi_msp_deinit can be implemented in the user file.
682 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
683 ****************************************************************************************
684 */
685 void hal_qspi_msp_init(qspi_handle_t *p_qspi);
686
687 /**
688 ****************************************************************************************
689 * @brief De-initialize the QSPI MSP.
690 * @note This function should not be modified. When the callback is needed,
691 * the hal_qspi_msp_deinit can be implemented in the user file.
692 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
693 ****************************************************************************************
694 */
695 void hal_qspi_msp_deinit(qspi_handle_t *p_qspi);
696
697 /** @} */
698
699 /** @defgroup QSPI_Exported_Functions_Group2 IO operation functions
700 * @brief Data transfers functions
701 *
702 @verbatim
703 ==============================================================================
704 ##### IO operation functions #####
705 ===============================================================================
706 [..]
707 This subsection provides a set of functions allowing to manage the QSPI
708 data transfers.
709
710 [..] The QSPI supports master and slave mode:
711
712 (#) There are two modes of transfer:
713 (++) Blocking mode: The communication is performed in polling mode.
714 The HAL status of all data processing is returned by the same function
715 after finishing transfer.
716 (++) No-Blocking mode: The communication is performed using Interrupts.
717 or DMA, These APIs return the HAL status.
718 The end of the data processing will be indicated through the
719 dedicated QSPI IRQ when using Interrupt mode or the DMA IRQ when
720 using DMA mode.
721 The hal_qspi_tx_cplt_callback(), hal_qspi_rx_cplt_callback() and hal_qspi_txrx_cplt_callback()
722 user callbacks will be executed respectively at the end of the transmit or Receive process.
723 The hal_qspi_error_callback() user callback will be executed when a communication error is detected
724
725 (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
726 exist for 1 Line (simplex) and 2 Lines (full duplex) modes.
727
728 @endverbatim
729 * @{
730 */
731
732 /**
733 ****************************************************************************************
734 * @brief Transmit an amount of data with the specified instruction and address in blocking mode.
735 * @note This function is used only in Indirect Write Mode. Dummy cycles in command will be ignored.
736 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
737 * @param[in] p_cmd: Pointer to a qspi_command_t structure that contains the instruction and address for data transfer.
738 * @param[in] p_data: Pointer to data buffer
739 * @param[in] timeout: Timeout duration
740 * @retval ::HAL_OK: Operation is OK.
741 * @retval ::HAL_ERROR: Parameter error or operation not supported.
742 * @retval ::HAL_BUSY: Driver is busy.
743 * @retval ::HAL_TIMEOUT: Timeout occurred.
744 ****************************************************************************************
745 */
746 hal_status_t hal_qspi_command_transmit(qspi_handle_t *p_qspi, qspi_command_t *p_cmd, uint8_t *p_data, uint32_t timeout);
747
748 /**
749 ****************************************************************************************
750 * @brief Receive an amount of data with the specified instruction, address and dummy cycles in blocking mode.
751 * @note This function is used only in Indirect Read Mode.
752 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
753 * @param[in] p_cmd: Pointer to a qspi_command_t structure that contains the instruction and address for data transfer.
754 * @param[out] p_data: Pointer to data buffer
755 * @param[in] timeout: Timeout duration
756 * @retval ::HAL_OK: Operation is OK.
757 * @retval ::HAL_ERROR: Parameter error or operation not supported.
758 * @retval ::HAL_BUSY: Driver is busy.
759 * @retval ::HAL_TIMEOUT: Timeout occurred.
760 ****************************************************************************************
761 */
762 hal_status_t hal_qspi_command_receive(qspi_handle_t *p_qspi, qspi_command_t *p_cmd, uint8_t *p_data, uint32_t timeout);
763
764 /**
765 ****************************************************************************************
766 * @brief Transmit only instruction in blocking mode.
767 * @note This function is used only in Indirect Write Mode.
768 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
769 * @param[in] p_cmd: Pointer to a qspi_command_t structure that contains the instruction and address for data transfer.
770 * @param[in] timeout: Timeout duration
771 * @retval ::HAL_OK: Operation is OK.
772 * @retval ::HAL_ERROR: Parameter error or operation not supported.
773 * @retval ::HAL_BUSY: Driver is busy.
774 * @retval ::HAL_TIMEOUT: Timeout occurred.
775 ****************************************************************************************
776 */
777 hal_status_t hal_qspi_command(qspi_handle_t *p_qspi, qspi_command_t *p_cmd, uint32_t timeout);
778
779 /**
780 ****************************************************************************************
781 * @brief Transmit an amount of data in blocking mode with standard SPI.
782 * @note This function is used only in Indirect Write Mode.
783 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
784 * @param[in] p_data: Pointer to data buffer
785 * @param[in] length: Amount of data to be sent in bytes
786 * @param[in] timeout: Timeout duration
787 * @retval ::HAL_OK: Operation is OK.
788 * @retval ::HAL_ERROR: Parameter error or operation not supported.
789 * @retval ::HAL_BUSY: Driver is busy.
790 * @retval ::HAL_TIMEOUT: Timeout occurred.
791 ****************************************************************************************
792 */
793 hal_status_t hal_qspi_transmit(qspi_handle_t *p_qspi, uint8_t *p_data, uint32_t length, uint32_t timeout);
794
795 /**
796 ****************************************************************************************
797 * @brief Receive an amount of data in blocking mode with standard SPI.
798 * @note This function is used only in Indirect Read Mode.
799 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
800 * @param[out] p_data: Pointer to data buffer
801 * @param[in] length: Amount of data to be received in bytes
802 * @param[in] timeout: Timeout duration
803 * @retval ::HAL_OK: Operation is OK.
804 * @retval ::HAL_ERROR: Parameter error or operation not supported.
805 * @retval ::HAL_BUSY: Driver is busy.
806 * @retval ::HAL_TIMEOUT: Timeout occurred.
807 ****************************************************************************************
808 */
809 hal_status_t hal_qspi_receive(qspi_handle_t *p_qspi, uint8_t *p_data, uint32_t length, uint32_t timeout);
810
811 /**
812 ****************************************************************************************
813 * @brief Transmit an amount of data with the specified instruction and address in non-blocking mode with Interrupt.
814 * @note This function is used only in Indirect Write Mode. Dummy cycles in command will be ignored.
815 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
816 * @param[in] p_cmd: Pointer to a qspi_command_t structure that contains the instruction and address for data transfer.
817 * @param[in] p_data: Pointer to data buffer
818 * @retval ::HAL_OK: Operation is OK.
819 * @retval ::HAL_ERROR: Parameter error or operation not supported.
820 * @retval ::HAL_BUSY: Driver is busy.
821 * @retval ::HAL_TIMEOUT: Timeout occurred.
822 ****************************************************************************************
823 */
824 hal_status_t hal_qspi_command_transmit_it(qspi_handle_t *p_qspi, qspi_command_t *p_cmd, uint8_t *p_data);
825
826 /**
827 ****************************************************************************************
828 * @brief Receive an amount of data with the specified instruction, address and dummy cycles
829 * in non-blocking mode with Interrupt.
830 * @note This function is used only in Indirect Read Mode.
831 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
832 * @param[in] p_cmd: Pointer to a qspi_command_t structure that contains the instruction and address for data transfer.
833 * @param[out] p_data: Pointer to data buffer
834 * @retval ::HAL_OK: Operation is OK.
835 * @retval ::HAL_ERROR: Parameter error or operation not supported.
836 * @retval ::HAL_BUSY: Driver is busy.
837 * @retval ::HAL_TIMEOUT: Timeout occurred.
838 ****************************************************************************************
839 */
840 hal_status_t hal_qspi_command_receive_it(qspi_handle_t *p_qspi, qspi_command_t *p_cmd, uint8_t *p_data);
841
842 /**
843 ****************************************************************************************
844 * @brief Transmit instruction in non-blocking mode with Interrupt.
845 * @note This function is used only in Indirect Write Mode.
846 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
847 * @param[in] p_cmd: Pointer to a qspi_command_t structure that contains the instruction and address for data transfer.
848 * @retval ::HAL_OK: Operation is OK.
849 * @retval ::HAL_ERROR: Parameter error or operation not supported.
850 * @retval ::HAL_BUSY: Driver is busy.
851 * @retval ::HAL_TIMEOUT: Timeout occurred.
852 ****************************************************************************************
853 */
854 hal_status_t hal_qspi_command_it(qspi_handle_t *p_qspi, qspi_command_t *p_cmd);
855
856 /**
857 ****************************************************************************************
858 * @brief Transmit an amount of data in non-blocking mode at standard SPI with Interrupt.
859 * @note This function is used only in Indirect Write Mode.
860 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
861 * @param[in] p_data: Pointer to data buffer
862 * @param[in] length: Amount of data to be sent in bytes
863 * @retval ::HAL_OK: Operation is OK.
864 * @retval ::HAL_ERROR: Parameter error or operation not supported.
865 * @retval ::HAL_BUSY: Driver is busy.
866 * @retval ::HAL_TIMEOUT: Timeout occurred.
867 ****************************************************************************************
868 */
869 hal_status_t hal_qspi_transmit_it(qspi_handle_t *p_qspi, uint8_t *p_data, uint32_t length);
870
871 /**
872 ****************************************************************************************
873 * @brief Receive an amount of data in non-blocking mode at standard SPI with Interrupt.
874 * @note This function is used only in Indirect Read Mode.
875 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
876 * @param[out] p_data: Pointer to data buffer
877 * @param[in] length: Amount of data to be received in bytes
878 * @retval ::HAL_OK: Operation is OK.
879 * @retval ::HAL_ERROR: Parameter error or operation not supported.
880 * @retval ::HAL_BUSY: Driver is busy.
881 * @retval ::HAL_TIMEOUT: Timeout occurred.
882 ****************************************************************************************
883 */
884 hal_status_t hal_qspi_receive_it(qspi_handle_t *p_qspi, uint8_t *p_data, uint32_t length);
885
886 /**
887 ****************************************************************************************
888 * @brief Transmit an amount of data with the specified instruction and address in non-blocking mode with DMA.
889 * @note This function is used only in Indirect Write Mode. Dummy cycles in command will be ignored.
890 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified.
891 * @param[in] p_cmd: Pointer to a qspi_command_t structure that contains the instruction and address for data transfer.
892 * @param[in] p_data: Pointer to data buffer
893 * @retval ::HAL_OK: Operation is OK.
894 * @retval ::HAL_ERROR: Parameter error or operation not supported.
895 * @retval ::HAL_BUSY: Driver is busy.
896 * @retval ::HAL_TIMEOUT: Timeout occurred.
897 ****************************************************************************************
898 */
899 hal_status_t hal_qspi_command_transmit_dma(qspi_handle_t *p_qspi, qspi_command_t *p_cmd, uint8_t *p_data);
900
901 /**
902 ****************************************************************************************
903 * @brief Receive an amount of data with the specified instruction, address and dummy cycles
904 * in non-blocking mode with DMA.
905 * @note This function is used only in Indirect Read Mode.
906 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified.
907 * @param[in] p_cmd: Pointer to a qspi_command_t structure that contains the instruction and address for data transfer.
908 * @param[out] p_data: Pointer to data buffer
909 * @retval ::HAL_OK: Operation is OK.
910 * @retval ::HAL_ERROR: Parameter error or operation not supported.
911 * @retval ::HAL_BUSY: Driver is busy.
912 * @retval ::HAL_TIMEOUT: Timeout occurred.
913 ****************************************************************************************
914 */
915 hal_status_t hal_qspi_command_receive_dma(qspi_handle_t *p_qspi, qspi_command_t *p_cmd, uint8_t *p_data);
916
917 /**
918 ****************************************************************************************
919 * @brief Transmit instruction in non-blocking mode with DMA.
920 * @note This function is used only in Indirect Write Mode.
921 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
922 * @param[in] p_cmd: Pointer to a qspi_command_t structure that contains the instruction and address for data transfer.
923 * @retval ::HAL_OK: Operation is OK.
924 * @retval ::HAL_ERROR: Parameter error or operation not supported.
925 * @retval ::HAL_BUSY: Driver is busy.
926 * @retval ::HAL_TIMEOUT: Timeout occurred.
927 ****************************************************************************************
928 */
929 hal_status_t hal_qspi_command_dma(qspi_handle_t *p_qspi, qspi_command_t *p_cmd);
930
931 /**
932 ****************************************************************************************
933 * @brief Transmit an amount of data in non-blocking mode at standard SPI with DMA.
934 * @note This function is used only in Indirect Write Mode.
935 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
936 * @param[in] p_data: Pointer to data buffer
937 * @param[in] length: Amount of data to be sent in bytes, ranging between 0 and 4095.
938 * @retval ::HAL_OK: Operation is OK.
939 * @retval ::HAL_ERROR: Parameter error or operation not supported.
940 * @retval ::HAL_BUSY: Driver is busy.
941 * @retval ::HAL_TIMEOUT: Timeout occurred.
942 ****************************************************************************************
943 */
944 hal_status_t hal_qspi_transmit_dma(qspi_handle_t *p_qspi, uint8_t *p_data, uint32_t length);
945
946 /**
947 ****************************************************************************************
948 * @brief Receive an amount of data in non-blocking mode at standard SPI with DMA.
949 * @note This function is used only in Indirect Read Mode.
950 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
951 * @param[out] p_data: Pointer to data buffer
952 * @param[in] length: Amount of data to be received in bytes
953 * @retval ::HAL_OK: Operation is OK.
954 * @retval ::HAL_ERROR: Parameter error or operation not supported.
955 * @retval ::HAL_BUSY: Driver is busy.
956 * @retval ::HAL_TIMEOUT: Timeout occurred.
957 ****************************************************************************************
958 */
959 hal_status_t hal_qspi_receive_dma(qspi_handle_t *p_qspi, uint8_t *p_data, uint32_t length);
960
961 /**
962 ****************************************************************************************
963 * @brief Abort the current transmission.
964 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
965 * @retval ::HAL_OK: Operation is OK.
966 * @retval ::HAL_ERROR: Parameter error or operation not supported.
967 * @retval ::HAL_BUSY: Driver is busy.
968 * @retval ::HAL_TIMEOUT: Timeout occurred.
969 ****************************************************************************************
970 */
971 hal_status_t hal_qspi_abort(qspi_handle_t *p_qspi);
972
973 /**
974 ****************************************************************************************
975 * @brief Abort the current transmission (non-blocking function)
976 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
977 * @retval ::HAL_OK: Operation is OK.
978 * @retval ::HAL_ERROR: Parameter error or operation not supported.
979 * @retval ::HAL_BUSY: Driver is busy.
980 * @retval ::HAL_TIMEOUT: Timeout occurred.
981 ****************************************************************************************
982 */
983 hal_status_t hal_qspi_abort_it(qspi_handle_t *p_qspi);
984
985 /** @} */
986
987 /** @addtogroup QSPI_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
988 * @brief IRQ Handler and Callbacks functions
989 * @{
990 */
991
992 /**
993 ****************************************************************************************
994 * @brief Handle QSPI interrupt request.
995 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
996 ****************************************************************************************
997 */
998 void hal_qspi_irq_handler(qspi_handle_t *p_qspi);
999
1000 /**
1001 ****************************************************************************************
1002 * @brief Tx Transfer completed callback.
1003 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
1004 ****************************************************************************************
1005 */
1006 void hal_qspi_tx_cplt_callback(qspi_handle_t *p_qspi);
1007
1008 /**
1009 ****************************************************************************************
1010 * @brief Rx Transfer completed callback.
1011 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
1012 ****************************************************************************************
1013 */
1014 void hal_qspi_rx_cplt_callback(qspi_handle_t *p_qspi);
1015
1016 /**
1017 ****************************************************************************************
1018 * @brief QSPI error callback.
1019 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
1020 ****************************************************************************************
1021 */
1022 void hal_qspi_error_callback(qspi_handle_t *p_qspi);
1023
1024 /**
1025 ****************************************************************************************
1026 * @brief QSPI Abort Complete callback.
1027 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
1028 ****************************************************************************************
1029 */
1030 void hal_qspi_abort_cplt_callback(qspi_handle_t *p_qspi);
1031
1032 /**
1033 ****************************************************************************************
1034 * @brief FIFO Threshold callback.
1035 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
1036 ****************************************************************************************
1037 */
1038 void hal_qspi_fifo_threshold_callback(qspi_handle_t *p_qspi);
1039
1040 /** @} */
1041
1042 /** @defgroup QSPI_Exported_Functions_Group3 Peripheral State and Errors functions
1043 * @brief QSPI control functions
1044 *
1045 @verbatim
1046 ===============================================================================
1047 ##### Peripheral State and Errors functions #####
1048 ===============================================================================
1049 [..]
1050 This subsection provides a set of functions allowing to control the QSPI.
1051 (+) hal_qspi_get_state() API can be helpful to check in run-time the state of the QSPI peripheral.
1052 (+) hal_qspi_get_error() check in run-time Errors occurring during communication.
1053 (+) hal_qspi_set_timeout() set the timeout during internal process.
1054 (+) hal_qspi_set_tx_fifo_threshold() set the TX FIFO Threshold.
1055 (+) hal_qspi_set_rx_fifo_threshold() set the RX FIFO Threshold.
1056 (+) hal_qspi_get_tx_fifo_threshold() get the TX FIFO Threshold.
1057 (+) hal_qspi_get_rx_fifo_threshold() get the RX FIFO Threshold.
1058 @endverbatim
1059 * @{
1060 */
1061
1062 /**
1063 ****************************************************************************************
1064 * @brief Return the QSPI handle state.
1065 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
1066 * @retval ::HAL_QSPI_STATE_RESET: Peripheral not initialized.
1067 * @retval ::HAL_QSPI_STATE_READY: Peripheral initialized and ready for use.
1068 * @retval ::HAL_QSPI_STATE_BUSY: Peripheral in indirect mode and busy.
1069 * @retval ::HAL_QSPI_STATE_BUSY_INDIRECT_TX: Peripheral in indirect mode with transmission ongoing.
1070 * @retval ::HAL_QSPI_STATE_BUSY_INDIRECT_RX: Peripheral in indirect mode with reception ongoing.
1071 * @retval ::HAL_QSPI_STATE_ABORT: Peripheral with abort request ongoing.
1072 * @retval ::HAL_QSPI_STATE_ERROR: Peripheral in error.
1073 ****************************************************************************************
1074 */
1075 hal_qspi_state_t hal_qspi_get_state(qspi_handle_t *p_qspi);
1076
1077 /**
1078 ****************************************************************************************
1079 * @brief Return the QSPI error code.
1080 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
1081 * @return QSPI error code in bitmap format
1082 ****************************************************************************************
1083 */
1084 uint32_t hal_qspi_get_error(qspi_handle_t *p_qspi);
1085
1086 /**
1087 ****************************************************************************************
1088 * @brief Set the QSPI internal process timeout value.
1089 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
1090 * @param[in] timeout: Internal process timeout value.
1091 * @retval ::HAL_OK: Operation is OK.
1092 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1093 * @retval ::HAL_BUSY: Driver is busy.
1094 * @retval ::HAL_TIMEOUT: Timeout occurred.
1095 ****************************************************************************************
1096 */
1097 void hal_qspi_set_timeout(qspi_handle_t *p_qspi, uint32_t timeout);
1098
1099 /**
1100 ****************************************************************************************
1101 * @brief Set the TX FIFO threshold.
1102 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
1103 * @param[in] threshold: TX FIFO threshold value ranging between 0x0U and 0x7U.
1104 * @retval ::HAL_OK: Operation is OK.
1105 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1106 * @retval ::HAL_BUSY: Driver is busy.
1107 * @retval ::HAL_TIMEOUT: Timeout occurred.
1108 ****************************************************************************************
1109 */
1110 hal_status_t hal_qspi_set_tx_fifo_threshold(qspi_handle_t *p_qspi, uint32_t threshold);
1111
1112 /**
1113 ****************************************************************************************
1114 * @brief Set the RX FIFO threshold.
1115 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
1116 * @param[in] threshold: RX FIFO threshold value ranging between 0x0U and 0x7U.
1117 * @retval ::HAL_OK: Operation is OK.
1118 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1119 * @retval ::HAL_BUSY: Driver is busy.
1120 * @retval ::HAL_TIMEOUT: Timeout occurred.
1121 ****************************************************************************************
1122 */
1123 hal_status_t hal_qspi_set_rx_fifo_threshold(qspi_handle_t *p_qspi, uint32_t threshold);
1124
1125 /**
1126 ****************************************************************************************
1127 * @brief Get the TX FIFO threshold.
1128 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
1129 * @return TX FIFO threshold
1130 ****************************************************************************************
1131 */
1132 uint32_t hal_qspi_get_tx_fifo_threshold(qspi_handle_t *p_qspi);
1133
1134 /**
1135 ****************************************************************************************
1136 * @brief Get the RX FIFO threshold.
1137 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration information for the specified QSPI.
1138 * @return RX FIFO threshold
1139 ****************************************************************************************
1140 */
1141 uint32_t hal_qspi_get_rx_fifo_threshold(qspi_handle_t *p_qspi);
1142
1143 /**
1144 ****************************************************************************************
1145 * @brief Suspend some registers related to QSPI configuration before sleep.
1146 * @param[in] p_qspi: Pointer to a QSPIhandle which contains the configuration
1147 * information for the specified QSPI module.
1148 * @retval ::HAL_OK: Operation is OK.
1149 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1150 * @retval ::HAL_BUSY: Driver is busy.
1151 * @retval ::HAL_TIMEOUT: Timeout occurred.
1152 ****************************************************************************************
1153 */
1154 hal_status_t hal_qspi_suspend_reg(qspi_handle_t *p_qspi);
1155
1156 /**
1157 ****************************************************************************************
1158 * @brief Restore some registers related to QSPI configuration after sleep.
1159 * This function must be used in conjunction with the hal_qspi_suspend_reg().
1160 * @param[in] p_qspi: Pointer to a QSPI handle which contains the configuration
1161 * information for the specified QSPI module.
1162 * @retval ::HAL_OK: Operation is OK.
1163 * @retval ::HAL_ERROR: Parameter error or operation not supported.
1164 * @retval ::HAL_BUSY: Driver is busy.
1165 * @retval ::HAL_TIMEOUT: Timeout occurred.
1166 ****************************************************************************************
1167 */
1168 hal_status_t hal_qspi_resume_reg(qspi_handle_t *p_qspi);
1169
1170 void hal_qspi_config_dma_qwrite_32b_patch(qspi_handle_t *p_qspi, bool enable_patch, uint32_t endian_mode);
1171 /** @} */
1172
1173 /** @} */
1174
1175 #ifdef __cplusplus
1176 }
1177 #endif
1178
1179 #endif /* __GR55xx_HAL_QSPI_H__ */
1180
1181 /** @} */
1182
1183 /** @} */
1184
1185 /** @} */
1186