1 /* 2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation; either version 2 of the License, or (at your 7 * option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program. If not, see <http://www.gnu.org/licenses/>. 16 * 17 */ 18 19 #ifndef __HI_COMMON_VO_H__ 20 #define __HI_COMMON_VO_H__ 21 22 #include "hi_type.h" 23 #include "hi_errno.h" 24 #include "hi_common_video.h" 25 26 #ifdef __cplusplus 27 #if __cplusplus 28 extern "C" { 29 #endif 30 #endif /* end of #ifdef __cplusplus */ 31 32 /* Vo define error code */ 33 #define HI_ERR_VO_INVALID_DEV_ID HI_DEFINE_ERR(HI_ID_VO, HI_ERR_LEVEL_ERROR, HI_ERR_INVALID_DEV_ID) 34 #define HI_ERR_VO_INVALID_CHN_ID HI_DEFINE_ERR(HI_ID_VO, HI_ERR_LEVEL_ERROR, HI_ERR_INVALID_CHN_ID) 35 #define HI_ERR_VO_INVALID_LAYER_ID HI_DEFINE_ERR(HI_ID_VO, HI_ERR_LEVEL_ERROR, HI_ERR_INVALID_LAYER_ID) 36 #define HI_ERR_VO_ILLEGAL_PARAM HI_DEFINE_ERR(HI_ID_VO, HI_ERR_LEVEL_ERROR, HI_ERR_ILLEGAL_PARAM) 37 #define HI_ERR_VO_NULL_PTR HI_DEFINE_ERR(HI_ID_VO, HI_ERR_LEVEL_ERROR, HI_ERR_NULL_PTR) 38 #define HI_ERR_VO_NOT_CFG HI_DEFINE_ERR(HI_ID_VO, HI_ERR_LEVEL_ERROR, HI_ERR_NOT_CFG) 39 #define HI_ERR_VO_NOT_SUPPORT HI_DEFINE_ERR(HI_ID_VO, HI_ERR_LEVEL_ERROR, HI_ERR_NOT_SUPPORT) 40 #define HI_ERR_VO_NOT_PERM HI_DEFINE_ERR(HI_ID_VO, HI_ERR_LEVEL_ERROR, HI_ERR_NOT_PERM) 41 #define HI_ERR_VO_NOT_ENABLE HI_DEFINE_ERR(HI_ID_VO, HI_ERR_LEVEL_ERROR, HI_ERR_NOT_ENABLE) 42 #define HI_ERR_VO_NOT_DISABLE HI_DEFINE_ERR(HI_ID_VO, HI_ERR_LEVEL_ERROR, HI_ERR_NOT_DISABLE) 43 #define HI_ERR_VO_NO_MEM HI_DEFINE_ERR(HI_ID_VO, HI_ERR_LEVEL_ERROR, HI_ERR_NO_MEM) 44 #define HI_ERR_VO_NOT_READY HI_DEFINE_ERR(HI_ID_VO, HI_ERR_LEVEL_ERROR, HI_ERR_NOT_READY) 45 #define HI_ERR_VO_TIMEOUT HI_DEFINE_ERR(HI_ID_VO, HI_ERR_LEVEL_ERROR, HI_ERR_TIMEOUT) 46 #define HI_ERR_VO_BUSY HI_DEFINE_ERR(HI_ID_VO, HI_ERR_LEVEL_ERROR, HI_ERR_BUSY) 47 #define HI_ERR_VO_NOT_BINDED HI_DEFINE_ERR(HI_ID_VO, HI_ERR_LEVEL_ERROR, HI_ERR_NOT_BINDED) 48 #define HI_ERR_VO_BINDED HI_DEFINE_ERR(HI_ID_VO, HI_ERR_LEVEL_ERROR, HI_ERR_BINDED) 49 50 /* VO video output interface type */ 51 #define HI_VO_INTF_CVBS (0x01L << 0) 52 #define HI_VO_INTF_VGA (0x01L << 1) 53 #define HI_VO_INTF_BT656 (0x01L << 2) 54 #define HI_VO_INTF_BT1120 (0x01L << 3) 55 #define HI_VO_INTF_HDMI (0x01L << 4) 56 #define HI_VO_INTF_RGB_6BIT (0x01L << 5) 57 #define HI_VO_INTF_RGB_8BIT (0x01L << 6) 58 #define HI_VO_INTF_RGB_16BIT (0x01L << 7) 59 #define HI_VO_INTF_RGB_18BIT (0x01L << 8) 60 #define HI_VO_INTF_RGB_24BIT (0x01L << 9) 61 #define HI_VO_INTF_MIPI (0x01L << 10) 62 #define HI_VO_INTF_MIPI_SLAVE (0x01L << 11) 63 64 typedef hi_u32 hi_vo_intf_type; 65 66 typedef enum { 67 HI_VO_OUT_PAL = 0, /* PAL standard */ 68 HI_VO_OUT_NTSC = 1, /* NTSC standard */ 69 HI_VO_OUT_960H_PAL = 2, /* ITU-R BT.1302 960 x 576 at 50 Hz (interlaced) */ 70 HI_VO_OUT_960H_NTSC = 3, /* ITU-R BT.1302 960 x 480 at 60 Hz (interlaced) */ 71 72 HI_VO_OUT_640x480_60 = 4, /* VESA 640 x 480 at 60 Hz (non-interlaced) CVT */ 73 HI_VO_OUT_480P60 = 5, /* 720 x 480 at 60 Hz. */ 74 HI_VO_OUT_576P50 = 6, /* 720 x 576 at 50 Hz. */ 75 HI_VO_OUT_800x600_60 = 7, /* VESA 800 x 600 at 60 Hz (non-interlaced) */ 76 HI_VO_OUT_1024x768_60 = 8, /* VESA 1024 x 768 at 60 Hz (non-interlaced) */ 77 HI_VO_OUT_720P50 = 9, /* 1280 x 720 at 50 Hz. */ 78 HI_VO_OUT_720P60 = 10, /* 1280 x 720 at 60 Hz. */ 79 HI_VO_OUT_1280x800_60 = 11, /* 1280*800@60Hz VGA@60Hz */ 80 HI_VO_OUT_1280x1024_60 = 12, /* VESA 1280 x 1024 at 60 Hz (non-interlaced) */ 81 HI_VO_OUT_1366x768_60 = 13, /* VESA 1366 x 768 at 60 Hz (non-interlaced) */ 82 HI_VO_OUT_1400x1050_60 = 14, /* VESA 1400 x 1050 at 60 Hz (non-interlaced) CVT */ 83 HI_VO_OUT_1440x900_60 = 15, /* VESA 1440 x 900 at 60 Hz (non-interlaced) CVT Compliant */ 84 HI_VO_OUT_1600x1200_60 = 16, /* VESA 1600 x 1200 at 60 Hz (non-interlaced) */ 85 HI_VO_OUT_1680x1050_60 = 17, /* VESA 1680 x 1050 at 60 Hz (non-interlaced) */ 86 87 HI_VO_OUT_1080P24 = 18, /* 1920 x 1080 at 24 Hz. */ 88 HI_VO_OUT_1080P25 = 19, /* 1920 x 1080 at 25 Hz. */ 89 HI_VO_OUT_1080P30 = 20, /* 1920 x 1080 at 30 Hz. */ 90 HI_VO_OUT_1080I50 = 21, /* 1920 x 1080 at 50 Hz, interlaced. */ 91 HI_VO_OUT_1080I60 = 22, /* 1920 x 1080 at 60 Hz, interlaced. */ 92 HI_VO_OUT_1080P50 = 23, /* 1920 x 1080 at 50 Hz. */ 93 HI_VO_OUT_1080P60 = 24, /* 1920 x 1080 at 60 Hz. */ 94 95 HI_VO_OUT_1920x1200_60 = 25, /* VESA 1920 x 1200 at 60 Hz (non-interlaced) CVT (Reduced Blanking) */ 96 HI_VO_OUT_1920x2160_30 = 26, /* 1920x2160_30 */ 97 HI_VO_OUT_2560x1440_30 = 27, /* 2560x1440_30 */ 98 HI_VO_OUT_2560x1440_60 = 28, /* 2560x1440_60 */ 99 HI_VO_OUT_2560x1600_60 = 29, /* 2560x1600_60 */ 100 101 HI_VO_OUT_3840x2160_24 = 30, /* 3840x2160_24 */ 102 HI_VO_OUT_3840x2160_25 = 31, /* 3840x2160_25 */ 103 HI_VO_OUT_3840x2160_30 = 32, /* 3840x2160_30 */ 104 HI_VO_OUT_3840x2160_50 = 33, /* 3840x2160_50 */ 105 HI_VO_OUT_3840x2160_60 = 34, /* 3840x2160_60 */ 106 HI_VO_OUT_4096x2160_24 = 35, /* 4096x2160_24 */ 107 HI_VO_OUT_4096x2160_25 = 36, /* 4096x2160_25 */ 108 HI_VO_OUT_4096x2160_30 = 37, /* 4096x2160_30 */ 109 HI_VO_OUT_4096x2160_50 = 38, /* 4096x2160_50 */ 110 HI_VO_OUT_4096x2160_60 = 39, /* 4096x2160_60 */ 111 HI_VO_OUT_7680x4320_30 = 40, /* 7680x4320_30 */ 112 113 HI_VO_OUT_240x320_50 = 41, /* 240x320_50 */ 114 HI_VO_OUT_320x240_50 = 42, /* 320x240_50 */ 115 HI_VO_OUT_240x320_60 = 43, /* 240x320_60 */ 116 HI_VO_OUT_320x240_60 = 44, /* 320x240_60 */ 117 HI_VO_OUT_800x600_50 = 45, /* 800x600_60 */ 118 119 HI_VO_OUT_720x1280_60 = 46, /* For MIPI DSI Tx 720 x1280 at 60 Hz */ 120 HI_VO_OUT_1080x1920_60 = 47, /* For MIPI DSI Tx 1080x1920 at 60 Hz */ 121 122 HI_VO_OUT_USER = 48, /* User timing. */ 123 124 HI_VO_OUT_BUTT, 125 } hi_vo_intf_sync; 126 127 typedef struct { 128 hi_bool syncm; /* RW; sync mode(0:timing,as BT.656; 1:signal,as LCD) */ 129 hi_bool iop; /* RW; interlaced or progressive display(0:i; 1:p) */ 130 hi_u8 intfb; /* RW; interlaced bit width while output */ 131 132 hi_u16 vact; /* RW; vertical active area */ 133 hi_u16 vbb; /* RW; vertical back blank porch */ 134 hi_u16 vfb; /* RW; vertical front blank porch */ 135 136 hi_u16 hact; /* RW; horizontal active area */ 137 hi_u16 hbb; /* RW; horizontal back blank porch */ 138 hi_u16 hfb; /* RW; horizontal front blank porch */ 139 hi_u16 hmid; /* RW; bottom horizontal active area */ 140 141 hi_u16 bvact; /* RW; bottom vertical active area */ 142 hi_u16 bvbb; /* RW; bottom vertical back blank porch */ 143 hi_u16 bvfb; /* RW; bottom vertical front blank porch */ 144 145 hi_u16 hpw; /* RW; horizontal pulse width */ 146 hi_u16 vpw; /* RW; vertical pulse width */ 147 148 hi_bool idv; /* RW; inverse data valid of output */ 149 hi_bool ihs; /* RW; inverse horizontal synchronization signal */ 150 hi_bool ivs; /* RW; inverse vertical synchronization signal */ 151 } hi_vo_sync_info; 152 153 typedef struct { 154 hi_u32 bg_color; /* RW; background color of a device, in RGB format. */ 155 hi_vo_intf_type intf_type; /* RW; type of a VO interface */ 156 hi_vo_intf_sync intf_sync; /* RW; type of a VO interface timing */ 157 hi_vo_sync_info sync_info; /* RW; information about VO interface timing */ 158 } hi_vo_pub_attr; 159 160 typedef struct { 161 hi_bool exit_dev_en; /* RW, range: [0, 1]; whether to disable the vo device when sys exit */ 162 hi_bool dev_clk_ext_en; /* RW, range: [0, 1]; whether to open the vo device clock by the external user */ 163 hi_bool vga_detect_en; /* RW, range: [0, 1]; whether to enable the vga detect */ 164 hi_u32 vdac_detect_cycle; /* RW; VDAC(video digital-to-analog converter) detect cycle; Unit: frame interruption */ 165 } hi_vo_mod_param; 166 167 typedef enum { 168 HI_VO_CLK_SRC_PLL = 0, /* Clock source type PLL */ 169 HI_VO_CLK_SRC_LCDMCLK = 1, /* Clock source type LCDMCLK */ 170 HI_VO_CLK_SRC_PLL_FOUT4 = 2, /* Clock source type PLL FOUT4 */ 171 HI_VO_CLK_SRC_FIXED = 3, /* Clock source type FIXED */ 172 173 HI_VO_CLK_SRC_BUTT, 174 } hi_vo_clk_src; 175 176 typedef enum { 177 HI_VO_FIXED_CLK_65M = 0, /* Fixed clock source 65MHz */ 178 HI_VO_FIXED_CLK_74_25M = 1, /* Fixed clock source 74.25MHz */ 179 HI_VO_FIXED_CLK_108M = 2, /* Fixed clock source 108MHz */ 180 HI_VO_FIXED_CLK_135M = 3, /* Fixed clock source 135MHz */ 181 HI_VO_FIXED_CLK_148_5M = 4, /* Fixed clock source 148.5MHz */ 182 HI_VO_FIXED_CLK_297M = 5, /* Fixed clock source 297MHz */ 183 184 HI_VO_FIXED_CLK_BUTT, 185 } hi_vo_fixed_clk; 186 187 typedef struct { 188 hi_u32 fb_div; /* RW, range: [0, 0xfff]; frequency double division */ 189 hi_u32 frac; /* RW, range: [0, 0xffffff]; fractional division */ 190 hi_u32 ref_div; /* RW, range: (0, 0x3f]; reference clock division */ 191 hi_u32 post_div1; /* RW, range: (0, 0x7]; level 1 post division */ 192 hi_u32 post_div2; /* RW, range: (0, 0x7]; level 2 post division */ 193 } hi_vo_pll; 194 195 typedef struct { 196 hi_vo_clk_src clk_src; /* RW; clock source type */ 197 198 union { 199 /* 200 * RW; user synchronization timing clock PLL information. 201 * AUTO: hi_vo_clk_src:HI_VO_CLK_SRC_PLL, HI_VO_CLK_SRC_PLL_FOUT4; 202 */ 203 hi_vo_pll vo_pll; 204 /* 205 * RW, range: [1, 8473341]; LCD clock division. 206 * AUTO: hi_vo_clk_src:HI_VO_CLK_SRC_LCDMCLK; 207 */ 208 hi_u32 lcd_m_clk_div; 209 210 hi_vo_fixed_clk fixed_clk; /* RW; fixed clock. AUTO: hi_vo_clk_src:HI_VO_CLK_SRC_FIXED; */ 211 }; 212 } hi_vo_user_sync_attr; 213 214 typedef struct { 215 hi_vo_user_sync_attr user_sync_attr; /* RW; user synchronization timing attribute */ 216 hi_u32 pre_div; /* RW, range: [1, 32]; device previous division */ 217 hi_u32 dev_div; /* RW, range: [1, 4]; device clock division */ 218 hi_bool clk_reverse_en; /* RW, range: [0, 1]; whether to reverse clock */ 219 } hi_vo_user_sync_info; 220 221 typedef struct { 222 hi_bool enable; /* RW, less buf enable */ 223 hi_u32 vtth; /* RW, vtth value */ 224 }hi_vo_less_buf_attr; 225 226 typedef enum { 227 HI_VO_INTF_STATUS_NO_PLUG = 0, /* Interface status is not plugged */ 228 HI_VO_INTF_STATUS_PLUG = 1, /* Interface status is plugged */ 229 HI_VO_INTF_STATUS_BUTT, 230 }hi_vo_intf_plug_status; 231 232 typedef struct { 233 hi_vo_intf_plug_status plug_status; /* R; Interface plug status */ 234 }hi_vo_intf_status; 235 236 typedef enum { 237 HI_VO_CSC_MATRIX_BT601LIMIT_TO_BT601LIMIT = 0, /* Identity matrix. from BT.601 limit to BT.601 limit */ 238 HI_VO_CSC_MATRIX_BT601FULL_TO_BT601LIMIT = 1, /* Change color space from BT.601 full to BT.601 limit */ 239 HI_VO_CSC_MATRIX_BT709LIMIT_TO_BT601LIMIT = 2, /* Change color space from BT.709 limit to BT.601 limit */ 240 HI_VO_CSC_MATRIX_BT709FULL_TO_BT601LIMIT = 3, /* Change color space from BT.709 full to BT.601 limit */ 241 242 HI_VO_CSC_MATRIX_BT601LIMIT_TO_BT709LIMIT = 4, /* Change color space from BT.601 limit to BT.709 limit */ 243 HI_VO_CSC_MATRIX_BT601FULL_TO_BT709LIMIT = 5, /* Change color space from BT.601 full to BT.709 limit */ 244 HI_VO_CSC_MATRIX_BT709LIMIT_TO_BT709LIMIT = 6, /* Identity matrix. from BT.709 limit to BT.709 limit */ 245 HI_VO_CSC_MATRIX_BT709FULL_TO_BT709LIMIT = 7, /* Change color space from BT.709 full to BT.709 limit */ 246 247 HI_VO_CSC_MATRIX_BT601LIMIT_TO_BT601FULL = 8, /* Change color space from BT.601 limit to BT.601 full */ 248 HI_VO_CSC_MATRIX_BT601FULL_TO_BT601FULL = 9, /* Identity matrix. from BT.601 full to BT.601 full */ 249 HI_VO_CSC_MATRIX_BT709LIMIT_TO_BT601FULL = 10, /* Change color space from BT.709 limit to BT.601 full */ 250 HI_VO_CSC_MATRIX_BT709FULL_TO_BT601FULL = 11, /* Change color space from BT.709 full to BT.601 full */ 251 252 HI_VO_CSC_MATRIX_BT601LIMIT_TO_BT709FULL = 12, /* Change color space from BT.601 limit to BT.709 full */ 253 HI_VO_CSC_MATRIX_BT601FULL_TO_BT709FULL = 13, /* Change color space from BT.601 full to BT.709 full */ 254 HI_VO_CSC_MATRIX_BT709LIMIT_TO_BT709FULL = 14, /* Change color space from BT.709 limit to BT.709 full */ 255 HI_VO_CSC_MATRIX_BT709FULL_TO_BT709FULL = 15, /* Identity matrix. from BT.709 full to BT.709 full */ 256 257 HI_VO_CSC_MATRIX_BT601LIMIT_TO_RGBFULL = 16, /* Change color space from BT.601 limit to RGB full */ 258 HI_VO_CSC_MATRIX_BT601FULL_TO_RGBFULL = 17, /* Change color space from BT.601 full to RGB full */ 259 HI_VO_CSC_MATRIX_BT709LIMIT_TO_RGBFULL = 18, /* Change color space from BT.709 limit to RGB full */ 260 HI_VO_CSC_MATRIX_BT709FULL_TO_RGBFULL = 19, /* Change color space from BT.709 full to RGB full */ 261 262 HI_VO_CSC_MATRIX_BT601LIMIT_TO_RGBLIMIT = 20, /* Change color space from BT.601 limit to RGB limit */ 263 HI_VO_CSC_MATRIX_BT601FULL_TO_RGBLIMIT = 21, /* Change color space from BT.709 full to RGB limit */ 264 HI_VO_CSC_MATRIX_BT709LIMIT_TO_RGBLIMIT = 22, /* Change color space from BT.601 limit to RGB limit */ 265 HI_VO_CSC_MATRIX_BT709FULL_TO_RGBLIMIT = 23, /* Change color space from BT.709 full to RGB limit */ 266 267 HI_VO_CSC_MATRIX_RGBFULL_TO_BT601LIMIT = 24, /* Change color space from RGB full to BT.601 limit */ 268 HI_VO_CSC_MATRIX_RGBFULL_TO_BT601FULL = 25, /* Change color space from RGB full to BT.601 full */ 269 HI_VO_CSC_MATRIX_RGBFULL_TO_BT709LIMIT = 26, /* Change color space from RGB full to BT.709 limit */ 270 HI_VO_CSC_MATRIX_RGBFULL_TO_BT709FULL = 27, /* Change color space from RGB full to BT.709 full */ 271 272 HI_VO_CSC_MATRIX_BUTT, 273 } hi_vo_csc_matrix; 274 275 typedef struct { 276 hi_vo_csc_matrix csc_matrix; /* RW; CSC matrix */ 277 hi_u32 luma; /* RW; range: [0, 100]; luminance, default: 50 */ 278 hi_u32 contrast; /* RW; range: [0, 100]; contrast, default: 50 */ 279 hi_u32 hue; /* RW; range: [0, 100]; hue, default: 50 */ 280 hi_u32 saturation; /* RW; range: [0, 100]; saturation, default: 50 */ 281 hi_bool ex_csc_en; /* RW; range: [0, 1]; extended csc switch for luminance, default: 0 */ 282 } hi_vo_csc; 283 284 typedef struct { 285 hi_vo_csc csc; /* RW; color space */ 286 hi_u32 gain; /* RW; range: [0, 64); current gain of VGA signals. */ 287 hi_s32 sharpen_strength; /* RW; range: [0, 255]; current sharpen strength of VGA signals. */ 288 } hi_vo_vga_param; 289 290 typedef struct { 291 hi_vo_csc csc; /* RW, color space */ 292 } hi_vo_hdmi_param; 293 294 typedef struct { 295 hi_vo_csc csc; /* RW, color space */ 296 hi_bool rgb_inverted_en; /* RW; component r g b inverted, rgb to bgr, default: 0, rgb */ 297 hi_bool bit_inverted_en; /* RW; data's bit inverted, 298 rgb6bit: bit[5:0] to bit[0:5], 299 rgb8bit: bit[7:0] to bit[0:7], 300 rgb16bit: bit[15:0] to bit[0:15], 301 rgb18bit: bit[17:0] to bit[0:17], 302 rgb24bit: bit[23:0] to bit[0:23], 303 default: 0, bit[5/7/15/17/23:0] */ 304 } hi_vo_rgb_param; 305 306 typedef struct { 307 hi_bool yc_inverted_en; /* RW; component y c inverted, yc to cy, default: 0, yc */ 308 hi_bool bit_inverted_en; /* RW; data's bit inverted, bt.656: bit[7:0] to bit[0:7], 309 bt.1120: bit[15:0] to bit[0:15], 310 default: 0, bit[7:0] or bit[15:0] */ 311 } hi_vo_bt_param; 312 313 typedef enum { 314 HI_VO_PARTITION_MODE_SINGLE = 0, /* Single partition, use software to make multi-picture in one hardware cell */ 315 HI_VO_PARTITION_MODE_MULTI = 1, /* Multi partition, each partition is a hardware cell */ 316 HI_VO_PARTITION_MODE_BUTT, 317 } hi_vo_partition_mode; 318 319 typedef struct { 320 hi_rect display_rect; /* RW; display resolution */ 321 hi_phys_addr_t address; 322 hi_u32 stride; 323 } hi_vo_video_layer_attr; 324 325 typedef enum { 326 HI_VO_GFX_TYPE_ARGB1555 = 0, 327 HI_VO_GFX_TYPE_BMP1555 = 1, 328 329 HI_VO_GFX_TYPE_BUTT 330 }hi_vo_gfx_type; 331 332 typedef struct { 333 hi_rect display_rect; 334 hi_phys_addr_t address; 335 hi_u32 stride; 336 hi_vo_gfx_type type; 337 } hi_vo_gfx_attr; 338 339 typedef struct { 340 hi_aspect_ratio aspect_ratio; /* RW; aspect ratio */ 341 } hi_vo_layer_param; 342 343 typedef struct { 344 hi_u32 priority; /* RW; video out overlay priority sd */ 345 hi_rect rect; /* RW; rectangle of video output channel */ 346 hi_bool deflicker_en; /* RW; deflicker or not sd */ 347 } hi_vo_chn_attr; 348 349 typedef struct { 350 hi_aspect_ratio aspect_ratio; /* RW; aspect ratio */ 351 } hi_vo_chn_param; 352 353 typedef enum { 354 HI_VO_ZOOM_IN_RECT = 0, /* Zoom in by rect */ 355 HI_VO_ZOOM_IN_RATIO = 1, /* Zoom in by ratio */ 356 HI_VO_ZOOM_IN_BUTT, 357 } hi_vo_zoom_in_type; 358 359 typedef struct { 360 /* RW; range: [0, 1000]; x_ratio = x * 1000 / W, x means start point to be zoomed, W means channel's width. */ 361 hi_u32 x_ratio; 362 /* RW; range: [0, 1000]; y_ratio = y * 1000 / H, y means start point to be zoomed, H means channel's height. */ 363 hi_u32 y_ratio; 364 /* RW; range: [0, 1000]; width_ratio = w * 1000 / W, w means width to be zoomed, W means channel's width. */ 365 hi_u32 width_ratio; 366 /* RW; range: [0, 1000]; height_ratio = h * 1000 / H, h means height to be zoomed, H means channel's height. */ 367 hi_u32 height_ratio; 368 } hi_vo_zoom_ratio; 369 370 typedef struct { 371 hi_vo_zoom_in_type zoom_type; /* RW; choose the type of zoom in */ 372 union { 373 hi_rect zoom_rect; /* RW; zoom in by rect. AUTO:hi_vo_zoom_in_type:HI_VO_ZOOM_IN_RECT; */ 374 hi_vo_zoom_ratio zoom_ratio; /* RW; zoom in by ratio. AUTO:hi_vo_zoom_in_type:HI_VO_ZOOM_IN_RATIO; */ 375 }; 376 } hi_vo_zoom_attr; 377 378 typedef struct { 379 hi_bool enable; /* RW; do frame or not */ 380 hi_border border; /* RW; frame's top, bottom, left, right width and color */ 381 } hi_vo_border; 382 383 typedef struct { 384 hi_u32 chn_buf_used; /* R; channel buffer that been used */ 385 } hi_vo_chn_status; 386 387 typedef struct { 388 hi_size target_size; /* RW; WBC zoom target size */ 389 hi_pixel_format pixel_format; /* RW; the pixel format of WBC output */ 390 hi_u32 frame_rate; /* RW; frame rate control */ 391 hi_dynamic_range dynamic_range; /* RW; write back dynamic range type */ 392 hi_compress_mode compress_mode; /* RW; write back compressing mode */ 393 } hi_vo_wbc_attr; 394 395 typedef enum { 396 HI_VO_WBC_MODE_NORM = 0, /* In this mode, wbc will capture frames according to dev frame rate 397 and wbc frame rate */ 398 HI_VO_WBC_MODE_DROP_REPEAT = 1, /* In this mode, wbc will drop dev repeat frame, and capture the real frame 399 according to video layer's display rate and wbc frame rate */ 400 HI_VO_WBC_MODE_PROGRESSIVE_TO_INTERLACED = 2, /* In this mode, wbc will drop dev repeat frame which repeats more 401 than 3 times, and change two progressive frames to one interlaced frame */ 402 HI_VO_WBC_MODE_BUTT, 403 } hi_vo_wbc_mode; 404 405 typedef enum { 406 HI_VO_WBC_SRC_DEV = 0, /* WBC source is device */ 407 HI_VO_WBC_SRC_VIDEO = 1, /* WBC source is video layer */ 408 HI_VO_WBC_SRC_BUTT, 409 } hi_vo_wbc_src_type; 410 411 typedef struct { 412 hi_vo_wbc_src_type src_type; /* RW; WBC source's type */ 413 hi_u32 src_id; /* RW; WBC source's ID */ 414 } hi_vo_wbc_src; 415 416 typedef enum { 417 HI_VO_CAS_MODE_SINGLE = 0, /* cascade mode is single */ 418 HI_VO_CAS_MODE_DUAL = 1, /* cascade mode is dual */ 419 HI_VO_CAS_MODE_BUTT, 420 } hi_vo_cas_mode; 421 422 typedef enum { 423 HI_VO_CAS_MODE_SINGLE_EDGE = 0, /* single transmission,clock rising edge or falling edge trigger transmission */ 424 HI_VO_CAS_MODE_DUAL_EDGE = 1, /* dual transmission,clock rising edge and falling edge trigger transmission */ 425 HI_VO_CAS_MODE_EDGE_BUTT, 426 } hi_vo_cas_data_transmission_mode; 427 428 typedef enum { 429 HI_VO_CAS_RGN_64 = 0, /* cascade region number 64 */ 430 HI_VO_CAS_RGN_32 = 1, /* cascade region number 32 */ 431 HI_VO_CAS_RGN_BUTT, 432 } hi_vo_cas_rgn; 433 434 typedef struct { 435 hi_bool is_slave; /* RW; HI_TRUE: slave mode, HI_FALSE: master mode */ 436 hi_vo_cas_rgn cas_rgn; /* RW; cascade region number */ 437 hi_vo_cas_mode cas_mode; /* RW; cascade mode */ 438 hi_vo_cas_data_transmission_mode cas_edge_mode; /* RW; cascade data transmission mode */ 439 } hi_vo_cas_attr; 440 441 #ifdef __cplusplus 442 #if __cplusplus 443 } 444 #endif 445 #endif /* end of #ifdef __cplusplus */ 446 447 #endif /* end of #ifndef __HI_COMMON_VO_H__ */ 448