1 /**
2 *******************************************************************************
3 *
4 * @file platform_gr55xx.c
5 *
6 * @brief Platform Initialization Routines.
7 *
8 *******************************************************************************
9
10 * @attention
11 #####Copyright (c) 2019 GOODIX
12 All rights reserved.
13
14 Redistribution and use in source and binary forms, with or without
15 modification, are permitted provided that the following conditions are met:
16 * Redistributions of source code must retain the above copyright
17 notice, this list of conditions and the following disclaimer.
18 * Redistributions in binary form must reproduce the above copyright
19 notice, this list of conditions and the following disclaimer in the
20 documentation and/or other materials provided with the distribution.
21 * Neither the name of GOODIX nor the names of its contributors may be used
22 to endorse or promote products derived from this software without
23 specific prior written permission.
24
25 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
29 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 POSSIBILITY OF SUCH DAMAGE.
36 *******************************************************************************
37 */
38
39 /*
40 * INCLUDE FILES
41 *******************************************************************************
42 */
43 #include "gr55xx_hal_cortex.h"
44 #include "gr55xx.h"
45 #include "gr55xx_sys.h"
46 #include "gr55xx_ll_pwr.h"
47 #include "hal_flash.h"
48 #include "platform_sdk.h"
49 #include "pmu_calibration.h"
50 #include "boards.h"
51 #include "custom_config.h"
52 #include "patch.h"
53 #include "patch_tab.h"
54 #include "gr55xx_ll_gpio.h"
55 #include "gr55xx_rom_symbol.h"
56
57 // NOTE: SVC #0 is reserved for freertos, DO NOT USE IT!
58 #define SVC_TABLE_NUM_MAX 4
59
60 #define FLASH_CS (LL_GPIO_PIN_2) /* XQSPI flash CS */
61 #define FLASH_CLK (LL_GPIO_PIN_4) /* XQSPI flash CLK */
62 #define FLASH_IO_0 (LL_GPIO_PIN_7) /* XQSPI flash IO0 */
63 #define FLASH_IO_1 (LL_GPIO_PIN_6) /* XQSPI flash IO1 */
64 #define FLASH_IO_2 (LL_GPIO_PIN_5) /* XQSPI flash IO2 (WP) */
65 #define FLASH_IO_3 (LL_GPIO_PIN_3) /* XQSPI flash IO3 (HOLD) */
HAL_EXFLASH_IO_PULL_SET(uint32_t _PIN_,uint32_t _PULL_)66 static inline void HAL_EXFLASH_IO_PULL_SET(uint32_t _PIN_, uint32_t _PULL_)
67 {
68 ll_gpio_set_pin_pull(GPIO1, _PIN_, _PULL_);
69 }
70
71 static uint32_t SVC_TABLE_USER_SPACE[SVC_TABLE_NUM_MAX] __attribute__((section("SVC_TABLE")));
72
73 #if (CFG_LCP_SUPPORT && (CHIP_TYPE == 0))
74 static uint8_t lcp_buf[280] __attribute__((section (".ARM.__at_0x00820000"), zero_init));
75 #endif
76
77 #ifdef GR5515_E
78 static uint8_t s_nvds_cache[4096];
79 #endif
80
nvds_setup(void)81 static void nvds_setup(void)
82 {
83 #ifdef GR5515_E
84 g_nvds_buf = (uint8_t *)&s_nvds_cache;
85 #endif
86
87 #ifdef NVDS_START_ADDR
88 uint8_t err_code = nvds_init(NVDS_START_ADDR, NVDS_NUM_SECTOR);
89 #else
90 uint8_t err_code = nvds_init(0, NVDS_NUM_SECTOR);
91 #endif
92
93 switch (err_code) {
94 case NVDS_FAIL:
95 case NVDS_STORAGE_ACCESS_FAILED: {
96 uint32_t start_addr = nvds_get_start_addr();
97 uint32_t sector_size = hal_flash_sector_size();
98 if (hal_flash_erase(start_addr, NVDS_NUM_SECTOR * sector_size)) {
99 err_code = nvds_init(start_addr, NVDS_NUM_SECTOR);
100 if (NVDS_SUCCESS == err_code) {
101 break;
102 }
103 }
104 /* Flash fault, cannot startup.
105 * Output log via UART or Dump an error code to flash. */
106 while (1) {}
107 }
108 case NVDS_SUCCESS:
109 break;
110 default:
111 /* Illegal NVDS Parameters.
112 * Please check the start address and number of sectors. */
113 while (1) {}
114 }
115 }
116
ble_sdk_env_init(void)117 void ble_sdk_env_init(void)
118 {
119 // register the msg handler for patch
120 uint16_t msg_cnt = sizeof(msg_tab) / sizeof(msg_tab_item_t);
121 reg_msg_patch_tab(msg_tab, msg_cnt);
122
123 #if CFG_MAX_CONNECTIONS
124 ble_con_env_init();
125 #endif
126
127 #if CFG_MAX_SCAN
128 ble_scan_env_init();
129 #endif
130
131 #if CFG_MAX_ADVS
132 ble_adv_env_init();
133 #endif
134 }
135
BLE_power_check(void)136 static void BLE_power_check(void)
137 {
138 if ((AON->PWR_RET01 & AON_PWR_REG01_PWR_EN_PD_COMM_TIMER) ||
139 (AON->PWR_RET01 & AON_PWR_REG01_PWR_EN_PD_COMM_CORE)) {
140 ll_pwr_enable_comm_core_reset();
141 ll_pwr_enable_comm_timer_reset();
142 ll_pwr_disable_comm_core_power();
143 ll_pwr_disable_comm_timer_power();
144 /* Reserve System Cold Fully Reset Method. */
145 }
146 }
147
system_calibration(void)148 static void system_calibration(void)
149 {
150 system_pmu_deinit();
151 SystemCoreSetClock((mcu_clock_type_t)SYSTEM_CLOCK);
152 system_pmu_init((mcu_clock_type_t)SYSTEM_CLOCK);
153
154 // recover the default setting by temperature, should be called in the end
155 pmu_calibration_handler(NULL);
156
157 /* RTC calibration function */
158 #if !CFG_LPCLK_INTERNAL_EN
159 rtc_calibration();
160 #endif
161
162 /* rng calibration */
163 #ifndef GR5515_E
164 rng_calibration();
165 #endif
166 }
167
exflash_io_pull_config(void)168 static void exflash_io_pull_config(void)
169 {
170 /* XQSPI IO configuration needs to match Flash.
171 The default configuration can match most Flash */
172 HAL_EXFLASH_IO_PULL_SET(FLASH_CS, LL_GPIO_PULL_UP);
173 HAL_EXFLASH_IO_PULL_SET(FLASH_CLK, LL_GPIO_PULL_NO);
174 HAL_EXFLASH_IO_PULL_SET(FLASH_IO_0, LL_GPIO_PULL_UP); /* MOSI */
175 HAL_EXFLASH_IO_PULL_SET(FLASH_IO_1, LL_GPIO_PULL_UP); /* MISO */
176 HAL_EXFLASH_IO_PULL_SET(FLASH_IO_2, LL_GPIO_PULL_UP); /* WP */
177 HAL_EXFLASH_IO_PULL_SET(FLASH_IO_3, LL_GPIO_PULL_UP); /* HOLD */
178 }
179
platform_init(void)180 void platform_init(void)
181 {
182 /* if BLE not fully power off, reset and power off it manually */
183 BLE_power_check();
184
185 /* Clear All Wakeup Event When Cold Boot */
186 ll_pwr_clear_wakeup_event(LL_PWR_WKUP_EVENT_ALL);
187 for (uint8_t i = 0; i < MAX_NUMS_IRQn; i++) {
188 NVIC_ClearPendingIRQ((IRQn_Type)(i));
189 }
190
191 #ifdef EXFLASH_WAKEUP_DELAY
192 warm_boot_set_exflash_readid_delay(EXFLASH_WAKEUP_DELAY * ITEM_5);
193 run_mode_t run_mode = (run_mode_t)(SYSTEM_CLOCK);
194 uint16_t osc_time = ble_wakeup_osc_time_get(run_mode) + (EXFLASH_WAKEUP_DELAY * ITEM_5);
195 ble_wakeup_osc_time_set(run_mode, osc_time);
196 #endif
197
198 /* enable protection. */
199 #ifndef GR5515_E
200 platform_init_push();
201 #endif
202
203 /* set sram power state. */
204 mem_pwr_mgmt_init();
205
206 if (!hal_flash_init()) {
207 /* Flash fault, cannot startup.
208 * Output log via UART or Dump an error code to flash. */
209 while (1) {}
210 }
211
212 #if (defined(GR5515_E) && defined(ROM_RUN_IN_FLASH)) || !defined(GR5515_E)
213 platform_flash_enable_quad();
214 #endif
215
216 platform_flash_protection(FLASH_PROTECT_PRIORITY);
217
218 /* nvds module init process. */
219 nvds_setup();
220
221 /* To choose the System clock source and set the accuracy of OSC. */
222 #if CFG_LPCLK_INTERNAL_EN
223 platform_clock_init_rng((mcu_clock_type_t)SYSTEM_CLOCK, RNG_OSC_CLK2, CFG_LF_ACCURACY_PPM, 0);
224 #else
225 platform_clock_init((mcu_clock_type_t)SYSTEM_CLOCK, RTC_OSC_CLK, CFG_LF_ACCURACY_PPM, 0);
226 #endif
227
228 /* Register the SVC Table. */
229 svc_table_register(SVC_TABLE_USER_SPACE);
230
231 #if ENCRYPT_ENABLE
232 fpb_register_patch_init_func(fpb_encrypt_mode_patch_enable);
233 #else
234 fpb_register_patch_init_func(fpb_patch_enable);
235 #endif
236
237 /* platform init process. */
238 platform_sdk_init();
239
240 #if ENCRYPT_ENABLE
241 dfu_cmd_handler_replace_for_encrypt();
242 #endif
243
244 system_calibration();
245
246 #if (CFG_LCP_SUPPORT && (CHIP_TYPE == 0))
247 gdx_lcp_buf_init((uint32_t)lcp_buf);
248 #endif
249
250 exflash_io_pull_config();
251
252 /* disable protection. */
253 #ifndef GR5515_E
254 platform_init_pop();
255 #endif
256
257 return;
258 }
259
260 #if defined ( __GNUC__ )
__main(void)261 void __main(void)
262 {
263 __asm("ldr r1, =__etext\n");
264 __asm("ldr r2, =__data_start__\n");
265 __asm("ldr r3, =__data_end__\n");
266 __asm(".L_loop1:\n");
267 __asm("cmp r2, r3\n");
268 __asm("ittt lt\n");
269 __asm("ldrlt r0, [r1], #4\n");
270 __asm("strlt r0, [r2], #4\n");
271 __asm("blt .L_loop1\n");
272 __asm("ldr r1, =__bss_start__\n");
273 __asm("ldr r2, =__bss_end__\n");
274 __asm("movs r0, 0\n");
275 __asm(".L_loop3:\n");
276 __asm("cmp r1, r2\n");
277 __asm("itt lt\n");
278 __asm("strlt r0, [r1], #4\n");
279 __asm("blt .L_loop3\n");
280 system_platform_init();
281 main();
282 }
283 #endif
284
285 #if defined ( __CC_ARM )
286 //lint -e{10}
287 //lint -e{10,144}
$Sub$$main(void)288 void $Sub$$main(void)
289 {
290 system_platform_init();
291 $Super$$main();
292 }
293 #endif
294
295 #if defined ( __ICCARM__ )
296
__main(void)297 void __main(void)
298 {
299 __iar_program_start();
300 }
301
__low_level_init(void)302 int __low_level_init(void)
303 {
304 // call IAR table copy function.
305 __iar_data_init3();
306 system_platform_init();
307 return 0;
308 }
309 #endif
310