Home
last modified time | relevance | path

Searched defs:reg (Results 1 – 25 of 1204) sorted by relevance

12345678910>>...49

/third_party/uboot/u-boot-2020.01/drivers/video/exynos/
Dexynos_dp_lowlevel.c22 unsigned int reg; in exynos_dp_enable_video_input() local
39 unsigned int reg; in exynos_dp_enable_video_bist() local
55 unsigned int reg; in exynos_dp_enable_video_mute() local
70 unsigned int reg; in exynos_dp_init_analog_param() local
173 unsigned int reg; in exynos_dp_enable_sw_func() local
189 unsigned int reg; in exynos_dp_set_analog_power_down() local
242 unsigned int reg; in exynos_dp_get_pll_lock_status() local
255 unsigned int reg; in exynos_dp_set_pll_power() local
270 unsigned int reg; in exynos_dp_init_analog_func() local
319 unsigned int reg; in exynos_dp_init_hpd() local
[all …]
Dexynos_mipi_dsi_lowlevel.c20 unsigned int reg; in exynos_mipi_dsi_func_reset() local
34 unsigned int reg = 0; in exynos_mipi_dsi_sw_reset() local
51 unsigned int reg = readl(&mipi_dsim->intsrc); in exynos_mipi_dsi_sw_release() local
63 unsigned int reg = readl(&mipi_dsim->intmsk); in exynos_mipi_dsi_set_interrupt_mask() local
76 unsigned int reg; in exynos_mipi_dsi_init_fifo_pointer() local
104 unsigned int reg; in exynos_mipi_dsi_set_main_disp_resol() local
123 unsigned int reg; in exynos_mipi_dsi_set_main_disp_vporch() local
141 unsigned int reg; in exynos_mipi_dsi_set_main_disp_hporch() local
156 unsigned int reg; in exynos_mipi_dsi_set_main_disp_sync_area() local
172 unsigned int reg; in exynos_mipi_dsi_set_sub_disp_resol() local
[all …]
/third_party/libffi/include/
Dffi_cfi.h14 # define cfi_def_cfa(reg, off) .cfi_def_cfa reg, off argument
15 # define cfi_def_cfa_register(reg) .cfi_def_cfa_register reg argument
18 # define cfi_offset(reg, off) .cfi_offset reg, off argument
19 # define cfi_rel_offset(reg, off) .cfi_rel_offset reg, off argument
21 # define cfi_return_column(reg) .cfi_return_column reg argument
22 # define cfi_restore(reg) .cfi_restore reg argument
23 # define cfi_same_value(reg) .cfi_same_value reg argument
24 # define cfi_undefined(reg) .cfi_undefined reg argument
36 # define cfi_def_cfa(reg, off) argument
37 # define cfi_def_cfa_register(reg) argument
[all …]
/third_party/uboot/u-boot-2020.01/arch/x86/cpu/quark/
Dmsg_port.c11 void msg_port_setup(int op, int port, int reg) in msg_port_setup()
18 u32 msg_port_read(u8 port, u32 reg) in msg_port_read()
30 void msg_port_write(u8 port, u32 reg, u32 value) in msg_port_write()
38 u32 msg_port_alt_read(u8 port, u32 reg) in msg_port_alt_read()
50 void msg_port_alt_write(u8 port, u32 reg, u32 value) in msg_port_alt_write()
58 u32 msg_port_io_read(u8 port, u32 reg) in msg_port_io_read()
70 void msg_port_io_write(u8 port, u32 reg, u32 value) in msg_port_io_write()
/third_party/uboot/u-boot-2020.01/arch/x86/include/asm/arch-quark/
Dmsg_port.h108 #define msg_port_generic_clrsetbits(type, port, reg, clr, set) \ argument
113 #define msg_port_clrbits(port, reg, clr) \ argument
115 #define msg_port_setbits(port, reg, set) \ argument
117 #define msg_port_clrsetbits(port, reg, clr, set) \ argument
120 #define msg_port_alt_clrbits(port, reg, clr) \ argument
122 #define msg_port_alt_setbits(port, reg, set) \ argument
124 #define msg_port_alt_clrsetbits(port, reg, clr, set) \ argument
127 #define msg_port_io_clrbits(port, reg, clr) \ argument
129 #define msg_port_io_setbits(port, reg, set) \ argument
131 #define msg_port_io_clrsetbits(port, reg, clr, set) \ argument
/third_party/gstreamer/gstplugins_good/gst/deinterlace/tvtime/
Dmmx.h275 #define mmx_i2r(op, imm, reg) \ argument
293 #define mmx_m2r(op, mem, reg) \ argument
311 #define mmx_r2m(op, reg, mem) \ argument
366 #define mmx_i2r(op, imm, reg) \ argument
371 #define mmx_m2r(op, mem, reg) \ argument
376 #define mmx_r2m(op, reg, mem) \ argument
398 #define movq_m2r(var, reg) mmx_m2r(movq, var, reg) argument
399 #define movq_r2m(reg, var) mmx_r2m(movq, reg, var) argument
413 #define movd_m2r(var, reg) mmx_m2r(movd, var, reg) argument
414 #define movd_r2m(reg, var) mmx_r2m(movd, reg, var) argument
[all …]
Dsse.h246 #define sse_i2r(op, imm, reg) \ argument
267 #define sse_m2r(op, mem, reg) \ argument
288 #define sse_r2m(op, reg, mem) \ argument
352 #define sse_i2r(op, imm, reg) \ argument
357 #define sse_m2r(op, mem, reg) \ argument
362 #define sse_r2m(op, reg, mem) \ argument
383 #define sse_m2ri(op, mem, reg, subop) \ argument
401 #define movaps_m2r(var, reg) sse_m2r(movaps, var, reg) argument
402 #define movaps_r2m(reg, var) sse_r2m(movaps, reg, var) argument
423 #define movups_m2r(var, reg) sse_m2r(movups, var, reg) argument
[all …]
/third_party/gstreamer/gstplugins_good/gst/goom/
Dmmx.h263 #define mmx_i2r(op, imm, reg) \ argument
284 #define mmx_m2r(op, mem, reg) \ argument
305 #define mmx_r2m(op, reg, mem) \ argument
369 #define mmx_i2r(op, imm, reg) \ argument
374 #define mmx_m2r(op, mem, reg) \ argument
379 #define mmx_r2m(op, reg, mem) \ argument
401 #define movq_m2r(var, reg) mmx_m2r(movq, var, reg) argument
402 #define movq_r2m(reg, var) mmx_r2m(movq, reg, var) argument
416 #define movd_m2r(var, reg) mmx_m2r(movd, var, reg) argument
417 #define movd_r2m(reg, var) mmx_r2m(movd, reg, var) argument
[all …]
/third_party/flutter/skia/third_party/externals/sdl/src/render/
Dmmx.h178 #define mmx_i2r(op, imm, reg) \ argument
199 #define mmx_m2r(op, mem, reg) \ argument
220 #define mmx_r2m(op, reg, mem) \ argument
284 #define mmx_i2r(op, imm, reg) \ argument
289 #define mmx_m2r(op, mem, reg) \ argument
294 #define mmx_r2m(op, reg, mem) \ argument
316 #define movq_m2r(var, reg) mmx_m2r(movq, var, reg) argument
317 #define movq_r2m(reg, var) mmx_r2m(movq, reg, var) argument
331 #define movd_m2r(var, reg) mmx_m2r(movd, var, reg) argument
332 #define movd_r2m(reg, var) mmx_r2m(movd, reg, var) argument
[all …]
/third_party/uboot/u-boot-2020.01/drivers/phy/hibvt/
Dphy_usb_hi3531dv200.c51 unsigned int reg; in usb2_crg_config() local
94 unsigned int reg; in usb2_phy_config() local
147 unsigned int reg; in usb3_crg_config() local
228 unsigned int reg; in usb2_phy0_config() local
281 unsigned int reg; in usb2_phy2_config() local
373 unsigned int reg; in usb2_disable() local
390 unsigned int reg; in usb3_disable() local
Dphy_usb_hi3521dv200.c46 unsigned int reg; in usb2_phy0_config() local
109 unsigned int reg; in usb2_phy1_config() local
172 unsigned int reg; in usb2_phy2_config() local
230 unsigned int reg; in hisi_usb_ctrl_config() local
240 unsigned int reg; in hisi_usb2_0_config() local
287 unsigned int reg; in hisi_usb2_1_config() local
/third_party/uboot/u-boot-2020.01/product/hiosd/vo/arch/hi3521dv200/hal/
Dhal_vo.c39 hi_void vo_hal_set_reg(volatile reg_vdp_regs *reg) in vo_hal_set_reg()
48 hi_ulong vou_get_abs_addr(hal_disp_layer layer, hi_ulong reg) in vou_get_abs_addr()
81 hi_ulong vou_get_chn_abs_addr(hi_vo_dev dev, hi_ulong reg) in vou_get_chn_abs_addr()
101 hi_ulong vou_get_vid_abs_addr(hal_disp_layer layer, hi_ulong reg) in vou_get_vid_abs_addr()
122 hi_ulong vou_get_gfx_abs_addr(hal_disp_layer layer, hi_ulong reg) in vou_get_gfx_abs_addr()
/third_party/uboot/u-boot-2020.01/product/hiosd/vo/arch/hi3531dv200/hal/
Dhal_vo.c38 hi_void vo_hal_set_reg(volatile reg_vdp_regs *reg) in vo_hal_set_reg()
47 hi_ulong vou_get_abs_addr(hal_disp_layer layer, hi_ulong reg) in vou_get_abs_addr()
80 hi_ulong vou_get_chn_abs_addr(hi_vo_dev dev, hi_ulong reg) in vou_get_chn_abs_addr()
100 hi_ulong vou_get_vid_abs_addr(hal_disp_layer layer, hi_ulong reg) in vou_get_vid_abs_addr()
121 hi_ulong vou_get_gfx_abs_addr(hal_disp_layer layer, hi_ulong reg) in vou_get_gfx_abs_addr()
/third_party/uboot/u-boot-2020.01/product/hiosd/vo/arch/hi3535av100/hal/
Dhal_vo.c38 hi_void vo_hal_set_reg(volatile reg_vdp_regs *reg) in vo_hal_set_reg()
47 hi_ulong vou_get_abs_addr(hal_disp_layer layer, hi_ulong reg) in vou_get_abs_addr()
80 hi_ulong vou_get_chn_abs_addr(hi_vo_dev dev, hi_ulong reg) in vou_get_chn_abs_addr()
100 hi_ulong vou_get_vid_abs_addr(hal_disp_layer layer, hi_ulong reg) in vou_get_vid_abs_addr()
121 hi_ulong vou_get_gfx_abs_addr(hal_disp_layer layer, hi_ulong reg) in vou_get_gfx_abs_addr()
/third_party/uboot/u-boot-2020.01/arch/riscv/lib/
Dsetjmp.S10 #define STORE_IDX(reg, idx) sd reg, (idx*8)(a0) argument
11 #define LOAD_IDX(reg, idx) ld reg, (idx*8)(a0) argument
13 #define STORE_IDX(reg, idx) sw reg, (idx*4)(a0) argument
14 #define LOAD_IDX(reg, idx) lw reg, (idx*4)(a0) argument
/third_party/uboot/u-boot-2020.01/drivers/clk/imx/
Dclk.h58 void __iomem *reg, u8 shift) in imx_clk_gate2()
65 void __iomem *reg, u8 shift) in imx_clk_gate4()
73 const char *parent, void __iomem *reg, u8 shift, in imx_clk_gate4_flags()
89 void __iomem *reg, u8 shift, u8 width) in imx_clk_divider()
96 imx_clk_busy_divider(const char *name, const char *parent, void __iomem *reg, in imx_clk_busy_divider()
104 void __iomem *reg, u8 shift, u8 width) in imx_clk_divider2()
119 void __iomem *reg, u8 shift, u8 width, in imx_clk_mux_flags()
128 static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg, in imx_clk_mux()
138 imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, u8 width, in imx_clk_busy_mux()
147 static inline struct clk *imx_clk_mux2(const char *name, void __iomem *reg, in imx_clk_mux2()
[all …]
/third_party/uboot/u-boot-2020.01/arch/arm/mach-socfpga/
Dclock_manager_gen5.c321 u32 reg, clock; in cm_get_main_vco_clk_hz() local
336 u32 reg, clock = 0; in cm_get_per_vco_clk_hz() local
361 u32 reg, clock; in cm_get_mpu_clk_hz() local
375 u32 reg, clock = 0; in cm_get_sdram_clk_hz() local
406 u32 reg, clock = 0; in cm_get_l4_sp_clk_hz() local
440 u32 reg, clock = 0; in cm_get_mmc_controller_clk_hz() local
470 u32 reg, clock = 0; in cm_get_qspi_controller_clk_hz() local
498 u32 reg, clock = 0; in cm_get_spi_controller_clk_hz() local
/third_party/openssl/crypto/
Dsparc_arch.h57 # define SPARC_PIC_THUNK(reg) \ argument
63 # define SPARC_PIC_THUNK_CALL(reg) \ argument
69 # define SPARC_SETUP_GOT_REG(reg) SPARC_PIC_THUNK_CALL(reg) argument
71 # define SPARC_SETUP_GOT_REG(reg) \ argument
80 # define SPARC_LOAD_ADDRESS(SYM, reg) \ argument
90 # define SPARC_LOAD_ADDRESS(SYM, reg) \ argument
97 # define SPARC_LOAD_ADDRESS_LEAF(SYM,reg,tmp) SPARC_LOAD_ADDRESS(SYM,reg) argument
104 # define SPARC_LOAD_ADDRESS(SYM, reg) \ argument
112 # define SPARC_LOAD_ADDRESS_LEAF(SYM, reg, tmp) \ argument
/third_party/uboot/u-boot-2020.01/drivers/misc/
Dsmsc_sio1007.c11 static inline u8 sio1007_read(int port, int reg) in sio1007_read()
18 static inline void sio1007_write(int port, int reg, int val) in sio1007_write()
24 static inline void sio1007_clrsetbits(int port, int reg, u8 clr, u8 set) in sio1007_clrsetbits()
69 int reg = GPIO0_DIR; in sio1007_gpio_config() local
92 int reg = GPIO0_DATA; in sio1007_gpio_get_value() local
111 int reg = GPIO0_DATA; in sio1007_gpio_set_value() local
/third_party/uboot/u-boot-2020.01/arch/arm/mach-imx/mx6/
Dclock.c29 u32 reg; in enable_ocotp_clk() local
83 u32 reg; in enable_usboh3_clk() local
156 u32 reg; in enable_i2c_clk() local
196 u32 reg; in enable_spi_clk() local
310 u32 reg, freq; in get_mcu_main_clk() local
322 u32 reg, div = 0, freq = 0; in get_periph_clk() local
372 u32 reg, ipg_podf; in get_ipg_clk() local
383 u32 reg, perclk_podf; in get_ipg_per_clk() local
399 u32 reg, uart_podf; in get_uart_clk() local
417 u32 reg, cspi_podf; in get_cspi_clk() local
[all …]
/third_party/uboot/u-boot-2020.01/arch/arm/mach-imx/mx7ulp/
Dpcc.c83 u32 reg, val; in pcc_clock_enable() local
113 u32 reg, val, i, clksrc_type; in pcc_clock_sel() local
162 u32 reg, val; in pcc_clock_div_config() local
198 u32 reg, val; in pcc_clock_is_enable() local
214 u32 reg, val, clksrc_type; in pcc_clock_get_clksrc() local
255 u32 reg, val, rate, frac, div; in pcc_clock_get_rate() local
/third_party/uboot/u-boot-2020.01/board/freescale/t208xrdb/
Dcpld.c12 u8 cpld_read(unsigned int reg) in cpld_read()
19 void cpld_write(unsigned int reg, u8 value) in cpld_write()
29 u8 reg = CPLD_READ(flash_csr); in cpld_set_altbank() local
39 u8 reg = CPLD_READ(flash_csr); in cpld_set_defbank() local
/third_party/uboot/u-boot-2020.01/board/freescale/ls1043ardb/
Dcpld.c13 u8 cpld_read(unsigned int reg) in cpld_read()
20 void cpld_write(unsigned int reg, u8 value) in cpld_write()
30 u16 reg = CPLD_CFG_RCW_SRC_NOR; in cpld_set_altbank() local
52 u16 reg = CPLD_CFG_RCW_SRC_NOR; in cpld_set_defbank() local
71 u16 reg = CPLD_CFG_RCW_SRC_NAND; in cpld_set_nand() local
87 u16 reg = CPLD_CFG_RCW_SRC_SD; in cpld_set_sd() local
/third_party/uboot/u-boot-2020.01/arch/arm/mach-tegra/
Dpinmux-common.c144 u32 *reg = _R(APB_MISC_PP_PINMUX_GLOBAL_0); in pinmux_set_tristate_input_clamping() local
151 u32 *reg = _R(APB_MISC_PP_PINMUX_GLOBAL_0); in pinmux_clear_tristate_input_clamping() local
159 u32 *reg = MUX_REG(pin); in pinmux_set_func() local
191 u32 *reg = PULL_REG(pin); in pinmux_set_pullupdown() local
206 u32 *reg = TRI_REG(pin); in pinmux_set_tristate() local
234 u32 *reg = REG(pin); in pinmux_set_io() local
256 u32 *reg = REG(pin); in pinmux_set_lock() local
283 u32 *reg = REG(pin); in pinmux_set_od() local
308 u32 *reg = REG(pin); in pinmux_set_ioreset() local
333 u32 *reg = REG(pin); in pinmux_set_rcv_sel() local
[all …]
/third_party/uboot/u-boot-2020.01/board/freescale/t104xrdb/
Dcpld.c19 u8 cpld_read(unsigned int reg) in cpld_read()
26 void cpld_write(unsigned int reg, u8 value) in cpld_write()
38 u8 reg = CPLD_READ(flash_ctl_status); in cpld_set_altbank() local
51 u8 reg = CPLD_READ(flash_ctl_status); in cpld_set_defbank() local

12345678910>>...49