1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
11 #ifndef _ASM_X86_KVM_HOST_H
12 #define _ASM_X86_KVM_HOST_H
13
14 #include <linux/types.h>
15 #include <linux/mm.h>
16 #include <linux/mmu_notifier.h>
17 #include <linux/tracepoint.h>
18 #include <linux/cpumask.h>
19 #include <linux/irq_work.h>
20 #include <linux/irq.h>
21
22 #include <linux/kvm.h>
23 #include <linux/kvm_para.h>
24 #include <linux/kvm_types.h>
25 #include <linux/perf_event.h>
26 #include <linux/pvclock_gtod.h>
27 #include <linux/clocksource.h>
28 #include <linux/irqbypass.h>
29 #include <linux/hyperv.h>
30
31 #include <asm/apic.h>
32 #include <asm/pvclock-abi.h>
33 #include <asm/desc.h>
34 #include <asm/mtrr.h>
35 #include <asm/msr-index.h>
36 #include <asm/asm.h>
37 #include <asm/kvm_page_track.h>
38 #include <asm/hyperv-tlfs.h>
39
40 #define KVM_MAX_VCPUS 288
41 #define KVM_SOFT_MAX_VCPUS 240
42 #define KVM_MAX_VCPU_ID 1023
43 #define KVM_USER_MEM_SLOTS 509
44 /* memory slots that are not exposed to userspace */
45 #define KVM_PRIVATE_MEM_SLOTS 3
46 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
47
48 #define KVM_HALT_POLL_NS_DEFAULT 200000
49
50 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
51
52 /* x86-specific vcpu->requests bit members */
53 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
54 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
55 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
56 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
57 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
58 #define KVM_REQ_LOAD_CR3 KVM_ARCH_REQ(5)
59 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
60 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
61 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
62 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
63 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
64 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
65 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
66 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
67 #define KVM_REQ_MCLOCK_INPROGRESS \
68 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
69 #define KVM_REQ_SCAN_IOAPIC \
70 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
71 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
72 #define KVM_REQ_APIC_PAGE_RELOAD \
73 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
74 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
75 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
76 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
77 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
78 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
79 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
80 #define KVM_REQ_GET_VMCS12_PAGES KVM_ARCH_REQ(24)
81
82 #define CR0_RESERVED_BITS \
83 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
84 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
85 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
86
87 #define CR4_RESERVED_BITS \
88 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
89 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
90 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
91 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
92 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
93 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
94
95 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
96
97
98
99 #define INVALID_PAGE (~(hpa_t)0)
100 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
101
102 #define UNMAPPED_GVA (~(gpa_t)0)
103
104 /* KVM Hugepage definitions for x86 */
105 #define KVM_NR_PAGE_SIZES 3
106 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
107 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
108 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
109 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
110 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
111
gfn_to_index(gfn_t gfn,gfn_t base_gfn,int level)112 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
113 {
114 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
115 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
116 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
117 }
118
119 #define KVM_PERMILLE_MMU_PAGES 20
120 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
121 #define KVM_MMU_HASH_SHIFT 12
122 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
123 #define KVM_MIN_FREE_MMU_PAGES 5
124 #define KVM_REFILL_PAGES 25
125 #define KVM_MAX_CPUID_ENTRIES 80
126 #define KVM_NR_FIXED_MTRR_REGION 88
127 #define KVM_NR_VAR_MTRR 8
128
129 #define ASYNC_PF_PER_VCPU 64
130
131 enum kvm_reg {
132 VCPU_REGS_RAX = 0,
133 VCPU_REGS_RCX = 1,
134 VCPU_REGS_RDX = 2,
135 VCPU_REGS_RBX = 3,
136 VCPU_REGS_RSP = 4,
137 VCPU_REGS_RBP = 5,
138 VCPU_REGS_RSI = 6,
139 VCPU_REGS_RDI = 7,
140 #ifdef CONFIG_X86_64
141 VCPU_REGS_R8 = 8,
142 VCPU_REGS_R9 = 9,
143 VCPU_REGS_R10 = 10,
144 VCPU_REGS_R11 = 11,
145 VCPU_REGS_R12 = 12,
146 VCPU_REGS_R13 = 13,
147 VCPU_REGS_R14 = 14,
148 VCPU_REGS_R15 = 15,
149 #endif
150 VCPU_REGS_RIP,
151 NR_VCPU_REGS
152 };
153
154 enum kvm_reg_ex {
155 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
156 VCPU_EXREG_CR3,
157 VCPU_EXREG_RFLAGS,
158 VCPU_EXREG_SEGMENTS,
159 };
160
161 enum {
162 VCPU_SREG_ES,
163 VCPU_SREG_CS,
164 VCPU_SREG_SS,
165 VCPU_SREG_DS,
166 VCPU_SREG_FS,
167 VCPU_SREG_GS,
168 VCPU_SREG_TR,
169 VCPU_SREG_LDTR,
170 };
171
172 #include <asm/kvm_emulate.h>
173
174 #define KVM_NR_MEM_OBJS 40
175
176 #define KVM_NR_DB_REGS 4
177
178 #define DR6_BD (1 << 13)
179 #define DR6_BS (1 << 14)
180 #define DR6_BT (1 << 15)
181 #define DR6_RTM (1 << 16)
182 #define DR6_FIXED_1 0xfffe0ff0
183 #define DR6_INIT 0xffff0ff0
184 #define DR6_VOLATILE 0x0001e00f
185
186 #define DR7_BP_EN_MASK 0x000000ff
187 #define DR7_GE (1 << 9)
188 #define DR7_GD (1 << 13)
189 #define DR7_FIXED_1 0x00000400
190 #define DR7_VOLATILE 0xffff2bff
191
192 #define PFERR_PRESENT_BIT 0
193 #define PFERR_WRITE_BIT 1
194 #define PFERR_USER_BIT 2
195 #define PFERR_RSVD_BIT 3
196 #define PFERR_FETCH_BIT 4
197 #define PFERR_PK_BIT 5
198 #define PFERR_GUEST_FINAL_BIT 32
199 #define PFERR_GUEST_PAGE_BIT 33
200
201 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
202 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
203 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
204 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
205 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
206 #define PFERR_PK_MASK (1U << PFERR_PK_BIT)
207 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
208 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
209
210 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
211 PFERR_WRITE_MASK | \
212 PFERR_PRESENT_MASK)
213
214 /*
215 * The mask used to denote special SPTEs, which can be either MMIO SPTEs or
216 * Access Tracking SPTEs. We use bit 62 instead of bit 63 to avoid conflicting
217 * with the SVE bit in EPT PTEs.
218 */
219 #define SPTE_SPECIAL_MASK (1ULL << 62)
220
221 /* apic attention bits */
222 #define KVM_APIC_CHECK_VAPIC 0
223 /*
224 * The following bit is set with PV-EOI, unset on EOI.
225 * We detect PV-EOI changes by guest by comparing
226 * this bit with PV-EOI in guest memory.
227 * See the implementation in apic_update_pv_eoi.
228 */
229 #define KVM_APIC_PV_EOI_PENDING 1
230
231 struct kvm_kernel_irq_routing_entry;
232
233 /*
234 * We don't want allocation failures within the mmu code, so we preallocate
235 * enough memory for a single page fault in a cache.
236 */
237 struct kvm_mmu_memory_cache {
238 int nobjs;
239 void *objects[KVM_NR_MEM_OBJS];
240 };
241
242 /*
243 * the pages used as guest page table on soft mmu are tracked by
244 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used
245 * by indirect shadow page can not be more than 15 bits.
246 *
247 * Currently, we used 14 bits that are @level, @cr4_pae, @quadrant, @access,
248 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp.
249 */
250 union kvm_mmu_page_role {
251 unsigned word;
252 struct {
253 unsigned level:4;
254 unsigned cr4_pae:1;
255 unsigned quadrant:2;
256 unsigned direct:1;
257 unsigned access:3;
258 unsigned invalid:1;
259 unsigned nxe:1;
260 unsigned cr0_wp:1;
261 unsigned smep_andnot_wp:1;
262 unsigned smap_andnot_wp:1;
263 unsigned ad_disabled:1;
264 unsigned guest_mode:1;
265 unsigned :6;
266
267 /*
268 * This is left at the top of the word so that
269 * kvm_memslots_for_spte_role can extract it with a
270 * simple shift. While there is room, give it a whole
271 * byte so it is also faster to load it from memory.
272 */
273 unsigned smm:8;
274 };
275 };
276
277 struct kvm_rmap_head {
278 unsigned long val;
279 };
280
281 struct kvm_mmu_page {
282 struct list_head link;
283 struct hlist_node hash_link;
284 struct list_head lpage_disallowed_link;
285
286 /*
287 * The following two entries are used to key the shadow page in the
288 * hash table.
289 */
290 gfn_t gfn;
291 union kvm_mmu_page_role role;
292
293 u64 *spt;
294 /* hold the gfn of each spte inside spt */
295 gfn_t *gfns;
296 bool unsync;
297 bool lpage_disallowed; /* Can't be replaced by an equiv large page */
298 int root_count; /* Currently serving as active root */
299 unsigned int unsync_children;
300 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */
301
302 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */
303 unsigned long mmu_valid_gen;
304
305 DECLARE_BITMAP(unsync_child_bitmap, 512);
306
307 #ifdef CONFIG_X86_32
308 /*
309 * Used out of the mmu-lock to avoid reading spte values while an
310 * update is in progress; see the comments in __get_spte_lockless().
311 */
312 int clear_spte_count;
313 #endif
314
315 /* Number of writes since the last time traversal visited this page. */
316 atomic_t write_flooding_count;
317 };
318
319 struct kvm_pio_request {
320 unsigned long linear_rip;
321 unsigned long count;
322 int in;
323 int port;
324 int size;
325 };
326
327 #define PT64_ROOT_MAX_LEVEL 5
328
329 struct rsvd_bits_validate {
330 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
331 u64 bad_mt_xwr;
332 };
333
334 struct kvm_mmu_root_info {
335 gpa_t cr3;
336 hpa_t hpa;
337 };
338
339 #define KVM_MMU_ROOT_INFO_INVALID \
340 ((struct kvm_mmu_root_info) { .cr3 = INVALID_PAGE, .hpa = INVALID_PAGE })
341
342 #define KVM_MMU_NUM_PREV_ROOTS 3
343
344 /*
345 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
346 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
347 * current mmu mode.
348 */
349 struct kvm_mmu {
350 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
351 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
352 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
353 int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err,
354 bool prefault);
355 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
356 struct x86_exception *fault);
357 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa,
358 u32 access, struct x86_exception *exception);
359 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
360 struct x86_exception *exception);
361 int (*sync_page)(struct kvm_vcpu *vcpu,
362 struct kvm_mmu_page *sp);
363 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa);
364 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
365 u64 *spte, const void *pte);
366 hpa_t root_hpa;
367 union kvm_mmu_page_role base_role;
368 u8 root_level;
369 u8 shadow_root_level;
370 u8 ept_ad;
371 bool direct_map;
372 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
373
374 /*
375 * Bitmap; bit set = permission fault
376 * Byte index: page fault error code [4:1]
377 * Bit index: pte permissions in ACC_* format
378 */
379 u8 permissions[16];
380
381 /*
382 * The pkru_mask indicates if protection key checks are needed. It
383 * consists of 16 domains indexed by page fault error code bits [4:1],
384 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
385 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
386 */
387 u32 pkru_mask;
388
389 u64 *pae_root;
390 u64 *lm_root;
391
392 /*
393 * check zero bits on shadow page table entries, these
394 * bits include not only hardware reserved bits but also
395 * the bits spte never used.
396 */
397 struct rsvd_bits_validate shadow_zero_check;
398
399 struct rsvd_bits_validate guest_rsvd_check;
400
401 /* Can have large pages at levels 2..last_nonleaf_level-1. */
402 u8 last_nonleaf_level;
403
404 bool nx;
405
406 u64 pdptrs[4]; /* pae */
407 };
408
409 enum pmc_type {
410 KVM_PMC_GP = 0,
411 KVM_PMC_FIXED,
412 };
413
414 struct kvm_pmc {
415 enum pmc_type type;
416 u8 idx;
417 u64 counter;
418 u64 eventsel;
419 struct perf_event *perf_event;
420 struct kvm_vcpu *vcpu;
421 };
422
423 struct kvm_pmu {
424 unsigned nr_arch_gp_counters;
425 unsigned nr_arch_fixed_counters;
426 unsigned available_event_types;
427 u64 fixed_ctr_ctrl;
428 u64 global_ctrl;
429 u64 global_status;
430 u64 global_ovf_ctrl;
431 u64 counter_bitmask[2];
432 u64 global_ctrl_mask;
433 u64 reserved_bits;
434 u8 version;
435 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
436 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
437 struct irq_work irq_work;
438 u64 reprogram_pmi;
439 };
440
441 struct kvm_pmu_ops;
442
443 enum {
444 KVM_DEBUGREG_BP_ENABLED = 1,
445 KVM_DEBUGREG_WONT_EXIT = 2,
446 KVM_DEBUGREG_RELOAD = 4,
447 };
448
449 struct kvm_mtrr_range {
450 u64 base;
451 u64 mask;
452 struct list_head node;
453 };
454
455 struct kvm_mtrr {
456 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
457 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
458 u64 deftype;
459
460 struct list_head head;
461 };
462
463 /* Hyper-V SynIC timer */
464 struct kvm_vcpu_hv_stimer {
465 struct hrtimer timer;
466 int index;
467 u64 config;
468 u64 count;
469 u64 exp_time;
470 struct hv_message msg;
471 bool msg_pending;
472 };
473
474 /* Hyper-V synthetic interrupt controller (SynIC)*/
475 struct kvm_vcpu_hv_synic {
476 u64 version;
477 u64 control;
478 u64 msg_page;
479 u64 evt_page;
480 atomic64_t sint[HV_SYNIC_SINT_COUNT];
481 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
482 DECLARE_BITMAP(auto_eoi_bitmap, 256);
483 DECLARE_BITMAP(vec_bitmap, 256);
484 bool active;
485 bool dont_zero_synic_pages;
486 };
487
488 /* Hyper-V per vcpu emulation context */
489 struct kvm_vcpu_hv {
490 u32 vp_index;
491 u64 hv_vapic;
492 s64 runtime_offset;
493 struct kvm_vcpu_hv_synic synic;
494 struct kvm_hyperv_exit exit;
495 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
496 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
497 cpumask_t tlb_lush;
498 };
499
500 struct kvm_vcpu_arch {
501 /*
502 * rip and regs accesses must go through
503 * kvm_{register,rip}_{read,write} functions.
504 */
505 unsigned long regs[NR_VCPU_REGS];
506 u32 regs_avail;
507 u32 regs_dirty;
508
509 unsigned long cr0;
510 unsigned long cr0_guest_owned_bits;
511 unsigned long cr2;
512 unsigned long cr3;
513 unsigned long cr4;
514 unsigned long cr4_guest_owned_bits;
515 unsigned long cr8;
516 u32 pkru;
517 u32 hflags;
518 u64 efer;
519 u64 apic_base;
520 struct kvm_lapic *apic; /* kernel irqchip context */
521 bool apicv_active;
522 bool load_eoi_exitmap_pending;
523 DECLARE_BITMAP(ioapic_handled_vectors, 256);
524 unsigned long apic_attention;
525 int32_t apic_arb_prio;
526 int mp_state;
527 u64 ia32_misc_enable_msr;
528 u64 smbase;
529 u64 smi_count;
530 bool tpr_access_reporting;
531 u64 ia32_xss;
532 u64 microcode_version;
533 u64 arch_capabilities;
534
535 /*
536 * Paging state of the vcpu
537 *
538 * If the vcpu runs in guest mode with two level paging this still saves
539 * the paging mode of the l1 guest. This context is always used to
540 * handle faults.
541 */
542 struct kvm_mmu mmu;
543
544 /*
545 * Paging state of an L2 guest (used for nested npt)
546 *
547 * This context will save all necessary information to walk page tables
548 * of the an L2 guest. This context is only initialized for page table
549 * walking and not for faulting since we never handle l2 page faults on
550 * the host.
551 */
552 struct kvm_mmu nested_mmu;
553
554 /*
555 * Pointer to the mmu context currently used for
556 * gva_to_gpa translations.
557 */
558 struct kvm_mmu *walk_mmu;
559
560 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
561 struct kvm_mmu_memory_cache mmu_page_cache;
562 struct kvm_mmu_memory_cache mmu_page_header_cache;
563
564 /*
565 * QEMU userspace and the guest each have their own FPU state.
566 * In vcpu_run, we switch between the user and guest FPU contexts.
567 * While running a VCPU, the VCPU thread will have the guest FPU
568 * context.
569 *
570 * Note that while the PKRU state lives inside the fpu registers,
571 * it is switched out separately at VMENTER and VMEXIT time. The
572 * "guest_fpu" state here contains the guest FPU context, with the
573 * host PRKU bits.
574 */
575 struct fpu user_fpu;
576 struct fpu guest_fpu;
577
578 u64 xcr0;
579 u64 guest_supported_xcr0;
580 u32 guest_xstate_size;
581
582 struct kvm_pio_request pio;
583 void *pio_data;
584
585 u8 event_exit_inst_len;
586
587 struct kvm_queued_exception {
588 bool pending;
589 bool injected;
590 bool has_error_code;
591 u8 nr;
592 u32 error_code;
593 u8 nested_apf;
594 } exception;
595
596 struct kvm_queued_interrupt {
597 bool injected;
598 bool soft;
599 u8 nr;
600 } interrupt;
601
602 int halt_request; /* real mode on Intel only */
603
604 int cpuid_nent;
605 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
606
607 int maxphyaddr;
608
609 /* emulate context */
610
611 struct x86_emulate_ctxt emulate_ctxt;
612 bool emulate_regs_need_sync_to_vcpu;
613 bool emulate_regs_need_sync_from_vcpu;
614 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
615
616 gpa_t time;
617 struct pvclock_vcpu_time_info hv_clock;
618 unsigned int hw_tsc_khz;
619 struct gfn_to_hva_cache pv_time;
620 bool pv_time_enabled;
621 /* set guest stopped flag in pvclock flags field */
622 bool pvclock_set_guest_stopped_request;
623
624 struct {
625 u8 preempted;
626 u64 msr_val;
627 u64 last_steal;
628 struct gfn_to_pfn_cache cache;
629 } st;
630
631 u64 tsc_offset;
632 u64 last_guest_tsc;
633 u64 last_host_tsc;
634 u64 tsc_offset_adjustment;
635 u64 this_tsc_nsec;
636 u64 this_tsc_write;
637 u64 this_tsc_generation;
638 bool tsc_catchup;
639 bool tsc_always_catchup;
640 s8 virtual_tsc_shift;
641 u32 virtual_tsc_mult;
642 u32 virtual_tsc_khz;
643 s64 ia32_tsc_adjust_msr;
644 u64 tsc_scaling_ratio;
645
646 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
647 unsigned nmi_pending; /* NMI queued after currently running handler */
648 bool nmi_injected; /* Trying to inject an NMI this entry */
649 bool smi_pending; /* SMI queued after currently running handler */
650
651 struct kvm_mtrr mtrr_state;
652 u64 pat;
653
654 unsigned switch_db_regs;
655 unsigned long db[KVM_NR_DB_REGS];
656 unsigned long dr6;
657 unsigned long dr7;
658 unsigned long eff_db[KVM_NR_DB_REGS];
659 unsigned long guest_debug_dr7;
660 u64 msr_platform_info;
661 u64 msr_misc_features_enables;
662
663 u64 mcg_cap;
664 u64 mcg_status;
665 u64 mcg_ctl;
666 u64 mcg_ext_ctl;
667 u64 *mce_banks;
668
669 /* Cache MMIO info */
670 u64 mmio_gva;
671 unsigned access;
672 gfn_t mmio_gfn;
673 u64 mmio_gen;
674
675 struct kvm_pmu pmu;
676
677 /* used for guest single stepping over the given code position */
678 unsigned long singlestep_rip;
679
680 struct kvm_vcpu_hv hyperv;
681
682 cpumask_var_t wbinvd_dirty_mask;
683
684 unsigned long last_retry_eip;
685 unsigned long last_retry_addr;
686
687 struct {
688 bool halted;
689 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
690 struct gfn_to_hva_cache data;
691 u64 msr_val;
692 u32 id;
693 bool send_user_only;
694 u32 host_apf_reason;
695 unsigned long nested_apf_token;
696 bool delivery_as_pf_vmexit;
697 } apf;
698
699 /* OSVW MSRs (AMD only) */
700 struct {
701 u64 length;
702 u64 status;
703 } osvw;
704
705 struct {
706 u64 msr_val;
707 struct gfn_to_hva_cache data;
708 } pv_eoi;
709
710 /*
711 * Indicate whether the access faults on its page table in guest
712 * which is set when fix page fault and used to detect unhandeable
713 * instruction.
714 */
715 bool write_fault_to_shadow_pgtable;
716
717 /* set at EPT violation at this point */
718 unsigned long exit_qualification;
719
720 /* pv related host specific info */
721 struct {
722 bool pv_unhalted;
723 } pv;
724
725 int pending_ioapic_eoi;
726 int pending_external_vector;
727
728 /* GPA available */
729 bool gpa_available;
730 gpa_t gpa_val;
731
732 /* be preempted when it's in kernel-mode(cpl=0) */
733 bool preempted_in_kernel;
734
735 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
736 bool l1tf_flush_l1d;
737 };
738
739 struct kvm_lpage_info {
740 int disallow_lpage;
741 };
742
743 struct kvm_arch_memory_slot {
744 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
745 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
746 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
747 };
748
749 /*
750 * We use as the mode the number of bits allocated in the LDR for the
751 * logical processor ID. It happens that these are all powers of two.
752 * This makes it is very easy to detect cases where the APICs are
753 * configured for multiple modes; in that case, we cannot use the map and
754 * hence cannot use kvm_irq_delivery_to_apic_fast either.
755 */
756 #define KVM_APIC_MODE_XAPIC_CLUSTER 4
757 #define KVM_APIC_MODE_XAPIC_FLAT 8
758 #define KVM_APIC_MODE_X2APIC 16
759
760 struct kvm_apic_map {
761 struct rcu_head rcu;
762 u8 mode;
763 u32 max_apic_id;
764 union {
765 struct kvm_lapic *xapic_flat_map[8];
766 struct kvm_lapic *xapic_cluster_map[16][4];
767 };
768 struct kvm_lapic *phys_map[];
769 };
770
771 /* Hyper-V emulation context */
772 struct kvm_hv {
773 struct mutex hv_lock;
774 u64 hv_guest_os_id;
775 u64 hv_hypercall;
776 u64 hv_tsc_page;
777
778 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
779 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
780 u64 hv_crash_ctl;
781
782 HV_REFERENCE_TSC_PAGE tsc_ref;
783
784 struct idr conn_to_evt;
785
786 u64 hv_reenlightenment_control;
787 u64 hv_tsc_emulation_control;
788 u64 hv_tsc_emulation_status;
789
790 /* How many vCPUs have VP index != vCPU index */
791 atomic_t num_mismatched_vp_indexes;
792 };
793
794 enum kvm_irqchip_mode {
795 KVM_IRQCHIP_NONE,
796 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
797 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
798 };
799
800 struct kvm_arch {
801 unsigned long n_used_mmu_pages;
802 unsigned long n_requested_mmu_pages;
803 unsigned long n_max_mmu_pages;
804 unsigned int indirect_shadow_pages;
805 unsigned long mmu_valid_gen;
806 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
807 /*
808 * Hash table of struct kvm_mmu_page.
809 */
810 struct list_head active_mmu_pages;
811 struct list_head zapped_obsolete_pages;
812 struct list_head lpage_disallowed_mmu_pages;
813 struct kvm_page_track_notifier_node mmu_sp_tracker;
814 struct kvm_page_track_notifier_head track_notifier_head;
815
816 struct list_head assigned_dev_head;
817 struct iommu_domain *iommu_domain;
818 bool iommu_noncoherent;
819 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
820 atomic_t noncoherent_dma_count;
821 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
822 atomic_t assigned_device_count;
823 struct kvm_pic *vpic;
824 struct kvm_ioapic *vioapic;
825 struct kvm_pit *vpit;
826 atomic_t vapics_in_nmi_mode;
827 struct mutex apic_map_lock;
828 struct kvm_apic_map *apic_map;
829
830 bool apic_access_page_done;
831
832 gpa_t wall_clock;
833
834 bool mwait_in_guest;
835 bool hlt_in_guest;
836 bool pause_in_guest;
837
838 unsigned long irq_sources_bitmap;
839 s64 kvmclock_offset;
840 raw_spinlock_t tsc_write_lock;
841 u64 last_tsc_nsec;
842 u64 last_tsc_write;
843 u32 last_tsc_khz;
844 u64 cur_tsc_nsec;
845 u64 cur_tsc_write;
846 u64 cur_tsc_offset;
847 u64 cur_tsc_generation;
848 int nr_vcpus_matched_tsc;
849
850 spinlock_t pvclock_gtod_sync_lock;
851 bool use_master_clock;
852 u64 master_kernel_ns;
853 u64 master_cycle_now;
854 struct delayed_work kvmclock_update_work;
855 struct delayed_work kvmclock_sync_work;
856
857 struct kvm_xen_hvm_config xen_hvm_config;
858
859 /* reads protected by irq_srcu, writes by irq_lock */
860 struct hlist_head mask_notifier_list;
861
862 struct kvm_hv hyperv;
863
864 #ifdef CONFIG_KVM_MMU_AUDIT
865 int audit_point;
866 #endif
867
868 bool backwards_tsc_observed;
869 bool boot_vcpu_runs_old_kvmclock;
870 u32 bsp_vcpu_id;
871
872 u64 disabled_quirks;
873
874 enum kvm_irqchip_mode irqchip_mode;
875 u8 nr_reserved_ioapic_pins;
876
877 bool disabled_lapic_found;
878
879 bool x2apic_format;
880 bool x2apic_broadcast_quirk_disabled;
881
882 bool guest_can_read_msr_platform_info;
883
884 struct task_struct *nx_lpage_recovery_thread;
885 };
886
887 struct kvm_vm_stat {
888 ulong mmu_shadow_zapped;
889 ulong mmu_pte_write;
890 ulong mmu_pte_updated;
891 ulong mmu_pde_zapped;
892 ulong mmu_flooded;
893 ulong mmu_recycled;
894 ulong mmu_cache_miss;
895 ulong mmu_unsync;
896 ulong remote_tlb_flush;
897 ulong lpages;
898 ulong nx_lpage_splits;
899 ulong max_mmu_page_hash_collisions;
900 };
901
902 struct kvm_vcpu_stat {
903 u64 pf_fixed;
904 u64 pf_guest;
905 u64 tlb_flush;
906 u64 invlpg;
907
908 u64 exits;
909 u64 io_exits;
910 u64 mmio_exits;
911 u64 signal_exits;
912 u64 irq_window_exits;
913 u64 nmi_window_exits;
914 u64 l1d_flush;
915 u64 halt_exits;
916 u64 halt_successful_poll;
917 u64 halt_attempted_poll;
918 u64 halt_poll_invalid;
919 u64 halt_wakeup;
920 u64 request_irq_exits;
921 u64 irq_exits;
922 u64 host_state_reload;
923 u64 fpu_reload;
924 u64 insn_emulation;
925 u64 insn_emulation_fail;
926 u64 hypercalls;
927 u64 irq_injections;
928 u64 nmi_injections;
929 u64 req_event;
930 };
931
932 struct x86_instruction_info;
933
934 struct msr_data {
935 bool host_initiated;
936 u32 index;
937 u64 data;
938 };
939
940 struct kvm_lapic_irq {
941 u32 vector;
942 u16 delivery_mode;
943 u16 dest_mode;
944 bool level;
945 u16 trig_mode;
946 u32 shorthand;
947 u32 dest_id;
948 bool msi_redir_hint;
949 };
950
951 struct kvm_x86_ops {
952 int (*cpu_has_kvm_support)(void); /* __init */
953 int (*disabled_by_bios)(void); /* __init */
954 int (*hardware_enable)(void);
955 void (*hardware_disable)(void);
956 void (*check_processor_compatibility)(void *rtn);
957 int (*hardware_setup)(void); /* __init */
958 void (*hardware_unsetup)(void); /* __exit */
959 bool (*cpu_has_accelerated_tpr)(void);
960 bool (*has_emulated_msr)(int index);
961 void (*cpuid_update)(struct kvm_vcpu *vcpu);
962
963 struct kvm *(*vm_alloc)(void);
964 void (*vm_free)(struct kvm *);
965 int (*vm_init)(struct kvm *kvm);
966 void (*vm_destroy)(struct kvm *kvm);
967
968 /* Create, but do not attach this VCPU */
969 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
970 void (*vcpu_free)(struct kvm_vcpu *vcpu);
971 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
972
973 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
974 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
975 void (*vcpu_put)(struct kvm_vcpu *vcpu);
976
977 void (*update_bp_intercept)(struct kvm_vcpu *vcpu);
978 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
979 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
980 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
981 void (*get_segment)(struct kvm_vcpu *vcpu,
982 struct kvm_segment *var, int seg);
983 int (*get_cpl)(struct kvm_vcpu *vcpu);
984 void (*set_segment)(struct kvm_vcpu *vcpu,
985 struct kvm_segment *var, int seg);
986 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
987 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
988 void (*decache_cr3)(struct kvm_vcpu *vcpu);
989 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
990 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
991 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
992 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
993 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
994 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
995 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
996 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
997 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
998 u64 (*get_dr6)(struct kvm_vcpu *vcpu);
999 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
1000 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1001 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1002 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1003 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1004 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1005
1006 void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa);
1007 int (*tlb_remote_flush)(struct kvm *kvm);
1008
1009 /*
1010 * Flush any TLB entries associated with the given GVA.
1011 * Does not need to flush GPA->HPA mappings.
1012 * Can potentially get non-canonical addresses through INVLPGs, which
1013 * the implementation may choose to ignore if appropriate.
1014 */
1015 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1016
1017 void (*run)(struct kvm_vcpu *vcpu);
1018 int (*handle_exit)(struct kvm_vcpu *vcpu);
1019 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1020 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1021 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1022 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1023 unsigned char *hypercall_addr);
1024 void (*set_irq)(struct kvm_vcpu *vcpu);
1025 void (*set_nmi)(struct kvm_vcpu *vcpu);
1026 void (*queue_exception)(struct kvm_vcpu *vcpu);
1027 void (*cancel_injection)(struct kvm_vcpu *vcpu);
1028 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
1029 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
1030 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1031 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1032 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1033 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1034 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1035 bool (*get_enable_apicv)(struct kvm_vcpu *vcpu);
1036 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1037 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1038 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
1039 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1040 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1041 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1042 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
1043 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
1044 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1045 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1046 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1047 int (*get_tdp_level)(struct kvm_vcpu *vcpu);
1048 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1049 int (*get_lpage_level)(void);
1050 bool (*rdtscp_supported)(void);
1051 bool (*invpcid_supported)(void);
1052
1053 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1054
1055 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
1056
1057 bool (*has_wbinvd_exit)(void);
1058
1059 u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu);
1060 /* Returns actual tsc_offset set in active VMCS */
1061 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
1062
1063 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
1064
1065 int (*check_intercept)(struct kvm_vcpu *vcpu,
1066 struct x86_instruction_info *info,
1067 enum x86_intercept_stage stage);
1068 void (*handle_external_intr)(struct kvm_vcpu *vcpu);
1069 bool (*mpx_supported)(void);
1070 bool (*xsaves_supported)(void);
1071 bool (*umip_emulated)(void);
1072
1073 int (*check_nested_events)(struct kvm_vcpu *vcpu);
1074 void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
1075
1076 void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
1077
1078 /*
1079 * Arch-specific dirty logging hooks. These hooks are only supposed to
1080 * be valid if the specific arch has hardware-accelerated dirty logging
1081 * mechanism. Currently only for PML on VMX.
1082 *
1083 * - slot_enable_log_dirty:
1084 * called when enabling log dirty mode for the slot.
1085 * - slot_disable_log_dirty:
1086 * called when disabling log dirty mode for the slot.
1087 * also called when slot is created with log dirty disabled.
1088 * - flush_log_dirty:
1089 * called before reporting dirty_bitmap to userspace.
1090 * - enable_log_dirty_pt_masked:
1091 * called when reenabling log dirty for the GFNs in the mask after
1092 * corresponding bits are cleared in slot->dirty_bitmap.
1093 */
1094 void (*slot_enable_log_dirty)(struct kvm *kvm,
1095 struct kvm_memory_slot *slot);
1096 void (*slot_disable_log_dirty)(struct kvm *kvm,
1097 struct kvm_memory_slot *slot);
1098 void (*flush_log_dirty)(struct kvm *kvm);
1099 void (*enable_log_dirty_pt_masked)(struct kvm *kvm,
1100 struct kvm_memory_slot *slot,
1101 gfn_t offset, unsigned long mask);
1102 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa);
1103
1104 /* pmu operations of sub-arch */
1105 const struct kvm_pmu_ops *pmu_ops;
1106
1107 /*
1108 * Architecture specific hooks for vCPU blocking due to
1109 * HLT instruction.
1110 * Returns for .pre_block():
1111 * - 0 means continue to block the vCPU.
1112 * - 1 means we cannot block the vCPU since some event
1113 * happens during this period, such as, 'ON' bit in
1114 * posted-interrupts descriptor is set.
1115 */
1116 int (*pre_block)(struct kvm_vcpu *vcpu);
1117 void (*post_block)(struct kvm_vcpu *vcpu);
1118
1119 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1120 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1121
1122 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq,
1123 uint32_t guest_irq, bool set);
1124 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1125 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1126
1127 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc);
1128 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1129
1130 void (*setup_mce)(struct kvm_vcpu *vcpu);
1131
1132 int (*get_nested_state)(struct kvm_vcpu *vcpu,
1133 struct kvm_nested_state __user *user_kvm_nested_state,
1134 unsigned user_data_size);
1135 int (*set_nested_state)(struct kvm_vcpu *vcpu,
1136 struct kvm_nested_state __user *user_kvm_nested_state,
1137 struct kvm_nested_state *kvm_state);
1138 void (*get_vmcs12_pages)(struct kvm_vcpu *vcpu);
1139
1140 int (*smi_allowed)(struct kvm_vcpu *vcpu);
1141 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate);
1142 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, u64 smbase);
1143 int (*enable_smi_window)(struct kvm_vcpu *vcpu);
1144
1145 int (*mem_enc_op)(struct kvm *kvm, void __user *argp);
1146 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1147 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1148
1149 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1150 };
1151
1152 struct kvm_arch_async_pf {
1153 u32 token;
1154 gfn_t gfn;
1155 unsigned long cr3;
1156 bool direct_map;
1157 };
1158
1159 extern struct kvm_x86_ops *kvm_x86_ops;
1160
1161 #define __KVM_HAVE_ARCH_VM_ALLOC
kvm_arch_alloc_vm(void)1162 static inline struct kvm *kvm_arch_alloc_vm(void)
1163 {
1164 return kvm_x86_ops->vm_alloc();
1165 }
1166
kvm_arch_free_vm(struct kvm * kvm)1167 static inline void kvm_arch_free_vm(struct kvm *kvm)
1168 {
1169 return kvm_x86_ops->vm_free(kvm);
1170 }
1171
1172 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB
kvm_arch_flush_remote_tlb(struct kvm * kvm)1173 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)
1174 {
1175 if (kvm_x86_ops->tlb_remote_flush &&
1176 !kvm_x86_ops->tlb_remote_flush(kvm))
1177 return 0;
1178 else
1179 return -ENOTSUPP;
1180 }
1181
1182 int kvm_mmu_module_init(void);
1183 void kvm_mmu_module_exit(void);
1184
1185 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1186 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1187 void kvm_mmu_setup(struct kvm_vcpu *vcpu);
1188 void kvm_mmu_init_vm(struct kvm *kvm);
1189 void kvm_mmu_uninit_vm(struct kvm *kvm);
1190 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
1191 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask,
1192 u64 acc_track_mask, u64 me_mask);
1193
1194 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1195 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1196 struct kvm_memory_slot *memslot);
1197 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1198 const struct kvm_memory_slot *memslot);
1199 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1200 struct kvm_memory_slot *memslot);
1201 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
1202 struct kvm_memory_slot *memslot);
1203 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
1204 struct kvm_memory_slot *memslot);
1205 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1206 struct kvm_memory_slot *slot,
1207 gfn_t gfn_offset, unsigned long mask);
1208 void kvm_mmu_zap_all(struct kvm *kvm);
1209 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1210 unsigned long kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
1211 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages);
1212
1213 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
1214 bool pdptrs_changed(struct kvm_vcpu *vcpu);
1215
1216 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1217 const void *val, int bytes);
1218
1219 struct kvm_irq_mask_notifier {
1220 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1221 int irq;
1222 struct hlist_node link;
1223 };
1224
1225 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1226 struct kvm_irq_mask_notifier *kimn);
1227 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1228 struct kvm_irq_mask_notifier *kimn);
1229 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1230 bool mask);
1231
1232 extern bool tdp_enabled;
1233
1234 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1235
1236 /* control of guest tsc rate supported? */
1237 extern bool kvm_has_tsc_control;
1238 /* maximum supported tsc_khz for guests */
1239 extern u32 kvm_max_guest_tsc_khz;
1240 /* number of bits of the fractional part of the TSC scaling ratio */
1241 extern u8 kvm_tsc_scaling_ratio_frac_bits;
1242 /* maximum allowed value of TSC scaling ratio */
1243 extern u64 kvm_max_tsc_scaling_ratio;
1244 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */
1245 extern u64 kvm_default_tsc_scaling_ratio;
1246
1247 extern u64 kvm_mce_cap_supported;
1248
1249 enum emulation_result {
1250 EMULATE_DONE, /* no further processing */
1251 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */
1252 EMULATE_FAIL, /* can't emulate this instruction */
1253 };
1254
1255 #define EMULTYPE_NO_DECODE (1 << 0)
1256 #define EMULTYPE_TRAP_UD (1 << 1)
1257 #define EMULTYPE_SKIP (1 << 2)
1258 #define EMULTYPE_ALLOW_RETRY (1 << 3)
1259 #define EMULTYPE_NO_UD_ON_FAIL (1 << 4)
1260 #define EMULTYPE_VMWARE (1 << 5)
1261 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
1262 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
1263 void *insn, int insn_len);
1264
1265 void kvm_enable_efer_bits(u64);
1266 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1267 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
1268 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
1269
1270 struct x86_emulate_ctxt;
1271
1272 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
1273 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1274 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1275 int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
1276 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1277
1278 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1279 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1280 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1281
1282 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1283 int reason, bool has_error_code, u32 error_code);
1284
1285 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1286 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1287 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1288 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1289 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1290 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1291 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1292 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1293 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
1294 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
1295
1296 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1297 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1298
1299 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1300 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1301 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
1302
1303 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1304 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1305 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1306 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1307 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1308 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1309 gfn_t gfn, void *data, int offset, int len,
1310 u32 access);
1311 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1312 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1313
__kvm_irq_line_state(unsigned long * irq_state,int irq_source_id,int level)1314 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1315 int irq_source_id, int level)
1316 {
1317 /* Logical OR for level trig interrupt */
1318 if (level)
1319 __set_bit(irq_source_id, irq_state);
1320 else
1321 __clear_bit(irq_source_id, irq_state);
1322
1323 return !!(*irq_state);
1324 }
1325
1326 #define KVM_MMU_ROOT_CURRENT BIT(0)
1327 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
1328 #define KVM_MMU_ROOTS_ALL (~0UL)
1329
1330 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1331 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1332
1333 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1334
1335 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1336 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
1337 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
1338 int kvm_mmu_load(struct kvm_vcpu *vcpu);
1339 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
1340 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
1341 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, ulong roots_to_free);
1342 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1343 struct x86_exception *exception);
1344 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1345 struct x86_exception *exception);
1346 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1347 struct x86_exception *exception);
1348 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1349 struct x86_exception *exception);
1350 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1351 struct x86_exception *exception);
1352
1353 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu);
1354
1355 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1356
1357 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
1358 void *insn, int insn_len);
1359 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1360 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
1361 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush);
1362
1363 void kvm_enable_tdp(void);
1364 void kvm_disable_tdp(void);
1365
translate_gpa(struct kvm_vcpu * vcpu,gpa_t gpa,u32 access,struct x86_exception * exception)1366 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1367 struct x86_exception *exception)
1368 {
1369 return gpa;
1370 }
1371
page_header(hpa_t shadow_page)1372 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
1373 {
1374 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
1375
1376 return (struct kvm_mmu_page *)page_private(page);
1377 }
1378
kvm_read_ldt(void)1379 static inline u16 kvm_read_ldt(void)
1380 {
1381 u16 ldt;
1382 asm("sldt %0" : "=g"(ldt));
1383 return ldt;
1384 }
1385
kvm_load_ldt(u16 sel)1386 static inline void kvm_load_ldt(u16 sel)
1387 {
1388 asm("lldt %0" : : "rm"(sel));
1389 }
1390
1391 #ifdef CONFIG_X86_64
read_msr(unsigned long msr)1392 static inline unsigned long read_msr(unsigned long msr)
1393 {
1394 u64 value;
1395
1396 rdmsrl(msr, value);
1397 return value;
1398 }
1399 #endif
1400
get_rdx_init_val(void)1401 static inline u32 get_rdx_init_val(void)
1402 {
1403 return 0x600; /* P6 family */
1404 }
1405
kvm_inject_gp(struct kvm_vcpu * vcpu,u32 error_code)1406 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1407 {
1408 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1409 }
1410
1411 #define TSS_IOPB_BASE_OFFSET 0x66
1412 #define TSS_BASE_SIZE 0x68
1413 #define TSS_IOPB_SIZE (65536 / 8)
1414 #define TSS_REDIRECTION_SIZE (256 / 8)
1415 #define RMODE_TSS_SIZE \
1416 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1417
1418 enum {
1419 TASK_SWITCH_CALL = 0,
1420 TASK_SWITCH_IRET = 1,
1421 TASK_SWITCH_JMP = 2,
1422 TASK_SWITCH_GATE = 3,
1423 };
1424
1425 #define HF_GIF_MASK (1 << 0)
1426 #define HF_HIF_MASK (1 << 1)
1427 #define HF_VINTR_MASK (1 << 2)
1428 #define HF_NMI_MASK (1 << 3)
1429 #define HF_IRET_MASK (1 << 4)
1430 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
1431 #define HF_SMM_MASK (1 << 6)
1432 #define HF_SMM_INSIDE_NMI_MASK (1 << 7)
1433
1434 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1435 #define KVM_ADDRESS_SPACE_NUM 2
1436
1437 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1438 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1439
1440 asmlinkage void __noreturn kvm_spurious_fault(void);
1441
1442 /*
1443 * Hardware virtualization extension instructions may fault if a
1444 * reboot turns off virtualization while processes are running.
1445 * Usually after catching the fault we just panic; during reboot
1446 * instead the instruction is ignored.
1447 */
1448 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \
1449 "666: \n\t" \
1450 insn "\n\t" \
1451 "jmp 668f \n\t" \
1452 "667: \n\t" \
1453 "call kvm_spurious_fault \n\t" \
1454 "668: \n\t" \
1455 ".pushsection .fixup, \"ax\" \n\t" \
1456 "700: \n\t" \
1457 cleanup_insn "\n\t" \
1458 "cmpb $0, kvm_rebooting\n\t" \
1459 "je 667b \n\t" \
1460 "jmp 668b \n\t" \
1461 ".popsection \n\t" \
1462 _ASM_EXTABLE(666b, 700b)
1463
1464 #define __kvm_handle_fault_on_reboot(insn) \
1465 ____kvm_handle_fault_on_reboot(insn, "")
1466
1467 #define KVM_ARCH_WANT_MMU_NOTIFIER
1468 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end,
1469 bool blockable);
1470 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
1471 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1472 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1473 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1474 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1475 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1476 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1477 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1478 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1479
1480 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
1481 unsigned long ipi_bitmap_high, u32 min,
1482 unsigned long icr, int op_64_bit);
1483
1484 u64 kvm_get_arch_capabilities(void);
1485 void kvm_define_shared_msr(unsigned index, u32 msr);
1486 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1487
1488 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc);
1489 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
1490
1491 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1492 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1493
1494 void kvm_make_mclock_inprogress_request(struct kvm *kvm);
1495 void kvm_make_scan_ioapic_request(struct kvm *kvm);
1496
1497 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1498 struct kvm_async_pf *work);
1499 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1500 struct kvm_async_pf *work);
1501 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1502 struct kvm_async_pf *work);
1503 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1504 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1505
1506 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
1507 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1508 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
1509
1510 int kvm_is_in_guest(void);
1511
1512 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1513 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1514 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
1515 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
1516
1517 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
1518 struct kvm_vcpu **dest_vcpu);
1519
1520 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
1521 struct kvm_lapic_irq *irq);
1522
kvm_arch_vcpu_blocking(struct kvm_vcpu * vcpu)1523 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
1524 {
1525 if (kvm_x86_ops->vcpu_blocking)
1526 kvm_x86_ops->vcpu_blocking(vcpu);
1527 }
1528
kvm_arch_vcpu_unblocking(struct kvm_vcpu * vcpu)1529 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
1530 {
1531 if (kvm_x86_ops->vcpu_unblocking)
1532 kvm_x86_ops->vcpu_unblocking(vcpu);
1533 }
1534
kvm_arch_vcpu_block_finish(struct kvm_vcpu * vcpu)1535 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
1536
kvm_cpu_get_apicid(int mps_cpu)1537 static inline int kvm_cpu_get_apicid(int mps_cpu)
1538 {
1539 #ifdef CONFIG_X86_LOCAL_APIC
1540 return default_cpu_present_to_apicid(mps_cpu);
1541 #else
1542 WARN_ON_ONCE(1);
1543 return BAD_APICID;
1544 #endif
1545 }
1546
1547 #define put_smstate(type, buf, offset, val) \
1548 *(type *)((buf) + (offset) - 0x7e00) = val
1549
1550 #endif /* _ASM_X86_KVM_HOST_H */
1551