1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
4 */
5
6 #include <common.h>
7 #include <dm.h>
8 #include <dm/lists.h>
9 #include <dm/device-internal.h>
10 #include <dm/root.h>
11 #include <clk.h>
12 #include <errno.h>
13 #include <timer.h>
14
15 DECLARE_GLOBAL_DATA_PTR;
16
17 /*
18 * Implement a timer uclass to work with lib/time.c. The timer is usually
19 * a 32/64 bits free-running up counter. The get_rate() method is used to get
20 * the input clock frequency of the timer. The get_count() method is used
21 * to get the current 64 bits count value. If the hardware is counting down,
22 * the value should be inversed inside the method. There may be no real
23 * tick, and no timer interrupt.
24 */
25
timer_get_count(struct udevice * dev,u64 * count)26 int notrace timer_get_count(struct udevice *dev, u64 *count)
27 {
28 const struct timer_ops *ops = device_get_ops(dev);
29
30 if (!ops->get_count)
31 return -ENOSYS;
32
33 return ops->get_count(dev, count);
34 }
35
timer_get_rate(struct udevice * dev)36 unsigned long notrace timer_get_rate(struct udevice *dev)
37 {
38 struct timer_dev_priv *uc_priv = dev->uclass_priv;
39
40 return uc_priv->clock_rate;
41 }
42
timer_pre_probe(struct udevice * dev)43 static int timer_pre_probe(struct udevice *dev)
44 {
45 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
46 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
47 struct clk timer_clk;
48 int err;
49 ulong ret;
50
51 /* It is possible that a timer device has a null ofnode */
52 if (!dev_of_valid(dev))
53 return 0;
54
55 err = clk_get_by_index(dev, 0, &timer_clk);
56 if (!err) {
57 ret = clk_get_rate(&timer_clk);
58 if (IS_ERR_VALUE(ret))
59 return ret;
60 uc_priv->clock_rate = ret;
61 } else {
62 uc_priv->clock_rate =
63 dev_read_u32_default(dev, "clock-frequency", 0);
64 }
65 #endif
66
67 return 0;
68 }
69
timer_post_probe(struct udevice * dev)70 static int timer_post_probe(struct udevice *dev)
71 {
72 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
73
74 if (!uc_priv->clock_rate)
75 return -EINVAL;
76
77 return 0;
78 }
79
timer_conv_64(u32 count)80 u64 timer_conv_64(u32 count)
81 {
82 /* increment tbh if tbl has rolled over */
83 if (count < gd->timebase_l)
84 gd->timebase_h++;
85 gd->timebase_l = count;
86 return ((u64)gd->timebase_h << 32) | gd->timebase_l;
87 }
88
dm_timer_init(void)89 int notrace dm_timer_init(void)
90 {
91 struct udevice *dev = NULL;
92 __maybe_unused ofnode node;
93 int ret;
94
95 if (gd->timer)
96 return 0;
97
98 /*
99 * Directly access gd->dm_root to suppress error messages, if the
100 * virtual root driver does not yet exist.
101 */
102 if (gd->dm_root == NULL)
103 return -EAGAIN;
104
105 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
106 /* Check for a chosen timer to be used for tick */
107 node = ofnode_get_chosen_node("tick-timer");
108
109 if (ofnode_valid(node) &&
110 uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) {
111 /*
112 * If the timer is not marked to be bound before
113 * relocation, bind it anyway.
114 */
115 if (!lists_bind_fdt(dm_root(), node, &dev, false)) {
116 ret = device_probe(dev);
117 if (ret)
118 return ret;
119 }
120 }
121 #endif
122
123 if (!dev) {
124 /* Fall back to the first available timer */
125 ret = uclass_first_device_err(UCLASS_TIMER, &dev);
126 if (ret)
127 return ret;
128 }
129
130 if (dev) {
131 gd->timer = dev;
132 return 0;
133 }
134
135 return -ENODEV;
136 }
137
138 UCLASS_DRIVER(timer) = {
139 .id = UCLASS_TIMER,
140 .name = "timer",
141 .pre_probe = timer_pre_probe,
142 .flags = DM_UC_FLAG_SEQ_ALIAS,
143 .post_probe = timer_post_probe,
144 .per_device_auto_alloc_size = sizeof(struct timer_dev_priv),
145 };
146