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/kernel/linux/linux-5.10/drivers/media/platform/
Dimx-pxp.h13 #define HW_PXP_CTRL (0x00000000)
14 #define HW_PXP_CTRL_SET (0x00000004)
15 #define HW_PXP_CTRL_CLR (0x00000008)
16 #define HW_PXP_CTRL_TOG (0x0000000c)
18 #define BM_PXP_CTRL_SFTRST 0x80000000
19 #define BF_PXP_CTRL_SFTRST(v) \ argument
20 (((v) << 31) & BM_PXP_CTRL_SFTRST)
21 #define BM_PXP_CTRL_CLKGATE 0x40000000
22 #define BF_PXP_CTRL_CLKGATE(v) \ argument
23 (((v) << 30) & BM_PXP_CTRL_CLKGATE)
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_mode_vba_30.c64 #define BPP_INVALID 0
65 #define BPP_BLENDED_PIPE 0xffffffff
784 s = 0; in dscceComputeDelay()
796 if ((ix % w) == 0 && P != 0) in dscceComputeDelay()
799 lstall = 0; in dscceComputeDelay()
809 unsigned int Delay = 0; in dscComputeDelay()
815 Delay = Delay + 0; in dscComputeDelay()
860 Delay = Delay + 0; in dscComputeDelay()
947 unsigned int DPPCycles = 0, DISPCLKCycles = 0; in CalculatePrefetchSchedule()
948 double DSTTotalPixelsAfterScaler = 0; in CalculatePrefetchSchedule()
[all …]
/kernel/linux/linux-4.19/drivers/pinctrl/mvebu/
Dpinctrl-kirkwood.c23 #define V(f6180, f6190, f6192, f6281, f6282, dx4122) \ macro
24 ((f6180 << 0) | (f6190 << 1) | (f6192 << 2) | \
28 VARIANT_MV88F6180 = V(1, 0, 0, 0, 0, 0),
29 VARIANT_MV88F6190 = V(0, 1, 0, 0, 0, 0),
30 VARIANT_MV88F6192 = V(0, 0, 1, 0, 0, 0),
31 VARIANT_MV88F6281 = V(0, 0, 0, 1, 0, 0),
32 VARIANT_MV88F6282 = V(0, 0, 0, 0, 1, 0),
33 VARIANT_MV98DX4122 = V(0, 0, 0, 0, 0, 1),
37 MPP_MODE(0,
38 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1, 1)),
[all …]
/kernel/linux/linux-5.10/sound/soc/qcom/
Dlpass-lpaif-reg.h11 #define LPAIF_I2SCTL_REG_ADDR(v, addr, port) \ argument
12 (v->i2sctrl_reg_base + (addr) + v->i2sctrl_reg_stride * (port))
14 #define LPAIF_I2SCTL_REG(v, port) LPAIF_I2SCTL_REG_ADDR(v, 0x0, (port)) argument
16 #define LPAIF_I2SCTL_LOOPBACK_DISABLE 0
19 #define LPAIF_I2SCTL_SPKEN_DISABLE 0
22 #define LPAIF_I2SCTL_MODE_NONE 0
45 #define LPAIF_I2SCTL_SPKMONO_STEREO 0
48 #define LPAIF_I2SCTL_MICEN_DISABLE 0
53 #define LPAIF_I2SCTL_MICMONO_STEREO 0
56 #define LPAIF_I2SCTL_WSSRC_INTERNAL 0
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/mvebu/
Dpinctrl-kirkwood.c19 #define V(f6180, f6190, f6192, f6281, f6282, dx4122, dx1135) \ macro
20 ((f6180 << 0) | (f6190 << 1) | (f6192 << 2) | \
25 VARIANT_MV88F6180 = V(1, 0, 0, 0, 0, 0, 0),
26 VARIANT_MV88F6190 = V(0, 1, 0, 0, 0, 0, 0),
27 VARIANT_MV88F6192 = V(0, 0, 1, 0, 0, 0, 0),
28 VARIANT_MV88F6281 = V(0, 0, 0, 1, 0, 0, 0),
29 VARIANT_MV88F6282 = V(0, 0, 0, 0, 1, 0, 0),
30 VARIANT_MV98DX4122 = V(0, 0, 0, 0, 0, 1, 0),
31 VARIANT_MV98DX1135 = V(0, 0, 0, 0, 0, 0, 1),
35 MPP_MODE(0,
[all …]
/kernel/linux/linux-4.19/drivers/iio/adc/
Dstm32-dfsdm.h19 * | 0x000 | CHANNEL 0 + COMMON CHANNEL FIELDS |
21 * | 0x020 | CHANNEL 1 |
25 * | 0x0E0 | CHANNEL 7 |
27 * | 0x100 | FILTER 0 + COMMON FILTER FIELDs |
29 * | 0x200 | FILTER 1 |
31 * | 0x300 | FILTER 2 |
33 * | 0x400 | FILTER 3 |
40 #define DFSDM_CHCFGR1(y) ((y) * 0x20 + 0x00)
41 #define DFSDM_CHCFGR2(y) ((y) * 0x20 + 0x04)
42 #define DFSDM_AWSCDR(y) ((y) * 0x20 + 0x08)
[all …]
/kernel/linux/linux-5.10/drivers/iio/adc/
Dstm32-dfsdm.h19 * | 0x000 | CHANNEL 0 + COMMON CHANNEL FIELDS |
21 * | 0x020 | CHANNEL 1 |
25 * | 0x0E0 | CHANNEL 7 |
27 * | 0x100 | FILTER 0 + COMMON FILTER FIELDs |
29 * | 0x200 | FILTER 1 |
31 * | 0x300 | FILTER 2 |
33 * | 0x400 | FILTER 3 |
40 #define DFSDM_CHCFGR1(y) ((y) * 0x20 + 0x00)
41 #define DFSDM_CHCFGR2(y) ((y) * 0x20 + 0x04)
42 #define DFSDM_AWSCDR(y) ((y) * 0x20 + 0x08)
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/hantro/
Drk3399_vpu_hw_mpeg2_dec.c23 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
25 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
26 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
27 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
28 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
30 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
31 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
33 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
34 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
35 #define VDPU_REG_STARTMB_Y(v) (((v) << 0) & GENMASK(7, 0)) argument
[all …]
Dhantro_g1_mpeg2_dec.c23 #define G1_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
25 #define G1_REG_DEC_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24)) argument
26 #define G1_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(23) : 0) argument
27 #define G1_REG_DEC_STRSWAP32_E(v) ((v) ? BIT(22) : 0) argument
28 #define G1_REG_DEC_STRENDIAN_E(v) ((v) ? BIT(21) : 0) argument
29 #define G1_REG_DEC_INSWAP32_E(v) ((v) ? BIT(20) : 0) argument
30 #define G1_REG_DEC_OUTSWAP32_E(v) ((v) ? BIT(19) : 0) argument
31 #define G1_REG_DEC_DATA_DISC_E(v) ((v) ? BIT(18) : 0) argument
32 #define G1_REG_DEC_LATENCY(v) (((v) << 11) & GENMASK(16, 11)) argument
33 #define G1_REG_DEC_CLK_GATE_E(v) ((v) ? BIT(10) : 0) argument
[all …]
/kernel/linux/linux-5.10/drivers/gpu/host1x/hw/
Dhw_host1x02_uclass.h15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
29 * <x> value 'r' after being shifted to place its LSB at bit 0.
44 return 0x0; in host1x_uclass_incr_syncpt_r()
48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
[all …]
Dhw_host1x05_uclass.h15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
29 * <x> value 'r' after being shifted to place its LSB at bit 0.
44 return 0x0; in host1x_uclass_incr_syncpt_r()
48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
[all …]
Dhw_host1x01_uclass.h15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
29 * <x> value 'r' after being shifted to place its LSB at bit 0.
44 return 0x0; in host1x_uclass_incr_syncpt_r()
48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
[all …]
Dhw_host1x06_uclass.h15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
29 * <x> value 'r' after being shifted to place its LSB at bit 0.
44 return 0x0; in host1x_uclass_incr_syncpt_r()
48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 10; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
[all …]
Dhw_host1x04_uclass.h15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
29 * <x> value 'r' after being shifted to place its LSB at bit 0.
44 return 0x0; in host1x_uclass_incr_syncpt_r()
48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
[all …]
Dhw_host1x07_uclass.h15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
29 * <x> value 'r' after being shifted to place its LSB at bit 0.
44 return 0x0; in host1x_uclass_incr_syncpt_r()
48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 10; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/amd/display/dc/calcs/
Ddcn_calc_auto.c40 void scaler_settings_calculation(struct dcn_bw_internal_vars *v) in scaler_settings_calculation() argument
43 for (k = 0; k <= v->number_of_active_planes - 1; k++) { in scaler_settings_calculation()
44 if (v->allow_different_hratio_vratio == dcn_bw_yes) { in scaler_settings_calculation()
45 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
46 v->h_ratio[k] = v->viewport_width[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
47 v->v_ratio[k] = v->viewport_height[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
50 v->h_ratio[k] = v->viewport_height[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
51 v->v_ratio[k] = v->viewport_width[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
55 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
56v->h_ratio[k] =dcn_bw_max2(v->viewport_width[k] / v->scaler_rec_out_width[k], v->viewport_height[k… in scaler_settings_calculation()
[all …]
/kernel/linux/linux-5.10/drivers/iommu/
Dmsm_iommu_hw-8xxx.h20 #define SET_GLOBAL_REG_N(b, n, r, v) SET_GLOBAL_REG(b, ((r) + (n << 2)), (v)) argument
28 #define SET_GLOBAL_FIELD(b, r, F, v) \ argument
29 SET_FIELD(((b) + (r)), F##_MASK, F##_SHIFT, (v))
30 #define SET_CONTEXT_FIELD(b, c, r, F, v) \ argument
31 SET_FIELD(((b) + (r) + ((c) << CTX_SHIFT)), F##_MASK, F##_SHIFT, (v))
35 #define SET_FIELD(addr, mask, shift, v) \ argument
38 writel((t & ~((mask) << (shift))) + (((v) & (mask)) << (shift)), addr);\
39 } while (0)
47 #define FL_BASE_MASK 0xFFFFFC00
48 #define FL_TYPE_TABLE (1 << 0)
[all …]
/kernel/linux/linux-4.19/drivers/gpu/host1x/hw/
Dhw_host1x02_uclass.h27 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
41 * <x> value 'r' after being shifted to place its LSB at bit 0.
56 return 0x0; in host1x_uclass_incr_syncpt_r()
60 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
62 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
64 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
65 host1x_uclass_incr_syncpt_cond_f(v)
66 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
68 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
70 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
[all …]
Dhw_host1x04_uclass.h27 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
41 * <x> value 'r' after being shifted to place its LSB at bit 0.
56 return 0x0; in host1x_uclass_incr_syncpt_r()
60 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
62 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
64 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
65 host1x_uclass_incr_syncpt_cond_f(v)
66 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
68 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
70 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
[all …]
Dhw_host1x01_uclass.h27 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
41 * <x> value 'r' after being shifted to place its LSB at bit 0.
56 return 0x0; in host1x_uclass_incr_syncpt_r()
60 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
62 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
64 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
65 host1x_uclass_incr_syncpt_cond_f(v)
66 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
68 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
70 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
[all …]
Dhw_host1x05_uclass.h27 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
41 * <x> value 'r' after being shifted to place its LSB at bit 0.
56 return 0x0; in host1x_uclass_incr_syncpt_r()
60 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
62 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
64 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
65 host1x_uclass_incr_syncpt_cond_f(v)
66 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
68 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
70 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
[all …]
Dhw_host1x06_uclass.h27 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
41 * <x> value 'r' after being shifted to place its LSB at bit 0.
56 return 0x0; in host1x_uclass_incr_syncpt_r()
60 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
62 return (v & 0xff) << 10; in host1x_uclass_incr_syncpt_cond_f()
64 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
65 host1x_uclass_incr_syncpt_cond_f(v)
66 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
68 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
70 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
[all …]
/kernel/linux/linux-4.19/drivers/iommu/
Dmsm_iommu_hw-8xxx.h33 #define SET_GLOBAL_REG_N(b, n, r, v) SET_GLOBAL_REG(b, ((r) + (n << 2)), (v)) argument
41 #define SET_GLOBAL_FIELD(b, r, F, v) \ argument
42 SET_FIELD(((b) + (r)), F##_MASK, F##_SHIFT, (v))
43 #define SET_CONTEXT_FIELD(b, c, r, F, v) \ argument
44 SET_FIELD(((b) + (r) + ((c) << CTX_SHIFT)), F##_MASK, F##_SHIFT, (v))
48 #define SET_FIELD(addr, mask, shift, v) \ argument
51 writel((t & ~((mask) << (shift))) + (((v) & (mask)) << (shift)), addr);\
52 } while (0)
60 #define FL_BASE_MASK 0xFFFFFC00
61 #define FL_TYPE_TABLE (1 << 0)
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/calcs/
Ddcn_calc_auto.c40 void scaler_settings_calculation(struct dcn_bw_internal_vars *v) in scaler_settings_calculation() argument
43 for (k = 0; k <= v->number_of_active_planes - 1; k++) { in scaler_settings_calculation()
44 if (v->allow_different_hratio_vratio == dcn_bw_yes) { in scaler_settings_calculation()
45 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
46 v->h_ratio[k] = v->viewport_width[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
47 v->v_ratio[k] = v->viewport_height[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
50 v->h_ratio[k] = v->viewport_height[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
51 v->v_ratio[k] = v->viewport_width[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
55 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
56v->h_ratio[k] =dcn_bw_max2(v->viewport_width[k] / v->scaler_rec_out_width[k], v->viewport_height[k… in scaler_settings_calculation()
[all …]
/kernel/linux/linux-5.10/arch/powerpc/include/asm/
Datomic.h25 static __inline__ int atomic_read(const atomic_t *v) in atomic_read() argument
29 __asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m"(v->counter)); in atomic_read()
34 static __inline__ void atomic_set(atomic_t *v, int i) in atomic_set() argument
36 __asm__ __volatile__("stw%U0%X0 %1,%0" : "=m"(v->counter) : "r"(i)); in atomic_set()
40 static __inline__ void atomic_##op(int a, atomic_t *v) \
45 "1: lwarx %0,0,%3 # atomic_" #op "\n" \
46 #asm_op " %0,%2,%0\n" \
47 " stwcx. %0,0,%3 \n" \
49 : "=&r" (t), "+m" (v->counter) \
50 : "r" (a), "r" (&v->counter) \
[all …]

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