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/kernel/linux/linux-4.19/drivers/gpu/drm/etnaviv/
Dcommon.xml.h7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
43 #define PIPE_ID_PIPE_3D 0x00000000
44 #define PIPE_ID_PIPE_2D 0x00000001
45 #define SYNC_RECIPIENT_FE 0x00000001
46 #define SYNC_RECIPIENT_RA 0x00000005
47 #define SYNC_RECIPIENT_PE 0x00000007
48 #define SYNC_RECIPIENT_DE 0x0000000b
49 #define SYNC_RECIPIENT_BLT 0x00000010
50 #define ENDIAN_MODE_NO_SWAP 0x00000000
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/etnaviv/
Dcommon.xml.h7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
43 #define PIPE_ID_PIPE_3D 0x00000000
44 #define PIPE_ID_PIPE_2D 0x00000001
45 #define SYNC_RECIPIENT_FE 0x00000001
46 #define SYNC_RECIPIENT_RA 0x00000005
47 #define SYNC_RECIPIENT_PE 0x00000007
48 #define SYNC_RECIPIENT_DE 0x0000000b
49 #define SYNC_RECIPIENT_BLT 0x00000010
50 #define ENDIAN_MODE_NO_SWAP 0x00000000
[all …]
/kernel/linux/linux-5.10/arch/powerpc/platforms/cell/spufs/
Dspu_save_dump.h_shipped7 0x20805000,
8 0x20805201,
9 0x20805402,
10 0x20805603,
11 0x20805804,
12 0x20805a05,
13 0x20805c06,
14 0x20805e07,
15 0x20806008,
16 0x20806209,
[all …]
/kernel/linux/linux-4.19/arch/powerpc/platforms/cell/spufs/
Dspu_save_dump.h_shipped7 0x20805000,
8 0x20805201,
9 0x20805402,
10 0x20805603,
11 0x20805804,
12 0x20805a05,
13 0x20805c06,
14 0x20805e07,
15 0x20806008,
16 0x20806209,
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Duc101.dts75 phy0: ethernet-phy@0 {
77 reg = <0>;
91 reg = <0x2c>;
95 reg = <0x51>;
105 ranges = <0 0 0xff800000 0x00800000
106 1 0 0x80000000 0x00800000
107 3 0 0x80000000 0x00800000>;
109 flash@0,0 {
111 reg = <0 0 0x00800000>;
117 partition@0 {
[all …]
Dpcm032.dts24 reg = <0x00000000 0x08000000>; // 128MB
30 cell-index = <0>;
61 phy0: ethernet-phy@0 {
62 reg = <0>;
69 reg = <0x51>;
73 reg = <0x52>;
80 interrupt-map-mask = <0xf800 0 0 7>;
81 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
82 0xc000 0 0 2 &mpc5200_pic 1 1 3
83 0xc000 0 0 3 &mpc5200_pic 1 2 3
[all …]
/kernel/linux/linux-4.19/arch/powerpc/boot/dts/
Duc101.dts79 phy0: ethernet-phy@0 {
81 reg = <0>;
95 reg = <0x2c>;
99 reg = <0x51>;
109 ranges = <0 0 0xff800000 0x00800000
110 1 0 0x80000000 0x00800000
111 3 0 0x80000000 0x00800000>;
113 flash@0,0 {
115 reg = <0 0 0x00800000>;
121 partition@0 {
[all …]
Dpcm032.dts30 reg = <0x00000000 0x08000000>; // 128MB
36 cell-index = <0>;
67 phy0: ethernet-phy@0 {
68 reg = <0>;
75 reg = <0x51>;
79 reg = <0x52>;
86 interrupt-map-mask = <0xf800 0 0 7>;
87 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
88 0xc000 0 0 2 &mpc5200_pic 1 1 3
89 0xc000 0 0 3 &mpc5200_pic 1 2 3
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dibm,ndfc.txt5 - reg : should specify chip select and size used for the chip (0x2000).
8 - ccr : NDFC config and control register value (default 0).
9 - bank-settings : NDFC bank configuration register value (default 0).
16 ndfc@1,0 {
18 reg = <0x00000001 0x00000000 0x00002000>;
19 ccr = <0x00001000>;
20 bank-settings = <0x80002222>;
28 partition@0 {
30 reg = <0x00000000 0x00200000>;
34 reg = <0x00200000 0x03E00000>;
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/mtd/
Dibm,ndfc.txt5 - reg : should specify chip select and size used for the chip (0x2000).
8 - ccr : NDFC config and control register value (default 0).
9 - bank-settings : NDFC bank configuration register value (default 0).
16 ndfc@1,0 {
18 reg = <0x00000001 0x00000000 0x00002000>;
19 ccr = <0x00001000>;
20 bank-settings = <0x80002222>;
28 partition@0 {
30 reg = <0x00000000 0x00200000>;
34 reg = <0x00200000 0x03E00000>;
/kernel/linux/linux-5.10/arch/mips/alchemy/
Dboard-gpr.c42 alchemy_gpio_direction_output(4, 0); in gpr_reset()
43 alchemy_gpio_direction_output(5, 0); in gpr_reset()
48 alchemy_gpio_direction_output(1, 0); in gpr_reset()
81 [0] = {
91 .id = 0,
99 * 0x00000000-0x00200000 : "kernel"
100 * 0x00200000-0x00a00000 : "rootfs"
101 * 0x01d00000-0x01f00000 : "config"
102 * 0x01c00000-0x01d00000 : "yamon"
103 * 0x01d00000-0x01d40000 : "yamon env vars"
[all …]
/kernel/linux/linux-4.19/arch/arm/mach-mmp/
Daddr-map.h18 #define APB_PHYS_BASE 0xd4000000
19 #define APB_VIRT_BASE IOMEM(0xfe000000)
20 #define APB_PHYS_SIZE 0x00200000
22 #define AXI_PHYS_BASE 0xd4200000
23 #define AXI_VIRT_BASE IOMEM(0xfe200000)
24 #define AXI_PHYS_SIZE 0x00200000
26 /* Static Memory Controller - Chip Select 0 and 1 */
27 #define SMC_CS0_PHYS_BASE 0x80000000
28 #define SMC_CS0_PHYS_SIZE 0x10000000
29 #define SMC_CS1_PHYS_BASE 0x90000000
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-mmp/
Daddr-map.h15 #define APB_PHYS_BASE 0xd4000000
16 #define APB_VIRT_BASE IOMEM(0xfe000000)
17 #define APB_PHYS_SIZE 0x00200000
19 #define AXI_PHYS_BASE 0xd4200000
20 #define AXI_VIRT_BASE IOMEM(0xfe200000)
21 #define AXI_PHYS_SIZE 0x00200000
23 #define PGU_PHYS_BASE 0xe0000000
24 #define PGU_VIRT_BASE IOMEM(0xfe400000)
25 #define PGU_PHYS_SIZE 0x00100000
27 /* Static Memory Controller - Chip Select 0 and 1 */
[all …]
/kernel/linux/linux-4.19/arch/powerpc/include/uapi/asm/
Dcputable.h6 #define PPC_FEATURE_32 0x80000000
7 #define PPC_FEATURE_64 0x40000000
8 #define PPC_FEATURE_601_INSTR 0x20000000
9 #define PPC_FEATURE_HAS_ALTIVEC 0x10000000
10 #define PPC_FEATURE_HAS_FPU 0x08000000
11 #define PPC_FEATURE_HAS_MMU 0x04000000
12 #define PPC_FEATURE_HAS_4xxMAC 0x02000000
13 #define PPC_FEATURE_UNIFIED_CACHE 0x01000000
14 #define PPC_FEATURE_HAS_SPE 0x00800000
15 #define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000
[all …]
/kernel/linux/linux-5.10/arch/powerpc/include/uapi/asm/
Dcputable.h6 #define PPC_FEATURE_32 0x80000000
7 #define PPC_FEATURE_64 0x40000000
8 #define PPC_FEATURE_601_INSTR 0x20000000
9 #define PPC_FEATURE_HAS_ALTIVEC 0x10000000
10 #define PPC_FEATURE_HAS_FPU 0x08000000
11 #define PPC_FEATURE_HAS_MMU 0x04000000
12 #define PPC_FEATURE_HAS_4xxMAC 0x02000000
13 #define PPC_FEATURE_UNIFIED_CACHE 0x01000000
14 #define PPC_FEATURE_HAS_SPE 0x00800000
15 #define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000
[all …]
/kernel/linux/linux-4.19/arch/mips/alchemy/
Dboard-gpr.c59 if (!memsize_str || kstrtoul(memsize_str, 0, &memsize)) in prom_init()
60 memsize = 0x04000000; in prom_init()
61 add_memory_region(0, memsize, BOOT_MEM_RAM); in prom_init()
72 alchemy_gpio_direction_output(4, 0); in gpr_reset()
73 alchemy_gpio_direction_output(5, 0); in gpr_reset()
78 alchemy_gpio_direction_output(1, 0); in gpr_reset()
111 [0] = {
121 .id = 0,
129 * 0x00000000-0x00200000 : "kernel"
130 * 0x00200000-0x00a00000 : "rootfs"
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-rpc/include/mach/
Dhardware.h25 #define RPC_RAM_SIZE 0x10000000
26 #define RPC_RAM_START 0x10000000
28 #define EASI_SIZE 0x08000000 /* EASI I/O */
29 #define EASI_START 0x08000000
30 #define EASI_BASE IOMEM(0xe5000000)
32 #define IO_START 0x03000000 /* I/O */
33 #define IO_SIZE 0x01000000
34 #define IO_BASE IOMEM(0xe0000000)
36 #define SCREEN_START 0x02000000 /* VRAM */
37 #define SCREEN_END 0xdfc00000
[all …]
/kernel/linux/linux-4.19/arch/arm/mach-rpc/include/mach/
Dhardware.h28 #define RPC_RAM_SIZE 0x10000000
29 #define RPC_RAM_START 0x10000000
31 #define EASI_SIZE 0x08000000 /* EASI I/O */
32 #define EASI_START 0x08000000
33 #define EASI_BASE IOMEM(0xe5000000)
35 #define IO_START 0x03000000 /* I/O */
36 #define IO_SIZE 0x01000000
37 #define IO_BASE IOMEM(0xe0000000)
39 #define SCREEN_START 0x02000000 /* VRAM */
40 #define SCREEN_END 0xdfc00000
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/mc/
Dnv50.c28 { 0x04000000, NVKM_ENGINE_DISP },
29 { 0x00001000, NVKM_ENGINE_GR },
30 { 0x00000100, NVKM_ENGINE_FIFO },
31 { 0x00000001, NVKM_ENGINE_MPEG },
32 { 0x00001101, NVKM_SUBDEV_FB },
33 { 0x10000000, NVKM_SUBDEV_BUS },
34 { 0x00200000, NVKM_SUBDEV_GPIO },
35 { 0x00200000, NVKM_SUBDEV_I2C },
36 { 0x00100000, NVKM_SUBDEV_TIMER },
44 nvkm_wr32(device, 0x000200, 0xffffffff); /* everything on */ in nv50_mc_init()
Dg98.c28 { 0x04008000, NVKM_ENGINE_MSVLD },
29 { 0x02004000, NVKM_ENGINE_SEC },
30 { 0x01020000, NVKM_ENGINE_MSPDEC },
31 { 0x00400002, NVKM_ENGINE_MSPPP },
32 { 0x00201000, NVKM_ENGINE_GR },
33 { 0x00000100, NVKM_ENGINE_FIFO },
39 { 0x04000000, NVKM_ENGINE_DISP },
40 { 0x00020000, NVKM_ENGINE_MSPDEC },
41 { 0x00008000, NVKM_ENGINE_MSVLD },
42 { 0x00004000, NVKM_ENGINE_SEC },
[all …]
Dg84.c28 { 0x04008000, NVKM_ENGINE_BSP },
29 { 0x02004000, NVKM_ENGINE_CIPHER },
30 { 0x01020000, NVKM_ENGINE_VP },
31 { 0x00400002, NVKM_ENGINE_MPEG },
32 { 0x00201000, NVKM_ENGINE_GR },
33 { 0x00000100, NVKM_ENGINE_FIFO },
39 { 0x04000000, NVKM_ENGINE_DISP },
40 { 0x00020000, NVKM_ENGINE_VP },
41 { 0x00008000, NVKM_ENGINE_BSP },
42 { 0x00004000, NVKM_ENGINE_CIPHER },
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/nouveau/nvkm/subdev/mc/
Dnv50.c28 { 0x04000000, NVKM_ENGINE_DISP },
29 { 0x00001000, NVKM_ENGINE_GR },
30 { 0x00000100, NVKM_ENGINE_FIFO },
31 { 0x00000001, NVKM_ENGINE_MPEG },
32 { 0x00001101, NVKM_SUBDEV_FB },
33 { 0x10000000, NVKM_SUBDEV_BUS },
34 { 0x00200000, NVKM_SUBDEV_GPIO },
35 { 0x00200000, NVKM_SUBDEV_I2C },
36 { 0x00100000, NVKM_SUBDEV_TIMER },
44 nvkm_wr32(device, 0x000200, 0xffffffff); /* everything on */ in nv50_mc_init()
Dg84.c28 { 0x04008000, NVKM_ENGINE_BSP },
29 { 0x02004000, NVKM_ENGINE_CIPHER },
30 { 0x01020000, NVKM_ENGINE_VP },
31 { 0x00400002, NVKM_ENGINE_MPEG },
32 { 0x00201000, NVKM_ENGINE_GR },
33 { 0x00000100, NVKM_ENGINE_FIFO },
39 { 0x04000000, NVKM_ENGINE_DISP },
40 { 0x00020000, NVKM_ENGINE_VP },
41 { 0x00008000, NVKM_ENGINE_BSP },
42 { 0x00004000, NVKM_ENGINE_CIPHER },
[all …]
Dg98.c28 { 0x04008000, NVKM_ENGINE_MSVLD },
29 { 0x02004000, NVKM_ENGINE_SEC },
30 { 0x01020000, NVKM_ENGINE_MSPDEC },
31 { 0x00400002, NVKM_ENGINE_MSPPP },
32 { 0x00201000, NVKM_ENGINE_GR },
33 { 0x00000100, NVKM_ENGINE_FIFO },
39 { 0x04000000, NVKM_ENGINE_DISP },
40 { 0x00020000, NVKM_ENGINE_MSPDEC },
41 { 0x00008000, NVKM_ENGINE_MSVLD },
42 { 0x00004000, NVKM_ENGINE_SEC },
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dkirkwood-ts219.dtsi8 reg = <0x00000000 0x20000000>;
23 reg = <0x30>;
34 reg = <0x12100 0x100>;
40 m25p128@0 {
44 reg = <0>;
46 mode = <0>;
48 partition@0 {
49 reg = <0x00000000 0x00080000>;
54 reg = <0x00200000 0x00200000>;
59 reg = <0x00400000 0x00900000>;
[all …]

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