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/kernel/linux/linux-5.10/drivers/mtd/maps/
Dscx200_docflash.c27 static int probe = 0; /* Don't autoprobe */
28 static unsigned size = 0x1000000; /* 16 MiB the whole ISA address space */
32 module_param(probe, int, 0);
34 module_param(size, int, 0);
36 module_param(width, int, 0);
38 module_param(flashtype, charp, 0);
51 .offset = 0,
52 .size = 0xc0000
56 .offset = 0xc0000,
57 .size = 0x40000
[all …]
/kernel/linux/linux-4.19/drivers/mtd/maps/
Dscx200_docflash.c26 static int probe = 0; /* Don't autoprobe */
27 static unsigned size = 0x1000000; /* 16 MiB the whole ISA address space */
31 module_param(probe, int, 0);
33 module_param(size, int, 0);
35 module_param(width, int, 0);
37 module_param(flashtype, charp, 0);
50 .offset = 0,
51 .size = 0xc0000
55 .offset = 0xc0000,
56 .size = 0x40000
[all …]
/kernel/linux/linux-4.19/arch/sh/boards/mach-microdev/
Dsetup.c23 [0] = {
24 .start = 0x300,
25 .end = 0x300 + SZ_4K - 1,
43 { S1DREG_MISC, 0x00 },
44 { S1DREG_COM_DISP_MODE, 0x00 },
45 { S1DREG_GPIO_CNF0, 0x00 },
46 { S1DREG_GPIO_CNF1, 0x00 },
47 { S1DREG_GPIO_CTL0, 0x00 },
48 { S1DREG_GPIO_CTL1, 0x00 },
49 { S1DREG_CLK_CNF, 0x02 },
[all …]
/kernel/linux/linux-5.10/arch/sh/boards/mach-microdev/
Dsetup.c21 [0] = {
22 .start = 0x300,
23 .end = 0x300 + SZ_4K - 1,
41 { S1DREG_MISC, 0x00 },
42 { S1DREG_COM_DISP_MODE, 0x00 },
43 { S1DREG_GPIO_CNF0, 0x00 },
44 { S1DREG_GPIO_CNF1, 0x00 },
45 { S1DREG_GPIO_CTL0, 0x00 },
46 { S1DREG_GPIO_CTL1, 0x00 },
47 { S1DREG_CLK_CNF, 0x02 },
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dste-db8500.dtsi9 operating-points = <998400 0
10 800000 0
11 400000 0
12 200000 0>;
23 reg = <0x06000000 0x00f00000>;
29 reg = <0x06f00000 0x00100000>;
35 reg = <0x07000000 0x01000000>;
49 reg = <0x17f00000 0x00100000>;
Dste-db8520.dtsi9 operating-points = <1152000 0
10 800000 0
11 400000 0
12 200000 0>;
23 reg = <0x06000000 0x00f00000>;
29 reg = <0x06f00000 0x00100000>;
35 reg = <0x07000000 0x01000000>;
49 reg = <0x17f00000 0x00100000>;
Dbcm953012hr.dts50 reg = <0x80000000 0x10000000>;
55 partition@0 {
57 reg = <0x00000000 0x00200000>;
62 reg = <0x00200000 0x00400000>;
66 reg = <0x00600000 0x00a00000>;
70 reg = <0x01000000 0x07000000>;
82 partition@0 {
84 reg = <0x00000000 0x000d0000>;
88 reg = <0x000d0000 0x00030000>;
92 reg = <0x00100000 0x00600000>;
[all …]
Dbcm953012k.dts48 reg = <0x80000000 0x10000000>;
53 nandcs@0 {
55 reg = <0>;
64 partition@0 {
66 reg = <0x00000000 0x00200000>;
71 reg = <0x00200000 0x00400000>;
75 reg = <0x00600000 0x00a00000>;
79 reg = <0x01000000 0x07000000>;
92 partition@0 {
94 reg = <0x00000000 0x000d0000>;
[all …]
/kernel/linux/linux-4.19/drivers/edac/
Dfsl_ddr_edac.h27 #define FSL_MC_DDR_SDRAM_CFG 0x0110
28 #define FSL_MC_CS_BNDS_0 0x0000
29 #define FSL_MC_CS_BNDS_OFS 0x0008
31 #define FSL_MC_DATA_ERR_INJECT_HI 0x0e00
32 #define FSL_MC_DATA_ERR_INJECT_LO 0x0e04
33 #define FSL_MC_ECC_ERR_INJECT 0x0e08
34 #define FSL_MC_CAPTURE_DATA_HI 0x0e20
35 #define FSL_MC_CAPTURE_DATA_LO 0x0e24
36 #define FSL_MC_CAPTURE_ECC 0x0e28
37 #define FSL_MC_ERR_DETECT 0x0e40
[all …]
Dfsl_ddr_edac.c64 return sprintf(data, "0x%08x", in fsl_mc_inject_data_hi_show()
74 return sprintf(data, "0x%08x", in fsl_mc_inject_data_lo_show()
84 return sprintf(data, "0x%08x", in fsl_mc_inject_ctrl_show()
98 rc = kstrtoul(data, 0, &val); in fsl_mc_inject_data_hi_store()
105 return 0; in fsl_mc_inject_data_hi_store()
118 rc = kstrtoul(data, 0, &val); in fsl_mc_inject_data_lo_store()
125 return 0; in fsl_mc_inject_data_lo_store()
138 rc = kstrtoul(data, 0, &val); in fsl_mc_inject_ctrl_store()
145 return 0; in fsl_mc_inject_ctrl_store()
174 /* [0:31] [32:63] */
[all …]
/kernel/linux/linux-5.10/drivers/edac/
Dfsl_ddr_edac.h27 #define FSL_MC_DDR_SDRAM_CFG 0x0110
28 #define FSL_MC_CS_BNDS_0 0x0000
29 #define FSL_MC_CS_BNDS_OFS 0x0008
31 #define FSL_MC_DATA_ERR_INJECT_HI 0x0e00
32 #define FSL_MC_DATA_ERR_INJECT_LO 0x0e04
33 #define FSL_MC_ECC_ERR_INJECT 0x0e08
34 #define FSL_MC_CAPTURE_DATA_HI 0x0e20
35 #define FSL_MC_CAPTURE_DATA_LO 0x0e24
36 #define FSL_MC_CAPTURE_ECC 0x0e28
37 #define FSL_MC_ERR_DETECT 0x0e40
[all …]
Dfsl_ddr_edac.c65 return sprintf(data, "0x%08x", in fsl_mc_inject_data_hi_show()
75 return sprintf(data, "0x%08x", in fsl_mc_inject_data_lo_show()
85 return sprintf(data, "0x%08x", in fsl_mc_inject_ctrl_show()
99 rc = kstrtoul(data, 0, &val); in fsl_mc_inject_data_hi_store()
106 return 0; in fsl_mc_inject_data_hi_store()
119 rc = kstrtoul(data, 0, &val); in fsl_mc_inject_data_lo_store()
126 return 0; in fsl_mc_inject_data_lo_store()
139 rc = kstrtoul(data, 0, &val); in fsl_mc_inject_ctrl_store()
146 return 0; in fsl_mc_inject_ctrl_store()
178 /* [0:31] [32:63] */
[all …]
/kernel/linux/linux-4.19/arch/powerpc/include/asm/
Dreg_8xx.h31 #define SPRN_EID 81 /* External interrupt disable (EE=0, RI=1) */
32 #define SPRN_NRI 82 /* Non recoverable interrupt (EE=0, RI=0) */
46 #define IDC_ENABLE 0x02000000 /* Cache enable */
47 #define IDC_DISABLE 0x04000000 /* Cache disable */
48 #define IDC_LDLCK 0x06000000 /* Load and lock */
49 #define IDC_UNLINE 0x08000000 /* Unlock line */
50 #define IDC_UNALL 0x0a000000 /* Unlock all */
51 #define IDC_INVALL 0x0c000000 /* Invalidate all */
53 #define DC_FLINE 0x0e000000 /* Flush data cache line */
54 #define DC_SFWT 0x01000000 /* Set forced writethrough mode */
[all …]
/kernel/linux/linux-5.10/arch/powerpc/include/asm/
Dreg_8xx.h29 #define SPRN_EID 81 /* External interrupt disable (EE=0, RI=1) */
30 #define SPRN_NRI 82 /* Non recoverable interrupt (EE=0, RI=0) */
38 #define LCTRL1_CTE_GT 0xc0000000
39 #define LCTRL1_CTF_LT 0x14000000
40 #define LCTRL1_CRWE_RW 0x00000000
41 #define LCTRL1_CRWE_RO 0x00040000
42 #define LCTRL1_CRWE_WO 0x000c0000
43 #define LCTRL1_CRWF_RW 0x00000000
44 #define LCTRL1_CRWF_RO 0x00010000
45 #define LCTRL1_CRWF_WO 0x00030000
[all …]
/kernel/linux/linux-5.10/drivers/staging/wfx/
Dhwio.h30 #define CFG_ERR_SPI_FRAME 0x00000001 // only with SPI
31 #define CFG_ERR_SDIO_BUF_MISMATCH 0x00000001 // only with SDIO
32 #define CFG_ERR_BUF_UNDERRUN 0x00000002
33 #define CFG_ERR_DATA_IN_TOO_LARGE 0x00000004
34 #define CFG_ERR_HOST_NO_OUT_QUEUE 0x00000008
35 #define CFG_ERR_BUF_OVERRUN 0x00000010
36 #define CFG_ERR_DATA_OUT_TOO_LARGE 0x00000020
37 #define CFG_ERR_HOST_NO_IN_QUEUE 0x00000040
38 #define CFG_ERR_HOST_CRC_MISS 0x00000080 // only with SDIO
39 #define CFG_SPI_IGNORE_CS 0x00000080 // only with SPI
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dbcm953012hr.dts49 reg = <0x80000000 0x10000000>;
54 partition@0 {
56 reg = <0x00000000 0x00200000>;
61 reg = <0x00200000 0x00400000>;
65 reg = <0x00600000 0x00a00000>;
69 reg = <0x01000000 0x07000000>;
81 partition@0 {
83 reg = <0x00000000 0x000d0000>;
87 reg = <0x000d0000 0x00030000>;
91 reg = <0x00100000 0x00600000>;
[all …]
Dbcm953012k.dts47 reg = <0x80000000 0x10000000>;
52 nandcs@0 {
54 reg = <0>;
63 partition@0 {
65 reg = <0x00000000 0x00200000>;
70 reg = <0x00200000 0x00400000>;
74 reg = <0x00600000 0x00a00000>;
78 reg = <0x01000000 0x07000000>;
91 partition@0 {
93 reg = <0x00000000 0x000d0000>;
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/memory-controllers/
Dexynos-srom.txt19 <bank-number> 0 <parent address of bank> <size>
29 typically 0 as this is the start of the bank.
35 Tacp : Page mode access cycle at Page mode (0 - 15)
36 Tcah : Address holding time after CSn (0 - 15)
37 Tcoh : Chip selection hold on OEn (0 - 15)
38 Tacc : Access cycle (0 - 31, the actual time is N + 1)
39 Tcos : Chip selection set-up before OEn (0 - 15)
40 Tacs : Address set-up before CSn (0 - 15)
51 reg = <0x12570000 0x14>;
58 ranges = <0 0 0x04000000 0x20000 // Bank0
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Dexynos-srom.yaml33 <bank-number> 0 <parent address of bank> <size>
37 "^.*@[0-3],[a-f0-9]+$":
50 typically 0 as this is the start of the bank.
74 Tacp: Page mode access cycle at Page mode (0 - 15)
75 Tcah: Address holding time after CSn (0 - 15)
76 Tcoh: Chip selection hold on OEn (0 - 15)
77 Tacc: Access cycle (0 - 31, the actual time is N + 1)
78 Tcos: Chip selection set-up before OEn (0 - 15)
79 Tacs: Address set-up before CSn (0 - 15)
96 reg = <0x12560000 0x14>;
[all …]
/kernel/linux/linux-4.19/include/linux/bcma/
Dbcma_regs.h7 #define BCMA_CLKCTLST 0x01E0 /* Clock control and status */
8 #define BCMA_CLKCTLST_FORCEALP 0x00000001 /* Force ALP request */
9 #define BCMA_CLKCTLST_FORCEHT 0x00000002 /* Force HT request */
10 #define BCMA_CLKCTLST_FORCEILP 0x00000004 /* Force ILP request */
11 #define BCMA_CLKCTLST_HAVEALPREQ 0x00000008 /* ALP available request */
12 #define BCMA_CLKCTLST_HAVEHTREQ 0x00000010 /* HT available request */
13 #define BCMA_CLKCTLST_HWCROFF 0x00000020 /* Force HW clock request off */
14 #define BCMA_CLKCTLST_HQCLKREQ 0x00000040 /* HQ Clock */
15 #define BCMA_CLKCTLST_EXTRESREQ 0x00000700 /* Mask of external resource requests */
17 #define BCMA_CLKCTLST_HAVEALP 0x00010000 /* ALP available */
[all …]
/kernel/linux/linux-5.10/include/linux/bcma/
Dbcma_regs.h7 #define BCMA_CLKCTLST 0x01E0 /* Clock control and status */
8 #define BCMA_CLKCTLST_FORCEALP 0x00000001 /* Force ALP request */
9 #define BCMA_CLKCTLST_FORCEHT 0x00000002 /* Force HT request */
10 #define BCMA_CLKCTLST_FORCEILP 0x00000004 /* Force ILP request */
11 #define BCMA_CLKCTLST_HAVEALPREQ 0x00000008 /* ALP available request */
12 #define BCMA_CLKCTLST_HAVEHTREQ 0x00000010 /* HT available request */
13 #define BCMA_CLKCTLST_HWCROFF 0x00000020 /* Force HW clock request off */
14 #define BCMA_CLKCTLST_HQCLKREQ 0x00000040 /* HQ Clock */
15 #define BCMA_CLKCTLST_EXTRESREQ 0x00000700 /* Mask of external resource requests */
17 #define BCMA_CLKCTLST_HAVEALP 0x00010000 /* ALP available */
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/etnaviv/
Dstate_hi.xml.h7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
48 #define MMU_EXCEPTION_SLAVE_NOT_PRESENT 0x00000001
49 #define MMU_EXCEPTION_PAGE_NOT_PRESENT 0x00000002
50 #define MMU_EXCEPTION_WRITE_VIOLATION 0x00000003
51 #define VIVS_HI 0x00000000
53 #define VIVS_HI_CLOCK_CONTROL 0x00000000
54 #define VIVS_HI_CLOCK_CONTROL_CLK3D_DIS 0x00000001
55 #define VIVS_HI_CLOCK_CONTROL_CLK2D_DIS 0x00000002
56 #define VIVS_HI_CLOCK_CONTROL_FSCALE_VAL__MASK 0x000001fc
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/etnaviv/
Dstate_hi.xml.h7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
48 #define MMU_EXCEPTION_SLAVE_NOT_PRESENT 0x00000001
49 #define MMU_EXCEPTION_PAGE_NOT_PRESENT 0x00000002
50 #define MMU_EXCEPTION_WRITE_VIOLATION 0x00000003
51 #define MMU_EXCEPTION_OUT_OF_BOUND 0x00000004
52 #define MMU_EXCEPTION_READ_SECURITY_VIOLATION 0x00000005
53 #define MMU_EXCEPTION_WRITE_SECURITY_VIOLATION 0x00000006
54 #define VIVS_HI 0x00000000
56 #define VIVS_HI_CLOCK_CONTROL 0x00000000
[all …]
/kernel/linux/linux-5.10/sound/pci/cs46xx/
Dcs46xx.h25 #define BA0_HISR 0x00000000
26 #define BA0_HSR0 0x00000004
27 #define BA0_HICR 0x00000008
28 #define BA0_DMSR 0x00000100
29 #define BA0_HSAR 0x00000110
30 #define BA0_HDAR 0x00000114
31 #define BA0_HDMR 0x00000118
32 #define BA0_HDCR 0x0000011C
33 #define BA0_PFMC 0x00000200
34 #define BA0_PFCV1 0x00000204
[all …]
/kernel/linux/linux-4.19/sound/pci/cs46xx/
Dcs46xx.h40 #define BA0_HISR 0x00000000
41 #define BA0_HSR0 0x00000004
42 #define BA0_HICR 0x00000008
43 #define BA0_DMSR 0x00000100
44 #define BA0_HSAR 0x00000110
45 #define BA0_HDAR 0x00000114
46 #define BA0_HDMR 0x00000118
47 #define BA0_HDCR 0x0000011C
48 #define BA0_PFMC 0x00000200
49 #define BA0_PFCV1 0x00000204
[all …]

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