| /kernel/linux/linux-5.10/drivers/clk/imx/ |
| D | clk-pllv2.c | 17 #define MXC_PLL_DP_CTL 0x00
18 #define MXC_PLL_DP_CONFIG 0x04
19 #define MXC_PLL_DP_OP 0x08
20 #define MXC_PLL_DP_MFD 0x0C
21 #define MXC_PLL_DP_MFN 0x10
22 #define MXC_PLL_DP_MFNMINUS 0x14
23 #define MXC_PLL_DP_MFNPLUS 0x18
24 #define MXC_PLL_DP_HFS_OP 0x1C
25 #define MXC_PLL_DP_HFS_MFD 0x20
26 #define MXC_PLL_DP_HFS_MFN 0x24
[all …]
|
| /kernel/linux/linux-4.19/drivers/clk/imx/ |
| D | clk-pllv2.c | 17 #define MXC_PLL_DP_CTL 0x00
18 #define MXC_PLL_DP_CONFIG 0x04
19 #define MXC_PLL_DP_OP 0x08
20 #define MXC_PLL_DP_MFD 0x0C
21 #define MXC_PLL_DP_MFN 0x10
22 #define MXC_PLL_DP_MFNMINUS 0x14
23 #define MXC_PLL_DP_MFNPLUS 0x18
24 #define MXC_PLL_DP_HFS_OP 0x1C
25 #define MXC_PLL_DP_HFS_MFD 0x20
26 #define MXC_PLL_DP_HFS_MFN 0x24
[all …]
|
| /kernel/linux/linux-5.10/arch/powerpc/sysdev/ |
| D | dart.h | 11 #define DART_CNTL 0
14 #define DART_EXCP_U3 0x10
16 #define DART_TAGS_U3 0x1000
19 #define DART_BASE_U4 0x10
20 #define DART_SIZE_U4 0x20
21 #define DART_EXCP_U4 0x30
22 #define DART_TAGS_U4 0x1000
27 #define DART_CNTL_U3_BASE_MASK 0xfffff
29 #define DART_CNTL_U3_FLUSHTLB 0x400
30 #define DART_CNTL_U3_ENABLE 0x200
[all …]
|
| /kernel/linux/linux-4.19/arch/sh/include/mach-common/mach/ |
| D | sh7785lcr.h | 11 * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash
12 * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD
13 * 0x06000000 - 0x07ffffff(CS1) | I2C | I2C
14 * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM
15 * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM
16 * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107
17 * 0x14000000 - 0x17ffffff(CS5) | reserved | USB
18 * 0x18000000 - 0x1bffffff(CS6) | reserved | SD
19 * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use)
23 #define NOR_FLASH_ADDR 0x00000000
[all …]
|
| /kernel/linux/linux-5.10/arch/sh/include/mach-common/mach/ |
| D | sh7785lcr.h | 11 * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash
12 * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD
13 * 0x06000000 - 0x07ffffff(CS1) | I2C | I2C
14 * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM
15 * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM
16 * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107
17 * 0x14000000 - 0x17ffffff(CS5) | reserved | USB
18 * 0x18000000 - 0x1bffffff(CS6) | reserved | SD
19 * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use)
23 #define NOR_FLASH_ADDR 0x00000000
[all …]
|
| /kernel/linux/linux-4.19/arch/powerpc/sysdev/ |
| D | dart.h | 24 #define DART_CNTL 0
27 #define DART_EXCP_U3 0x10
29 #define DART_TAGS_U3 0x1000
32 #define DART_BASE_U4 0x10
33 #define DART_SIZE_U4 0x20
34 #define DART_EXCP_U4 0x30
35 #define DART_TAGS_U4 0x1000
40 #define DART_CNTL_U3_BASE_MASK 0xfffff
42 #define DART_CNTL_U3_FLUSHTLB 0x400
43 #define DART_CNTL_U3_ENABLE 0x200
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/watchdog/ |
| D | snps,dw-wdt.yaml | 52 default: [0x0001000 0x0002000 0x0004000 0x0008000
53 0x0010000 0x0020000 0x0040000 0x0080000
54 0x0100000 0x0200000 0x0400000 0x0800000
55 0x1000000 0x2000000 0x4000000 0x8000000]
70 reg = <0xffd02000 0x1000>;
71 interrupts = <0 171 4>;
79 reg = <0xffd02000 0x1000>;
80 interrupts = <0 171 4>;
83 snps,watchdog-tops = <0x000000FF 0x000001FF 0x000003FF
84 0x000007FF 0x0000FFFF 0x0001FFFF
[all …]
|
| /kernel/linux/linux-4.19/drivers/edac/ |
| D | mv64x60_edac.h | 15 #define MV64x60_REVISION " Ver: 2.0.0"
25 #define MV64x60_CPU_ERR_ADDR_LO 0x00 /* 0x0070 */
26 #define MV64x60_CPU_ERR_ADDR_HI 0x08 /* 0x0078 */
27 #define MV64x60_CPU_ERR_DATA_LO 0x00 /* 0x0128 */
28 #define MV64x60_CPU_ERR_DATA_HI 0x08 /* 0x0130 */
29 #define MV64x60_CPU_ERR_PARITY 0x10 /* 0x0138 */
30 #define MV64x60_CPU_ERR_CAUSE 0x18 /* 0x0140 */
31 #define MV64x60_CPU_ERR_MASK 0x20 /* 0x0148 */
33 #define MV64x60_CPU_CAUSE_MASK 0x07ffffff
36 #define MV64X60_SRAM_ERR_CAUSE 0x08 /* 0x0388 */
[all …]
|
| /kernel/linux/linux-5.10/drivers/edac/ |
| D | mv64x60_edac.h | 15 #define MV64x60_REVISION " Ver: 2.0.0"
25 #define MV64x60_CPU_ERR_ADDR_LO 0x00 /* 0x0070 */
26 #define MV64x60_CPU_ERR_ADDR_HI 0x08 /* 0x0078 */
27 #define MV64x60_CPU_ERR_DATA_LO 0x00 /* 0x0128 */
28 #define MV64x60_CPU_ERR_DATA_HI 0x08 /* 0x0130 */
29 #define MV64x60_CPU_ERR_PARITY 0x10 /* 0x0138 */
30 #define MV64x60_CPU_ERR_CAUSE 0x18 /* 0x0140 */
31 #define MV64x60_CPU_ERR_MASK 0x20 /* 0x0148 */
33 #define MV64x60_CPU_CAUSE_MASK 0x07ffffff
36 #define MV64X60_SRAM_ERR_CAUSE 0x08 /* 0x0388 */
[all …]
|
| /kernel/linux/linux-4.19/drivers/gpu/drm/amd/amdgpu/ |
| D | si.c | 53 mmAZALIA_SCLK_CONTROL, 0x00000030, 0x00000011,
54 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
55 mmDB_DEBUG, 0xffffffff, 0x00000000,
56 mmDB_DEBUG2, 0xf00fffff, 0x00000400,
57 mmDB_DEBUG3, 0x0002021c, 0x00020200,
58 mmDCI_CLK_CNTL, 0x00000080, 0x00000000,
59 0x340c, 0x000000c0, 0x00800040,
60 0x360c, 0x000000c0, 0x00800040,
61 mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070,
62 mmFBC_MISC, 0x00200000, 0x50100000,
[all …]
|
| /kernel/linux/linux-4.19/arch/powerpc/include/asm/ |
| D | dbell.h | 21 #define PPC_DBELL_MSG_BRDCAST (0x04000000)
22 #define PPC_DBELL_TYPE(x) (((x) & 0xf) << (63-36))
23 #define PPC_DBELL_TYPE_MASK PPC_DBELL_TYPE(0xf)
25 #define PPC_DBELL_PIR_MASK 0x3fff
27 PPC_DBELL = 0, /* doorbell */
41 __asm__ __volatile__ (ASM_FTR_IFSET(PPC_MSGSND(%1), PPC_MSGSNDP(%1), %0) in _ppc_msgsnd()
55 __asm__ __volatile__ (ASM_FTR_IFSET(PPC_MSGSYNC " ; lwsync", "", %0) in ppc_msgsync()
61 __asm__ __volatile__ (ASM_FTR_IFSET(PPC_MSGCLR(%1), PPC_MSGCLRP(%1), %0) in _ppc_msgclr()
78 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); in _ppc_msgsnd()
102 (tag & 0x07ffffff); in ppc_msgsnd()
|
| /kernel/linux/linux-4.19/drivers/scsi/ |
| D | gvp11.c | 43 static int gvp11_xfer_mask = 0;
59 static int scsi_alloc_out_of_range = 0; in dma_setup()
63 wh->dma_bounce_len = (cmd->SCp.this_residual + 511) & ~0x1ff; in dma_setup()
78 wh->dma_bounce_len = 0; in dma_setup()
102 wh->dma_bounce_len = 0; in dma_setup()
135 bank_mask = (~wh->dma_xfer_mask >> 18) & 0x01c0; in dma_setup()
143 return 0; in dma_setup()
170 wh->dma_bounce_len = 0; in dma_stop()
215 if (q & 0x08) /* bit 3 should always be clear */ in check_wd33c93()
226 if (*scmd_3393 != q) /* and so should the image at 0x1f */ in check_wd33c93()
[all …]
|
| /kernel/linux/linux-5.10/drivers/scsi/ |
| D | gvp11.c | 43 static int gvp11_xfer_mask = 0;
59 static int scsi_alloc_out_of_range = 0; in dma_setup()
63 wh->dma_bounce_len = (cmd->SCp.this_residual + 511) & ~0x1ff; in dma_setup()
78 wh->dma_bounce_len = 0; in dma_setup()
102 wh->dma_bounce_len = 0; in dma_setup()
135 bank_mask = (~wh->dma_xfer_mask >> 18) & 0x01c0; in dma_setup()
143 return 0; in dma_setup()
170 wh->dma_bounce_len = 0; in dma_stop()
215 if (q & 0x08) /* bit 3 should always be clear */ in check_wd33c93()
226 if (*scmd_3393 != q) /* and so should the image at 0x1f */ in check_wd33c93()
[all …]
|
| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | dbell.h | 19 #define PPC_DBELL_MSG_BRDCAST (0x04000000)
20 #define PPC_DBELL_TYPE(x) (((x) & 0xf) << (63-36))
21 #define PPC_DBELL_TYPE_MASK PPC_DBELL_TYPE(0xf)
23 #define PPC_DBELL_PIR_MASK 0x3fff
25 PPC_DBELL = 0, /* doorbell */
39 __asm__ __volatile__ (ASM_FTR_IFSET(PPC_MSGSND(%1), PPC_MSGSNDP(%1), %0) in _ppc_msgsnd()
53 __asm__ __volatile__ (ASM_FTR_IFSET(PPC_MSGSYNC " ; lwsync", "", %0) in ppc_msgsync()
59 __asm__ __volatile__ (ASM_FTR_IFSET(PPC_MSGCLR(%1), PPC_MSGCLRP(%1), %0) in _ppc_msgclr()
76 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); in _ppc_msgsnd()
97 (tag & 0x07ffffff); in ppc_msgsnd()
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | si.c | 59 mmAZALIA_SCLK_CONTROL, 0x00000030, 0x00000011,
60 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
61 mmDB_DEBUG, 0xffffffff, 0x00000000,
62 mmDB_DEBUG2, 0xf00fffff, 0x00000400,
63 mmDB_DEBUG3, 0x0002021c, 0x00020200,
64 mmDCI_CLK_CNTL, 0x00000080, 0x00000000,
65 0x340c, 0x000000c0, 0x00800040,
66 0x360c, 0x000000c0, 0x00800040,
67 mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070,
68 mmFBC_MISC, 0x00200000, 0x50100000,
[all …]
|
| /kernel/linux/linux-5.10/drivers/media/platform/ti-vpe/ |
| D | sc.h | 13 #define CFG_SC0 0x0
14 #define CFG_INTERLACE_O (1 << 0)
30 #define CFG_SC1 0x4
31 #define CFG_ROW_ACC_INC_MASK 0x07ffffff
32 #define CFG_ROW_ACC_INC_SHIFT 0
34 #define CFG_SC2 0x08
35 #define CFG_ROW_ACC_OFFSET_MASK 0x0fffffff
36 #define CFG_ROW_ACC_OFFSET_SHIFT 0
38 #define CFG_SC3 0x0c
39 #define CFG_ROW_ACC_OFFSET_B_MASK 0x0fffffff
[all …]
|
| /kernel/linux/linux-5.10/drivers/video/fbdev/ |
| D | carminefb_regs.h | 5 #define CARMINE_OVERLAY_EXT_MODE (0x00000002)
6 #define CARMINE_GRAPH_REG (0x00000000)
7 #define CARMINE_DISP0_REG (0x00100000)
8 #define CARMINE_DISP1_REG (0x00140000)
9 #define CARMINE_WB_REG (0x00180000)
10 #define CARMINE_DCTL_REG (0x00300000)
11 #define CARMINE_CTL_REG (0x00400000)
12 #define CARMINE_WINDOW_MODE (0x00000001)
19 #define CARMINE_EXT_CMODE_DIRECT24_RGBA (0xC0000000)
20 #define CARMINE_DCTL_REG_MODE_ADD (0x00)
[all …]
|
| /kernel/linux/linux-4.19/drivers/video/fbdev/ |
| D | carminefb_regs.h | 5 #define CARMINE_OVERLAY_EXT_MODE (0x00000002)
6 #define CARMINE_GRAPH_REG (0x00000000)
7 #define CARMINE_DISP0_REG (0x00100000)
8 #define CARMINE_DISP1_REG (0x00140000)
9 #define CARMINE_WB_REG (0x00180000)
10 #define CARMINE_DCTL_REG (0x00300000)
11 #define CARMINE_CTL_REG (0x00400000)
12 #define CARMINE_WINDOW_MODE (0x00000001)
19 #define CARMINE_EXT_CMODE_DIRECT24_RGBA (0xC0000000)
20 #define CARMINE_DCTL_REG_MODE_ADD (0x00)
[all …]
|
| /kernel/linux/linux-4.19/drivers/media/platform/ti-vpe/ |
| D | sc.h | 16 #define CFG_SC0 0x0
17 #define CFG_INTERLACE_O (1 << 0)
33 #define CFG_SC1 0x4
34 #define CFG_ROW_ACC_INC_MASK 0x07ffffff
35 #define CFG_ROW_ACC_INC_SHIFT 0
37 #define CFG_SC2 0x08
38 #define CFG_ROW_ACC_OFFSET_MASK 0x0fffffff
39 #define CFG_ROW_ACC_OFFSET_SHIFT 0
41 #define CFG_SC3 0x0c
42 #define CFG_ROW_ACC_OFFSET_B_MASK 0x0fffffff
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | faraday,ftpci100.txt | 9 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday
10 Technology) and product ID 0x4321.
23 - bus-range: set to <0x00 0xff>
45 - #address-cells: set to <0>
64 interrupt-map-mask = <0xf800 0 0 7>;
66 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
67 <0x4800 0 0 2 &pci_intc 1>,
68 <0x4800 0 0 3 &pci_intc 2>,
69 <0x4800 0 0 4 &pci_intc 3>,
70 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/pci/ |
| D | faraday,ftpci100.txt | 9 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday
10 Technology) and product ID 0x4321.
23 - bus-range: set to <0x00 0xff>
45 - #address-cells: set to <0>
64 interrupt-map-mask = <0xf800 0 0 7>;
66 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
67 <0x4800 0 0 2 &pci_intc 1>,
68 <0x4800 0 0 3 &pci_intc 2>,
69 <0x4800 0 0 4 &pci_intc 3>,
70 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
[all …]
|
| /kernel/linux/linux-5.10/drivers/char/xilinx_hwicap/ |
| D | xilinx_hwicap.h | 43 u32 write_buffer_in_use; /* Always in [0,3] */
45 u32 read_buffer_in_use; /* Always in [0,3] */
65 * Return 0 if successful.
70 * Return 0 if successful.
75 * D8 - 0 = configuration error
78 * D5 - 0 = abort in progress
101 #define XHI_PAD_FRAMES 0x1
104 #define XHI_WORD_COUNT_MASK_TYPE_1 0x7FFUL
105 #define XHI_WORD_COUNT_MASK_TYPE_2 0x1FFFFFUL
106 #define XHI_TYPE_MASK 0x7
[all …]
|
| /kernel/linux/linux-4.19/drivers/char/xilinx_hwicap/ |
| D | xilinx_hwicap.h | 43 u32 write_buffer_in_use; /* Always in [0,3] */
45 u32 read_buffer_in_use; /* Always in [0,3] */
65 * Return 0 if successful.
70 * Return 0 if successful.
75 * D8 - 0 = configuration error
78 * D5 - 0 = abort in progress
101 #define XHI_PAD_FRAMES 0x1
104 #define XHI_WORD_COUNT_MASK_TYPE_1 0x7FFUL
105 #define XHI_WORD_COUNT_MASK_TYPE_2 0x1FFFFFUL
106 #define XHI_TYPE_MASK 0x7
[all …]
|
| /kernel/linux/linux-5.10/drivers/usb/musb/ |
| D | tusb6010.h | 12 /* VLYNQ control register. 32-bit at offset 0x000 */
13 #define TUSB_VLYNQ_CTRL 0x004
15 /* Mentor Graphics OTG core registers. 8,- 16- and 32-bit at offset 0x400 */
16 #define TUSB_BASE_OFFSET 0x400
18 /* FIFO registers 32-bit at offset 0x600 */
19 #define TUSB_FIFO_BASE 0x600
21 /* Device System & Control registers. 32-bit at offset 0x800 */
22 #define TUSB_SYS_REG_BASE 0x800
24 #define TUSB_DEV_CONF (TUSB_SYS_REG_BASE + 0x000)
28 #define TUSB_DEV_CONF_ID_SEL (1 << 0)
[all …]
|
| /kernel/linux/linux-4.19/drivers/usb/musb/ |
| D | tusb6010.h | 12 /* VLYNQ control register. 32-bit at offset 0x000 */
13 #define TUSB_VLYNQ_CTRL 0x004
15 /* Mentor Graphics OTG core registers. 8,- 16- and 32-bit at offset 0x400 */
16 #define TUSB_BASE_OFFSET 0x400
18 /* FIFO registers 32-bit at offset 0x600 */
19 #define TUSB_FIFO_BASE 0x600
21 /* Device System & Control registers. 32-bit at offset 0x800 */
22 #define TUSB_SYS_REG_BASE 0x800
24 #define TUSB_DEV_CONF (TUSB_SYS_REG_BASE + 0x000)
28 #define TUSB_DEV_CONF_ID_SEL (1 << 0)
[all …]
|