Searched +full:0 +full:x0c00 (Results 1 – 25 of 483) sorted by relevance
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| /kernel/linux/linux-5.10/drivers/net/dsa/mv88e6xxx/ |
| D | smi.h | 15 /* Offset 0x00: SMI Command Register */
16 #define MV88E6XXX_SMI_CMD 0x00
17 #define MV88E6XXX_SMI_CMD_BUSY 0x8000
18 #define MV88E6XXX_SMI_CMD_MODE_MASK 0x1000
19 #define MV88E6XXX_SMI_CMD_MODE_45 0x0000
20 #define MV88E6XXX_SMI_CMD_MODE_22 0x1000
21 #define MV88E6XXX_SMI_CMD_OP_MASK 0x0c00
22 #define MV88E6XXX_SMI_CMD_OP_22_WRITE 0x0400
23 #define MV88E6XXX_SMI_CMD_OP_22_READ 0x0800
24 #define MV88E6XXX_SMI_CMD_OP_45_WRITE_ADDR 0x0000
[all …]
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| D | port.h | 16 /* Offset 0x00: Port Status Register */
17 #define MV88E6XXX_PORT_STS 0x00
18 #define MV88E6XXX_PORT_STS_PAUSE_EN 0x8000
19 #define MV88E6XXX_PORT_STS_MY_PAUSE 0x4000
20 #define MV88E6XXX_PORT_STS_HD_FLOW 0x2000
21 #define MV88E6XXX_PORT_STS_PHY_DETECT 0x1000
22 #define MV88E6250_PORT_STS_LINK 0x1000
23 #define MV88E6250_PORT_STS_PORTMODE_MASK 0x0f00
24 #define MV88E6250_PORT_STS_PORTMODE_PHY_10_HALF 0x0800
25 #define MV88E6250_PORT_STS_PORTMODE_PHY_100_HALF 0x0900
[all …]
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| /kernel/linux/linux-5.10/arch/x86/math-emu/ |
| D | control_w.h | 20 #define CW_RC _Const_(0x0C00) /* rounding control */
21 #define CW_PC _Const_(0x0300) /* precision control */
23 #define CW_Precision Const_(0x0020) /* loss of precision mask */
24 #define CW_Underflow Const_(0x0010) /* underflow mask */
25 #define CW_Overflow Const_(0x0008) /* overflow mask */
26 #define CW_ZeroDiv Const_(0x0004) /* divide by zero mask */
27 #define CW_Denormal Const_(0x0002) /* denormalized operand mask */
28 #define CW_Invalid Const_(0x0001) /* invalid operation mask */
30 #define CW_Exceptions _Const_(0x003f) /* all masks */
32 #define RC_RND _Const_(0x0000)
[all …]
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| /kernel/linux/linux-4.19/arch/x86/math-emu/ |
| D | control_w.h | 20 #define CW_RC _Const_(0x0C00) /* rounding control */
21 #define CW_PC _Const_(0x0300) /* precision control */
23 #define CW_Precision Const_(0x0020) /* loss of precision mask */
24 #define CW_Underflow Const_(0x0010) /* underflow mask */
25 #define CW_Overflow Const_(0x0008) /* overflow mask */
26 #define CW_ZeroDiv Const_(0x0004) /* divide by zero mask */
27 #define CW_Denormal Const_(0x0002) /* denormalized operand mask */
28 #define CW_Invalid Const_(0x0001) /* invalid operation mask */
30 #define CW_Exceptions _Const_(0x003f) /* all masks */
32 #define RC_RND _Const_(0x0000)
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| D | clk-exynos5260.h | 15 #define MUX_SEL_AUD 0x0200
16 #define MUX_ENABLE_AUD 0x0300
17 #define MUX_STAT_AUD 0x0400
18 #define MUX_IGNORE_AUD 0x0500
19 #define DIV_AUD0 0x0600
20 #define DIV_AUD1 0x0604
21 #define DIV_STAT_AUD0 0x0700
22 #define DIV_STAT_AUD1 0x0704
23 #define EN_ACLK_AUD 0x0800
24 #define EN_PCLK_AUD 0x0900
[all …]
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| /kernel/linux/linux-4.19/drivers/clk/samsung/ |
| D | clk-exynos5260.h | 18 #define MUX_SEL_AUD 0x0200
19 #define MUX_ENABLE_AUD 0x0300
20 #define MUX_STAT_AUD 0x0400
21 #define MUX_IGNORE_AUD 0x0500
22 #define DIV_AUD0 0x0600
23 #define DIV_AUD1 0x0604
24 #define DIV_STAT_AUD0 0x0700
25 #define DIV_STAT_AUD1 0x0704
26 #define EN_ACLK_AUD 0x0800
27 #define EN_PCLK_AUD 0x0900
[all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/brcm80211/include/ |
| D | brcmu_d11.h | 20 /* bit 0~7 channel number
21 * for 80+80 channels: bit 0~3 low channel id, bit 4~7 high channel id
23 #define BRCMU_CHSPEC_CH_MASK 0x00ff
24 #define BRCMU_CHSPEC_CH_SHIFT 0
25 #define BRCMU_CHSPEC_CHL_MASK 0x000f
26 #define BRCMU_CHSPEC_CHL_SHIFT 0
27 #define BRCMU_CHSPEC_CHH_MASK 0x00f0
36 #define BRCMU_CHSPEC_D11N_SB_MASK 0x0300
38 #define BRCMU_CHSPEC_D11N_SB_L 0x0100 /* control lower */
39 #define BRCMU_CHSPEC_D11N_SB_U 0x0200 /* control upper */
[all …]
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| D | brcmu_wifi.h | 18 #define CH_UPPER_SB 0x01
19 #define CH_LOWER_SB 0x02
20 #define CH_EWA_VALID 0x04
32 #define BAND_2G_INDEX 0 /* wlc->bandstate[x] index */
42 #define WL_CHANSPEC_CHAN_MASK 0x00ff
43 #define WL_CHANSPEC_CHAN_SHIFT 0
45 #define WL_CHANSPEC_CTL_SB_MASK 0x0300
47 #define WL_CHANSPEC_CTL_SB_LOWER 0x0100
48 #define WL_CHANSPEC_CTL_SB_UPPER 0x0200
49 #define WL_CHANSPEC_CTL_SB_NONE 0x0300
[all …]
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| /kernel/linux/linux-4.19/arch/powerpc/boot/ |
| D | gamecube-head.S | 33 rlwinm 9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
47 li 8, 0
48 mtspr 0x210, 8 /* IBAT0U */
49 mtspr 0x212, 8 /* IBAT1U */
50 mtspr 0x214, 8 /* IBAT2U */
51 mtspr 0x216, 8 /* IBAT3U */
52 mtspr 0x218, 8 /* DBAT0U */
53 mtspr 0x21a, 8 /* DBAT1U */
54 mtspr 0x21c, 8 /* DBAT2U */
55 mtspr 0x21e, 8 /* DBAT3U */
[all …]
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| D | wii-head.S | 34 rlwinm 9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
48 li 8, 0
49 mtspr 0x210, 8 /* IBAT0U */
50 mtspr 0x212, 8 /* IBAT1U */
51 mtspr 0x214, 8 /* IBAT2U */
52 mtspr 0x216, 8 /* IBAT3U */
53 mtspr 0x218, 8 /* DBAT0U */
54 mtspr 0x21a, 8 /* DBAT1U */
55 mtspr 0x21c, 8 /* DBAT2U */
56 mtspr 0x21e, 8 /* DBAT3U */
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/ |
| D | gamecube-head.S | 28 rlwinm 9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
42 li 8, 0
43 mtspr 0x210, 8 /* IBAT0U */
44 mtspr 0x212, 8 /* IBAT1U */
45 mtspr 0x214, 8 /* IBAT2U */
46 mtspr 0x216, 8 /* IBAT3U */
47 mtspr 0x218, 8 /* DBAT0U */
48 mtspr 0x21a, 8 /* DBAT1U */
49 mtspr 0x21c, 8 /* DBAT2U */
50 mtspr 0x21e, 8 /* DBAT3U */
[all …]
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| D | wii-head.S | 29 rlwinm 9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
43 li 8, 0
44 mtspr 0x210, 8 /* IBAT0U */
45 mtspr 0x212, 8 /* IBAT1U */
46 mtspr 0x214, 8 /* IBAT2U */
47 mtspr 0x216, 8 /* IBAT3U */
48 mtspr 0x218, 8 /* DBAT0U */
49 mtspr 0x21a, 8 /* DBAT1U */
50 mtspr 0x21c, 8 /* DBAT2U */
51 mtspr 0x21e, 8 /* DBAT3U */
[all …]
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| /kernel/linux/linux-4.19/sound/soc/codecs/ |
| D | tfa9879.h | 12 #define TFA9879_DEVICE_CONTROL 0x00
13 #define TFA9879_SERIAL_INTERFACE_1 0x01
14 #define TFA9879_PCM_IOM2_FORMAT_1 0x02
15 #define TFA9879_SERIAL_INTERFACE_2 0x03
16 #define TFA9879_PCM_IOM2_FORMAT_2 0x04
17 #define TFA9879_EQUALIZER_A1 0x05
18 #define TFA9879_EQUALIZER_A2 0x06
19 #define TFA9879_EQUALIZER_B1 0x07
20 #define TFA9879_EQUALIZER_B2 0x08
21 #define TFA9879_EQUALIZER_C1 0x09
[all …]
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| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | tfa9879.h | 12 #define TFA9879_DEVICE_CONTROL 0x00
13 #define TFA9879_SERIAL_INTERFACE_1 0x01
14 #define TFA9879_PCM_IOM2_FORMAT_1 0x02
15 #define TFA9879_SERIAL_INTERFACE_2 0x03
16 #define TFA9879_PCM_IOM2_FORMAT_2 0x04
17 #define TFA9879_EQUALIZER_A1 0x05
18 #define TFA9879_EQUALIZER_A2 0x06
19 #define TFA9879_EQUALIZER_B1 0x07
20 #define TFA9879_EQUALIZER_B2 0x08
21 #define TFA9879_EQUALIZER_C1 0x09
[all …]
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| /kernel/linux/linux-4.19/drivers/net/wireless/broadcom/brcm80211/include/ |
| D | brcmu_d11.h | 31 /* bit 0~7 channel number
32 * for 80+80 channels: bit 0~3 low channel id, bit 4~7 high channel id
34 #define BRCMU_CHSPEC_CH_MASK 0x00ff
35 #define BRCMU_CHSPEC_CH_SHIFT 0
36 #define BRCMU_CHSPEC_CHL_MASK 0x000f
37 #define BRCMU_CHSPEC_CHL_SHIFT 0
38 #define BRCMU_CHSPEC_CHH_MASK 0x00f0
47 #define BRCMU_CHSPEC_D11N_SB_MASK 0x0300
49 #define BRCMU_CHSPEC_D11N_SB_L 0x0100 /* control lower */
50 #define BRCMU_CHSPEC_D11N_SB_U 0x0200 /* control upper */
[all …]
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| D | brcmu_wifi.h | 29 #define CH_UPPER_SB 0x01
30 #define CH_LOWER_SB 0x02
31 #define CH_EWA_VALID 0x04
43 #define BAND_2G_INDEX 0 /* wlc->bandstate[x] index */
53 #define WL_CHANSPEC_CHAN_MASK 0x00ff
54 #define WL_CHANSPEC_CHAN_SHIFT 0
56 #define WL_CHANSPEC_CTL_SB_MASK 0x0300
58 #define WL_CHANSPEC_CTL_SB_LOWER 0x0100
59 #define WL_CHANSPEC_CTL_SB_UPPER 0x0200
60 #define WL_CHANSPEC_CTL_SB_NONE 0x0300
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | phy-mtk-tphy.txt | 5 controllers on MediaTek SoCs, such as, USB2.0, USB3.0, PCIe, and SATA.
23 the child's base address to 0, the physical address
72 reg = <0 0x11290000 0 0x800>;
78 reg = <0 0x11290800 0 0x100>;
85 reg = <0 0x11290800 0 0x700>;
92 reg = <0 0x11291000 0 0x100>;
113 phy-names = "usb2-0", "usb3-0";
122 shared 0x0000 SPLLC
123 0x0100 FMREG
124 u2 port0 0x0800 U2PHY_COM
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/phy/ |
| D | phy-mtk-tphy.txt | 5 controllers on MediaTek SoCs, such as, USB2.0, USB3.0, PCIe, and SATA.
19 "u3phya_ref": for reference clock of usb3.0 analog phy.
60 reg = <0 0x11290000 0 0x800>;
66 reg = <0 0x11290800 0 0x100>;
73 reg = <0 0x11290800 0 0x700>;
80 reg = <0 0x11291000 0 0x100>;
101 phy-names = "usb2-0", "usb3-0";
110 shared 0x0000 SPLLC
111 0x0100 FMREG
112 u2 port0 0x0800 U2PHY_COM
[all …]
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| /kernel/linux/linux-5.10/net/nfc/ |
| D | digital_technology.c | 11 #define DIGITAL_CMD_SENS_REQ 0x26
12 #define DIGITAL_CMD_ALL_REQ 0x52
13 #define DIGITAL_CMD_SEL_REQ_CL1 0x93
14 #define DIGITAL_CMD_SEL_REQ_CL2 0x95
15 #define DIGITAL_CMD_SEL_REQ_CL3 0x97
17 #define DIGITAL_SDD_REQ_SEL_PAR 0x20
19 #define DIGITAL_SDD_RES_CT 0x88
23 #define DIGITAL_SEL_RES_NFCID1_COMPLETE(sel_res) (!((sel_res) & 0x04))
24 #define DIGITAL_SEL_RES_IS_T2T(sel_res) (!((sel_res) & 0x60))
25 #define DIGITAL_SEL_RES_IS_T4T(sel_res) ((sel_res) & 0x20)
[all …]
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| /kernel/linux/linux-4.19/net/nfc/ |
| D | digital_technology.c | 20 #define DIGITAL_CMD_SENS_REQ 0x26
21 #define DIGITAL_CMD_ALL_REQ 0x52
22 #define DIGITAL_CMD_SEL_REQ_CL1 0x93
23 #define DIGITAL_CMD_SEL_REQ_CL2 0x95
24 #define DIGITAL_CMD_SEL_REQ_CL3 0x97
26 #define DIGITAL_SDD_REQ_SEL_PAR 0x20
28 #define DIGITAL_SDD_RES_CT 0x88
32 #define DIGITAL_SEL_RES_NFCID1_COMPLETE(sel_res) (!((sel_res) & 0x04))
33 #define DIGITAL_SEL_RES_IS_T2T(sel_res) (!((sel_res) & 0x60))
34 #define DIGITAL_SEL_RES_IS_T4T(sel_res) ((sel_res) & 0x20)
[all …]
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| /kernel/linux/linux-5.10/drivers/media/dvb-frontends/ |
| D | atbm8830_priv.h | 19 #define REG_CHIP_ID 0x0000
20 #define REG_TUNER_BASEBAND 0x0001
21 #define REG_DEMOD_RUN 0x0004
22 #define REG_DSP_RESET 0x0005
23 #define REG_RAM_RESET 0x0006
24 #define REG_ADC_RESET 0x0007
25 #define REG_TSPORT_RESET 0x0008
26 #define REG_BLKERR_POL 0x000C
27 #define REG_I2C_GATE 0x0103
28 #define REG_TS_SAMPLE_EDGE 0x0301
[all …]
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| /kernel/linux/linux-5.10/arch/csky/kernel/probes/ |
| D | simulate-insn.h | 20 } while (0)
22 __CSKY_INSN_FUNCS(br16, 0xfc00, 0x0400)
23 __CSKY_INSN_FUNCS(bt16, 0xfc00, 0x0800)
24 __CSKY_INSN_FUNCS(bf16, 0xfc00, 0x0c00)
25 __CSKY_INSN_FUNCS(jmp16, 0xffc3, 0x7800)
26 __CSKY_INSN_FUNCS(jsr16, 0xffc3, 0x7801)
27 __CSKY_INSN_FUNCS(lrw16, 0xfc00, 0x1000)
28 __CSKY_INSN_FUNCS(pop16, 0xffe0, 0x1480)
30 __CSKY_INSN_FUNCS(br32, 0x0000ffff, 0x0000e800)
31 __CSKY_INSN_FUNCS(bt32, 0x0000ffff, 0x0000e860)
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-imx/ |
| D | iim.h | 11 #define MXC_IIMSTAT 0x0000
12 #define MXC_IIMSTATM 0x0004
13 #define MXC_IIMERR 0x0008
14 #define MXC_IIMEMASK 0x000C
15 #define MXC_IIMFCTL 0x0010
16 #define MXC_IIMUA 0x0014
17 #define MXC_IIMLA 0x0018
18 #define MXC_IIMSDAT 0x001C
19 #define MXC_IIMPREV 0x0020
20 #define MXC_IIMSREV 0x0024
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mmc/ |
| D | cavium-mmc.txt | 34 reg = <0x0c00 0 0 0 0>; /* DEVFN = 0x0c (1:4) */
36 #size-cells = <0>;
39 mmc-slot@0 {
41 reg = <0>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | cavium-mmc.txt | 34 reg = <0x0c00 0 0 0 0>; /* DEVFN = 0x0c (1:4) */
36 #size-cells = <0>;
39 mmc-slot@0 {
41 reg = <0>;
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