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/kernel/linux/linux-4.19/drivers/media/pci/cx18/
Dcx18-av-firmware.c22 #define CX18_AUDIO_ENABLE 0xc72014
23 #define CX18_AI1_MUX_MASK 0x30
24 #define CX18_AI1_MUX_I2S1 0x00
25 #define CX18_AI1_MUX_I2S2 0x10
26 #define CX18_AI1_MUX_843_I2S 0x20
27 #define CX18_AI1_MUX_INVALID 0x30
34 int ret = 0; in cx18_av_verifyfw()
43 dl_control &= 0x00ffffff; in cx18_av_verifyfw()
44 dl_control |= 0x0f000000; in cx18_av_verifyfw()
47 } while ((dl_control & 0xff000000) != 0x0f000000); in cx18_av_verifyfw()
[all …]
/kernel/linux/linux-5.10/drivers/media/pci/cx18/
Dcx18-av-firmware.c13 #define CX18_AUDIO_ENABLE 0xc72014
14 #define CX18_AI1_MUX_MASK 0x30
15 #define CX18_AI1_MUX_I2S1 0x00
16 #define CX18_AI1_MUX_I2S2 0x10
17 #define CX18_AI1_MUX_843_I2S 0x20
18 #define CX18_AI1_MUX_INVALID 0x30
25 int ret = 0; in cx18_av_verifyfw()
34 dl_control &= 0x00ffffff; in cx18_av_verifyfw()
35 dl_control |= 0x0f000000; in cx18_av_verifyfw()
38 } while ((dl_control & 0xff000000) != 0x0f000000); in cx18_av_verifyfw()
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
Dtable.c7 0x01c, 0x07000000,
8 0x800, 0x00040000,
9 0x804, 0x00008003,
10 0x808, 0x0000fc00,
11 0x80c, 0x0000000a,
12 0x810, 0x10005088,
13 0x814, 0x020c3d10,
14 0x818, 0x00200185,
15 0x81c, 0x00000000,
16 0x820, 0x01000000,
[all …]
/kernel/linux/linux-4.19/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
Dtable.c30 0x01c, 0x07000000,
31 0x800, 0x00040000,
32 0x804, 0x00008003,
33 0x808, 0x0000fc00,
34 0x80c, 0x0000000a,
35 0x810, 0x10005088,
36 0x814, 0x020c3d10,
37 0x818, 0x00200185,
38 0x81c, 0x00000000,
39 0x820, 0x01000000,
[all …]
/kernel/linux/linux-5.10/include/linux/
Dfsl_ifc.h26 #define FSL_IFC_VERSION_MASK 0x0F0F0000
27 #define FSL_IFC_VERSION_1_0_0 0x01000000
28 #define FSL_IFC_VERSION_1_1_0 0x01010000
29 #define FSL_IFC_VERSION_2_0_0 0x02000000
37 #define CSPR_BA 0xFFFF0000
39 #define CSPR_PORT_SIZE 0x00000180
42 #define CSPR_PORT_SIZE_8 0x00000080
44 #define CSPR_PORT_SIZE_16 0x00000100
46 #define CSPR_PORT_SIZE_32 0x00000180
48 #define CSPR_WP 0x00000040
[all …]
/kernel/linux/linux-4.19/include/linux/
Dfsl_ifc.h39 #define FSL_IFC_VERSION_MASK 0x0F0F0000
40 #define FSL_IFC_VERSION_1_0_0 0x01000000
41 #define FSL_IFC_VERSION_1_1_0 0x01010000
42 #define FSL_IFC_VERSION_2_0_0 0x02000000
50 #define CSPR_BA 0xFFFF0000
52 #define CSPR_PORT_SIZE 0x00000180
55 #define CSPR_PORT_SIZE_8 0x00000080
57 #define CSPR_PORT_SIZE_16 0x00000100
59 #define CSPR_PORT_SIZE_32 0x00000180
61 #define CSPR_WP 0x00000040
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Dsorg94.c33 nvkm_mask(device, 0x61c128 + loff, 0x0000003f, watermark); in g94_sor_dp_watermark()
42 nvkm_mask(device, 0x61c10c + loff, 0x000001fc, TU << 2); in g94_sor_dp_activesym()
43 nvkm_mask(device, 0x61c128 + loff, 0x010f7f00, VTUa << 24 | in g94_sor_dp_activesym()
53 nvkm_mask(device, 0x61c1e8 + soff, 0x0000ffff, h); in g94_sor_dp_audio_sym()
54 nvkm_mask(device, 0x61c1ec + soff, 0x00ffffff, v); in g94_sor_dp_audio_sym()
65 data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift); in g94_sor_dp_drive()
66 data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift); in g94_sor_dp_drive()
67 data[2] = nvkm_rd32(device, 0x61c130 + loff); in g94_sor_dp_drive()
68 if ((data[2] & 0x0000ff00) < (pu << 8) || ln == 0) in g94_sor_dp_drive()
69 data[2] = (data[2] & ~0x0000ff00) | (pu << 8); in g94_sor_dp_drive()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Dsorg94.c33 nvkm_mask(device, 0x61c128 + loff, 0x0000003f, watermark); in g94_sor_dp_watermark()
42 nvkm_mask(device, 0x61c10c + loff, 0x000001fc, TU << 2); in g94_sor_dp_activesym()
43 nvkm_mask(device, 0x61c128 + loff, 0x010f7f00, VTUa << 24 | in g94_sor_dp_activesym()
53 nvkm_mask(device, 0x61c1e8 + soff, 0x0000ffff, h); in g94_sor_dp_audio_sym()
54 nvkm_mask(device, 0x61c1ec + soff, 0x00ffffff, v); in g94_sor_dp_audio_sym()
65 data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift); in g94_sor_dp_drive()
66 data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift); in g94_sor_dp_drive()
67 data[2] = nvkm_rd32(device, 0x61c130 + loff); in g94_sor_dp_drive()
68 if ((data[2] & 0x0000ff00) < (pu << 8) || ln == 0) in g94_sor_dp_drive()
69 data[2] = (data[2] & ~0x0000ff00) | (pu << 8); in g94_sor_dp_drive()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/hisilicon/hns3/hns3pf/
Dhclge_err.h15 #define HCLGE_RAS_PF_OTHER_INT_STS_REG 0x20B00
16 #define HCLGE_RAS_REG_NFE_MASK 0xFF00
17 #define HCLGE_RAS_REG_ROCEE_ERR_MASK 0x3000000
19 #define HCLGE_VECTOR0_REG_MSIX_MASK 0x1FF00
21 #define HCLGE_IMP_TCM_ECC_ERR_INT_EN 0xFFFF0000
22 #define HCLGE_IMP_TCM_ECC_ERR_INT_EN_MASK 0xFFFF0000
23 #define HCLGE_IMP_ITCM4_ECC_ERR_INT_EN 0x300
24 #define HCLGE_IMP_ITCM4_ECC_ERR_INT_EN_MASK 0x300
25 #define HCLGE_CMDQ_NIC_ECC_ERR_INT_EN 0xFFFF
26 #define HCLGE_CMDQ_NIC_ECC_ERR_INT_EN_MASK 0xFFFF
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/ralink/rt2x00/
Drt2800.h49 #define RF2820 0x0001
50 #define RF2850 0x0002
51 #define RF2720 0x0003
52 #define RF2750 0x0004
53 #define RF3020 0x0005
54 #define RF2020 0x0006
55 #define RF3021 0x0007
56 #define RF3022 0x0008
57 #define RF3052 0x0009
58 #define RF2853 0x000a
[all …]
/kernel/linux/linux-5.10/sound/soc/fsl/
Dfsl_dma.h10 u8 res0[0x100];
30 u8 res2[0x38];
35 #define CCSR_DMA_MR_BWC_DISABLED 0x0F000000
37 #define CCSR_DMA_MR_BWC_MASK 0x0F000000
40 #define CCSR_DMA_MR_EMP_EN 0x00200000
41 #define CCSR_DMA_MR_EMS_EN 0x00040000
42 #define CCSR_DMA_MR_DAHTS_MASK 0x00030000
43 #define CCSR_DMA_MR_DAHTS_1 0x00000000
44 #define CCSR_DMA_MR_DAHTS_2 0x00010000
45 #define CCSR_DMA_MR_DAHTS_4 0x00020000
[all …]
/kernel/linux/linux-4.19/sound/soc/fsl/
Dfsl_dma.h13 u8 res0[0x100];
33 u8 res2[0x38];
38 #define CCSR_DMA_MR_BWC_DISABLED 0x0F000000
40 #define CCSR_DMA_MR_BWC_MASK 0x0F000000
43 #define CCSR_DMA_MR_EMP_EN 0x00200000
44 #define CCSR_DMA_MR_EMS_EN 0x00040000
45 #define CCSR_DMA_MR_DAHTS_MASK 0x00030000
46 #define CCSR_DMA_MR_DAHTS_1 0x00000000
47 #define CCSR_DMA_MR_DAHTS_2 0x00010000
48 #define CCSR_DMA_MR_DAHTS_4 0x00020000
[all …]
/kernel/linux/linux-4.19/drivers/net/wireless/ralink/rt2x00/
Drt2800.h59 #define RF2820 0x0001
60 #define RF2850 0x0002
61 #define RF2720 0x0003
62 #define RF2750 0x0004
63 #define RF3020 0x0005
64 #define RF2020 0x0006
65 #define RF3021 0x0007
66 #define RF3022 0x0008
67 #define RF3052 0x0009
68 #define RF2853 0x000a
[all …]
/kernel/linux/linux-5.10/drivers/staging/rtl8723bs/hal/
DHalHWImg8723B_MAC.c16 ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA */ in CheckPositive()
31 pDM_Odm->TypeGLNA << 0 | in CheckPositive()
41 "===> [8812A] CheckPositive (cond1, cond2) = (0x%X 0x%X)\n", in CheckPositive()
51 "===> [8812A] CheckPositive (driver1, driver2) = (0x%X 0x%X)\n", in CheckPositive()
62 " (Platform, Interface) = (0x%X, 0x%X)\n", in CheckPositive()
72 " (Board, Package) = (0x%X, 0x%X)\n", in CheckPositive()
82 if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) in CheckPositive()
84 if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) in CheckPositive()
90 cond1 &= 0x000F0FFF; in CheckPositive()
91 driver1 &= 0x000F0FFF; in CheckPositive()
[all …]
/kernel/linux/linux-4.19/drivers/staging/rtl8723bs/hal/
DHalHWImg8723B_MAC.c16 ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA */ in CheckPositive()
31 pDM_Odm->TypeGLNA << 0 | in CheckPositive()
41 "===> [8812A] CheckPositive (cond1, cond2) = (0x%X 0x%X)\n", in CheckPositive()
51 "===> [8812A] CheckPositive (driver1, driver2) = (0x%X 0x%X)\n", in CheckPositive()
62 " (Platform, Interface) = (0x%X, 0x%X)\n", in CheckPositive()
72 " (Board, Package) = (0x%X, 0x%X)\n", in CheckPositive()
82 if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) in CheckPositive()
84 if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) in CheckPositive()
90 cond1 &= 0x000F0FFF; in CheckPositive()
91 driver1 &= 0x000F0FFF; in CheckPositive()
[all …]
/kernel/linux/linux-5.10/drivers/bus/
Dda8xx-mstpri.c29 #define DA8XX_MSTPRI0_OFFSET 0
34 DA8XX_MSTPRI_ARM_I = 0,
62 .shift = 0,
63 .mask = 0x0000000f,
68 .mask = 0x000000f0,
73 .mask = 0x000f0000,
78 .mask = 0x00f00000,
82 .shift = 0,
83 .mask = 0x0000000f,
88 .mask = 0x000000f0,
[all …]
/kernel/linux/linux-4.19/drivers/bus/
Dda8xx-mstpri.c32 #define DA8XX_MSTPRI0_OFFSET 0
37 DA8XX_MSTPRI_ARM_I = 0,
65 .shift = 0,
66 .mask = 0x0000000f,
71 .mask = 0x000000f0,
76 .mask = 0x000f0000,
81 .mask = 0x00f00000,
85 .shift = 0,
86 .mask = 0x0000000f,
91 .mask = 0x000000f0,
[all …]
/kernel/linux/linux-4.19/drivers/staging/rtlwifi/phydm/rtl8822b/
Dhalhwimg8822b_mac.c24 u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ in check_positive()
35 u8 pkg_type_for_para = (dm->package_type == 0) ? 14 : dm->package_type; in check_positive()
38 (dm->support_interface & 0xF0) << 16 | in check_positive()
40 (dm->support_interface & 0x0F) << 8 | _board_type; in check_positive()
42 u32 driver2 = (dm->type_glna & 0xFF) << 0 | (dm->type_gpa & 0xFF) << 8 | in check_positive()
43 (dm->type_alna & 0xFF) << 16 | in check_positive()
44 (dm->type_apa & 0xFF) << 24; in check_positive()
46 u32 driver3 = 0; in check_positive()
48 u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | (dm->type_gpa & 0xFF00) | in check_positive()
49 (dm->type_alna & 0xFF00) << 8 | in check_positive()
[all …]
/kernel/linux/linux-4.19/drivers/atm/
DuPD98401.h14 #define uPD98401_PORTS 0x24 /* probably more ? */
21 #define uPD98401_OPEN_CHAN 0x20000000 /* open channel */
22 #define uPD98401_CHAN_ADDR 0x0003fff8 /* channel address */
24 #define uPD98401_CLOSE_CHAN 0x24000000 /* close channel */
25 #define uPD98401_CHAN_RT 0x02000000 /* RX/TX (0 TX, 1 RX) */
26 #define uPD98401_DEACT_CHAN 0x28000000 /* deactivate channel */
27 #define uPD98401_TX_READY 0x30000000 /* TX ready */
28 #define uPD98401_ADD_BAT 0x34000000 /* add batches */
29 #define uPD98401_POOL 0x000f0000 /* pool number */
31 #define uPD98401_POOL_NUMBAT 0x0000ffff /* number of batches */
[all …]
/kernel/linux/linux-5.10/drivers/atm/
DuPD98401.h14 #define uPD98401_PORTS 0x24 /* probably more ? */
21 #define uPD98401_OPEN_CHAN 0x20000000 /* open channel */
22 #define uPD98401_CHAN_ADDR 0x0003fff8 /* channel address */
24 #define uPD98401_CLOSE_CHAN 0x24000000 /* close channel */
25 #define uPD98401_CHAN_RT 0x02000000 /* RX/TX (0 TX, 1 RX) */
26 #define uPD98401_DEACT_CHAN 0x28000000 /* deactivate channel */
27 #define uPD98401_TX_READY 0x30000000 /* TX ready */
28 #define uPD98401_ADD_BAT 0x34000000 /* add batches */
29 #define uPD98401_POOL 0x000f0000 /* pool number */
31 #define uPD98401_POOL_NUMBAT 0x0000ffff /* number of batches */
[all …]
/kernel/linux/linux-5.10/arch/mips/include/asm/mach-db1x00/
Dbcsr.h23 #define DB1000_BCSR_PHYS_ADDR 0x0E000000
24 #define DB1000_BCSR_HEXLED_OFS 0x01000000
26 #define DB1550_BCSR_PHYS_ADDR 0x0F000000
27 #define DB1550_BCSR_HEXLED_OFS 0x00400000
29 #define PB1550_BCSR_PHYS_ADDR 0x0F000000
30 #define PB1550_BCSR_HEXLED_OFS 0x00800000
32 #define DB1200_BCSR_PHYS_ADDR 0x19800000
33 #define DB1200_BCSR_HEXLED_OFS 0x00400000
35 #define PB1200_BCSR_PHYS_ADDR 0x0D800000
36 #define PB1200_BCSR_HEXLED_OFS 0x00400000
[all …]
/kernel/linux/linux-4.19/arch/mips/include/asm/mach-db1x00/
Dbcsr.h23 #define DB1000_BCSR_PHYS_ADDR 0x0E000000
24 #define DB1000_BCSR_HEXLED_OFS 0x01000000
26 #define DB1550_BCSR_PHYS_ADDR 0x0F000000
27 #define DB1550_BCSR_HEXLED_OFS 0x00400000
29 #define PB1550_BCSR_PHYS_ADDR 0x0F000000
30 #define PB1550_BCSR_HEXLED_OFS 0x00800000
32 #define DB1200_BCSR_PHYS_ADDR 0x19800000
33 #define DB1200_BCSR_HEXLED_OFS 0x00400000
35 #define PB1200_BCSR_PHYS_ADDR 0x0D800000
36 #define PB1200_BCSR_HEXLED_OFS 0x00400000
[all …]
/kernel/linux/linux-4.19/arch/sh/configs/
Dsh7757lcr_defconfig18 CONFIG_MEMORY_START=0x40000000
19 CONFIG_MEMORY_SIZE=0x0f000000
/kernel/linux/linux-5.10/arch/sh/configs/
Dsh7757lcr_defconfig17 CONFIG_MEMORY_START=0x40000000
18 CONFIG_MEMORY_SIZE=0x0f000000
/kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/
Dbtf.h9 #define BTF_MAGIC 0xeB9F
22 #define BTF_MAX_TYPE 0x000fffff
23 #define BTF_MAX_NAME_OFFSET 0x00ffffff
24 #define BTF_MAX_VLEN 0xffff
35 #define BTF_INFO_KIND(info) (((info) >> 24) & 0x0f)
36 #define BTF_INFO_VLEN(info) ((info) & 0xffff)
37 #define BTF_KIND_UNKN 0
51 #define BTF_INT_ENCODING(VAL) (((VAL) & 0x0f000000) >> 24)
52 #define BTF_INT_OFFSET(VAL) (((VAL & 0x00ff0000)) >> 16)
53 #define BTF_INT_BITS(VAL) ((VAL) & 0x000000ff)
[all …]

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