| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dmub_abm.c | 58 uint32_t fractional_pwm = (dc->dc->config.disable_fractional_pwm == false) ? 1 : 0; in dmub_abm_enable_fractional_pwm()
74 REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x103); in dmub_abm_init()
75 REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x101); in dmub_abm_init()
76 REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x103); in dmub_abm_init()
77 REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x101); in dmub_abm_init()
78 REG_WRITE(BL1_PWM_BL_UPDATE_SAMPLE_RATE, 0x101); in dmub_abm_init()
80 REG_SET_3(DC_ABM1_HG_MISC_CTRL, 0, in dmub_abm_init()
81 ABM1_HG_NUM_OF_BINS_SEL, 0, in dmub_abm_init()
83 ABM1_HG_BIN_BITWIDTH_SIZE_SEL, 0); in dmub_abm_init()
85 REG_SET_3(DC_ABM1_IPCSC_COEFF_SEL, 0, in dmub_abm_init()
[all …]
|
| D | dce_abm.c | 52 #define MCP_ABM_LEVEL_SET 0x65
53 #define MCP_ABM_PIPE_SET 0x66
54 #define MCP_BL_SET 0x67
61 uint32_t rampingBoundary = 0xFFFF; in dce_abm_set_pipe()
66 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_abm_set_pipe()
80 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_abm_set_pipe()
93 unsigned int backlight_8_bit = 0; in dmcu_set_backlight_level()
96 if (backlight_pwm_u16_16 & 0x10000) in dmcu_set_backlight_level()
98 backlight_8_bit = 0xFF; in dmcu_set_backlight_level()
101 backlight_8_bit = (backlight_pwm_u16_16 >> 8) & 0xFF; in dmcu_set_backlight_level()
[all …]
|
| /kernel/linux/linux-4.19/drivers/ide/ |
| D | macide.c | 26 #define IDE_BASE 0x50F1A000 /* Base address of IDE controller */
33 #define IDE_CONTROL 0x38 /* control/altstatus */
45 #define IDE_IFR 0x101 /* (0x101) IDE interrupt flags on Quadra:
47 * Bit 0+1: some interrupt flags
59 if (*ide_ifr & 0x20) in macide_test_irq()
61 return 0; in macide_test_irq()
66 *ide_ifr &= ~0x20; in macide_clear_irq()
74 memset(hw, 0, sizeof(*hw)); in macide_setup_ports()
76 for (i = 0; i < 8; i++) in macide_setup_ports()
|
| /kernel/linux/linux-5.10/drivers/ide/ |
| D | macide.c | 27 #define IDE_BASE 0x50F1A000 /* Base address of IDE controller */
34 #define IDE_CONTROL 0x38 /* control/altstatus */
46 #define IDE_IFR 0x101 /* (0x101) IDE interrupt flags on Quadra:
48 * Bit 0+1: some interrupt flags
60 if (*ide_ifr & 0x20) in macide_test_irq()
62 return 0; in macide_test_irq()
67 *ide_ifr &= ~0x20; in macide_clear_irq()
75 memset(hw, 0, sizeof(*hw)); in macide_setup_ports()
77 for (i = 0; i < 8; i++) in macide_setup_ports()
115 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); in mac_ide_probe()
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/arm64/ampere/emag/ |
| D | clock.json | 4 "EventCode": "0x11",
10 "EventCode": "0x101",
16 "EventCode": "0x110",
|
| /kernel/linux/linux-5.10/drivers/of/unittest-data/ |
| D | overlay_bad_add_dup_node.dts | 19 power_bus = < 0x1 0x2 >;
26 power_bus_emergency = < 0x101 0x102 >;
|
| /kernel/linux/linux-4.19/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_abm.c | 50 #define MCP_ABM_LEVEL_SET 0x65
51 #define MCP_ABM_PIPE_SET 0x66
52 #define MCP_BL_SET 0x67
73 if (bl_int_count == 0) in get_current_backlight_16_bit()
81 if (fractional_duty_cycle_en == 0) in get_current_backlight_16_bit()
84 bl_pwm &= 0xFFFF; in get_current_backlight_16_bit()
88 if (bl_period == 0) in get_current_backlight_16_bit()
89 bl_period = 0xFFFF; in get_current_backlight_16_bit()
96 round_result = (uint32_t)(current_backlight & 0xFFFFFFFF); in get_current_backlight_16_bit()
122 /* 1.1 multiply 8 bit value by 0x10101 to get a 24 bit value, in driver_set_backlight_level()
[all …]
|
| /kernel/linux/linux-4.19/arch/arm/probes/ |
| D | decode-arm.c | 27 #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
29 #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
80 regs->ARM_pc = iaddr + 8 + disp + ((insn >> 23) & 0x2); in simulate_blx1()
87 int rm = insn & 0xf; in simulate_blx2bx()
93 regs->ARM_pc = rmv & ~0x1; in simulate_blx2bx()
95 if (rmv & 0x1) in simulate_blx2bx()
102 int rd = (insn >> 12) & 0xf; in simulate_mrs()
103 unsigned long mask = 0xf8ff03df; /* Mask out execution state */ in simulate_mrs()
127 /* PLDI (immediate) 1111 0100 x101 xxxx xxxx xxxx xxxx xxxx */
129 /* PLD (immediate) 1111 0101 x101 xxxx xxxx xxxx xxxx xxxx */
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/probes/ |
| D | decode-arm.c | 19 #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
21 #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
72 regs->ARM_pc = iaddr + 8 + disp + ((insn >> 23) & 0x2); in simulate_blx1()
79 int rm = insn & 0xf; in simulate_blx2bx()
85 regs->ARM_pc = rmv & ~0x1; in simulate_blx2bx()
87 if (rmv & 0x1) in simulate_blx2bx()
94 int rd = (insn >> 12) & 0xf; in simulate_mrs()
95 unsigned long mask = 0xf8ff03df; /* Mask out execution state */ in simulate_mrs()
119 /* PLDI (immediate) 1111 0100 x101 xxxx xxxx xxxx xxxx xxxx */
121 /* PLD (immediate) 1111 0101 x101 xxxx xxxx xxxx xxxx xxxx */
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ |
| D | multi-inno,mi0283qt.txt | 11 the panel interface mode (IM[3:0] pins):
13 - absent: IM=x101 3-wire 9-bit data serial interface
17 - rotation: panel rotation in degrees counter clockwise (0,90,180,270)
20 mi0283qt@0{
22 reg = <0>;
25 dc-gpios = <&gpio 25 0>;
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/ |
| D | multi-inno,mi0283qt.txt | 11 the panel interface mode (IM[3:0] pins):
13 - absent: IM=x101 3-wire 9-bit data serial interface
17 - rotation: panel rotation in degrees counter clockwise (0,90,180,270)
20 mi0283qt@0{
22 reg = <0>;
25 dc-gpios = <&gpio 25 0>;
|
| /kernel/linux/linux-4.19/arch/arm64/boot/dts/marvell/ |
| D | armada-ap806-quad.dtsi | 16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0x000>;
27 reg = <0x001>;
33 reg = <0x100>;
39 reg = <0x101>;
|
| D | armada-ap810-ap0-octa-core.dtsi | 13 #size-cells = <0>;
16 cpu@0 {
19 reg = <0x000>;
25 reg = <0x001>;
31 reg = <0x100>;
37 reg = <0x101>;
43 reg = <0x200>;
49 reg = <0x201>;
55 reg = <0x300>;
61 reg = <0x301>;
|
| /kernel/linux/linux-5.10/include/soc/arc/ |
| D | timers.h | 12 #define ARC_REG_TIMER0_LIMIT 0x23 /* timer 0 limit */
13 #define ARC_REG_TIMER0_CTRL 0x22 /* timer 0 control */
14 #define ARC_REG_TIMER0_CNT 0x21 /* timer 0 count */
15 #define ARC_REG_TIMER1_LIMIT 0x102 /* timer 1 limit */
16 #define ARC_REG_TIMER1_CTRL 0x101 /* timer 1 control */
17 #define ARC_REG_TIMER1_CNT 0x100 /* timer 1 count */
20 #define TIMER_CTRL_IE (1 << 0) /* Interrupt when Count reaches limit */
23 #define ARC_TIMERN_MAX 0xFFFFFFFF
25 #define ARC_REG_TIMERS_BCR 0x75
|
| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | ps3gpu.h | 16 #define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC 0x101
17 #define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP 0x102
19 #define L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP 0x600
20 #define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601
21 #define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT_SYNC 0x602
22 #define L1GPU_CONTEXT_ATTRIBUTE_FB_CLOSE 0x603
39 head, ddr_offset, 0, 0); in lv1_gpu_display_sync()
47 head, ddr_offset, 0, 0); in lv1_gpu_display_flip()
55 xdr_lpar, xdr_size, ioif_offset, 0); in lv1_gpu_fb_setup()
70 L1GPU_CONTEXT_ATTRIBUTE_FB_CLOSE, 0, in lv1_gpu_fb_close()
[all …]
|
| /kernel/linux/linux-4.19/include/soc/arc/ |
| D | timers.h | 15 #define ARC_REG_TIMER0_LIMIT 0x23 /* timer 0 limit */
16 #define ARC_REG_TIMER0_CTRL 0x22 /* timer 0 control */
17 #define ARC_REG_TIMER0_CNT 0x21 /* timer 0 count */
18 #define ARC_REG_TIMER1_LIMIT 0x102 /* timer 1 limit */
19 #define ARC_REG_TIMER1_CTRL 0x101 /* timer 1 control */
20 #define ARC_REG_TIMER1_CNT 0x100 /* timer 1 count */
23 #define TIMER_CTRL_IE (1 << 0) /* Interrupt when Count reaches limit */
26 #define ARC_TIMERN_MAX 0xFFFFFFFF
28 #define ARC_REG_TIMERS_BCR 0x75
|
| /kernel/linux/linux-5.10/arch/mips/sgi-ip22/ |
| D | ip22-mc.c | 35 …return ((memconfig & SGIMC_MCONFIG_RMASK) + 0x0100) << ((sgimc->systemid & SGIMC_SYSID_MASKREV) >=… in get_bank_size()
41 return bank % 2 ? res & 0xffff : res >> 16; in get_bank_config()
59 for (i = 0; i < 4; i++) { in probe_memory()
90 /* Step 0: Make sure we turn off the watchdog in case it's in sgimc_init()
103 sgimc->cstat = sgimc->gstat = 0; in sgimc_init()
120 tmp &= ~0xf; in sgimc_init()
121 tmp |= 0xd; in sgimc_init()
131 * 31 16 15 8 7 0 in sgimc_init()
136 * for IP22 we get INCREMENT=1, DIVIDER=1 == 0x101 in sgimc_init()
138 sgimc->divider = 0x101; in sgimc_init()
[all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/marvell/ |
| D | armada-ap810-ap0-octa-core.dtsi | 13 #size-cells = <0>;
16 cpu0: cpu@0 {
19 reg = <0x000>;
25 reg = <0x001>;
31 reg = <0x100>;
37 reg = <0x101>;
43 reg = <0x200>;
49 reg = <0x201>;
55 reg = <0x300>;
61 reg = <0x301>;
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/ |
| D | cpus.txt | 22 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
23 the reg property contained in bits 7 down to 0
57 If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
64 Definition: must be set to 0
81 this property is required and must be set to 0.
84 required and matches the CPUID[11:0] register bits.
86 Bits [11:0] in the reg cell must be set to
87 bits [11:0] in CPU ID register.
89 All other bits in the reg cell must be set to 0.
92 required and matches the CPU MPIDR[23:0] register
[all …]
|
| D | topology.txt | 89 cluster/core/thread) (where N = {0, 1, ...} is the node number; nodes which
91 sequential N value, starting from 0).
170 #size-cells = <0>;
257 CPU0: cpu@0 {
260 reg = <0x0 0x0>;
262 cpu-release-addr = <0 0x20000000>;
268 reg = <0x0 0x1>;
270 cpu-release-addr = <0 0x20000000>;
276 reg = <0x0 0x100>;
278 cpu-release-addr = <0 0x20000000>;
[all …]
|
| /kernel/linux/linux-5.10/drivers/media/rc/keymaps/ |
| D | rc-x96max.c | 13 { 0x140, KEY_POWER },
22 { 0x118, KEY_VOLUMEUP },
23 { 0x110, KEY_VOLUMEDOWN },
25 { 0x143, KEY_MUTE }, // config
27 { 0x100, KEY_EPG }, // mouse
28 { 0x119, KEY_BACK },
30 { 0x116, KEY_UP },
31 { 0x151, KEY_LEFT },
32 { 0x150, KEY_RIGHT },
33 { 0x11a, KEY_DOWN },
[all …]
|
| /kernel/linux/linux-4.19/arch/powerpc/include/asm/ |
| D | ps3gpu.h | 28 #define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC 0x101
29 #define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP 0x102
31 #define L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP 0x600
32 #define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601
33 #define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT_SYNC 0x602
34 #define L1GPU_CONTEXT_ATTRIBUTE_FB_CLOSE 0x603
51 head, ddr_offset, 0, 0); in lv1_gpu_display_sync()
59 head, ddr_offset, 0, 0); in lv1_gpu_display_flip()
67 xdr_lpar, xdr_size, ioif_offset, 0); in lv1_gpu_fb_setup()
82 L1GPU_CONTEXT_ATTRIBUTE_FB_CLOSE, 0, in lv1_gpu_fb_close()
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | nvidia,tegra194-ccplex.yaml | 41 #size-cells = <0>;
43 cpu0_0: cpu@0 {
46 reg = <0x0>;
53 reg = <0x001>;
60 reg = <0x100>;
67 reg = <0x101>;
|
| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | usb_a9g20-dab-mmx.dtsi | 22 i2c-gpio@0 {
70 #size-cells = <0>;
75 linux,code = <0x100>;
81 linux,code = <0x101>;
87 linux,code = <0x102>;
93 linux,code = <0x103>;
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | usb_a9g20-dab-mmx.dtsi | 21 i2c-gpio@0 {
69 #size-cells = <0>;
74 linux,code = <0x100>;
80 linux,code = <0x101>;
86 linux,code = <0x102>;
92 linux,code = <0x103>;
|