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/kernel/linux/linux-4.19/drivers/pinctrl/tegra/
Dpinctrl-tegra-xusb.c30 #define XUSB_PADCTL_ELPG_PROGRAM 0x01c
35 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL1 0x040
37 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL1_REFCLK_SEL_MASK (0xf << 12)
40 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL2 0x044
45 #define XUSB_PADCTL_IOPHY_PLL_S0_CTL1 0x138
50 #define XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_IDDQ (1 << 0)
52 #define XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1 0x148
54 #define XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ (1 << 0)
140 return 0; in tegra_xusb_padctl_get_group_pins()
156 #define TEGRA_XUSB_PADCTL_UNPACK_VALUE(config) ((config) & 0xffff)
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/tegra/
Dpinctrl-tegra-xusb.c22 #define XUSB_PADCTL_ELPG_PROGRAM 0x01c
27 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL1 0x040
29 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL1_REFCLK_SEL_MASK (0xf << 12)
32 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL2 0x044
37 #define XUSB_PADCTL_IOPHY_PLL_S0_CTL1 0x138
42 #define XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_IDDQ (1 << 0)
44 #define XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1 0x148
46 #define XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ (1 << 0)
132 return 0; in tegra_xusb_padctl_get_group_pins()
148 #define TEGRA_XUSB_PADCTL_UNPACK_VALUE(config) ((config) & 0xffff)
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/tidss/
Dtidss_dispc_regs.h11 NOT_APPLICABLE_OFF = 0,
96 #define DISPC_VID_ACCUH_0 0x0
97 #define DISPC_VID_ACCUH_1 0x4
98 #define DISPC_VID_ACCUH2_0 0x8
99 #define DISPC_VID_ACCUH2_1 0xc
100 #define DISPC_VID_ACCUV_0 0x10
101 #define DISPC_VID_ACCUV_1 0x14
102 #define DISPC_VID_ACCUV2_0 0x18
103 #define DISPC_VID_ACCUV2_1 0x1c
104 #define DISPC_VID_ATTRIBUTES 0x20
[all …]
/kernel/linux/linux-5.10/drivers/phy/qualcomm/
Dphy-qcom-qmp.h10 #define QSERDES_COM_BG_TIMER 0x00c
11 #define QSERDES_COM_SSC_EN_CENTER 0x010
12 #define QSERDES_COM_SSC_ADJ_PER1 0x014
13 #define QSERDES_COM_SSC_ADJ_PER2 0x018
14 #define QSERDES_COM_SSC_PER1 0x01c
15 #define QSERDES_COM_SSC_PER2 0x020
16 #define QSERDES_COM_SSC_STEP_SIZE1 0x024
17 #define QSERDES_COM_SSC_STEP_SIZE2 0x028
18 #define QSERDES_COM_BIAS_EN_CLKBUFLR_EN 0x034
19 #define QSERDES_COM_CLK_ENABLE1 0x038
[all …]
/kernel/linux/linux-5.10/arch/sh/drivers/pci/
Dpci-sh7780.h13 #define PCIECR 0xFE000008
14 #define PCIECR_ENBL 0x01
17 #define SH7780_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */
18 #define SH7780_PCI_CONFIG_SIZE 0x01000000 /* Config space size */
20 #define SH7780_PCIREG_BASE 0xFE040000 /* PCI regs base address */
23 #define SH7780_PCIIR 0x114 /* PCI Interrupt Register */
24 #define SH7780_PCIIMR 0x118 /* PCI Interrupt Mask Register */
25 #define SH7780_PCIAIR 0x11C /* Error Address Register */
26 #define SH7780_PCICIR 0x120 /* Error Command/Data Register */
27 #define SH7780_PCIAINT 0x130 /* Arbiter Interrupt Register */
[all …]
/kernel/linux/linux-4.19/arch/sh/drivers/pci/
Dpci-sh7780.h16 #define PCIECR 0xFE000008
17 #define PCIECR_ENBL 0x01
20 #define SH7780_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */
21 #define SH7780_PCI_CONFIG_SIZE 0x01000000 /* Config space size */
23 #define SH7780_PCIREG_BASE 0xFE040000 /* PCI regs base address */
26 #define SH7780_PCIIR 0x114 /* PCI Interrupt Register */
27 #define SH7780_PCIIMR 0x118 /* PCI Interrupt Mask Register */
28 #define SH7780_PCIAIR 0x11C /* Error Address Register */
29 #define SH7780_PCICIR 0x120 /* Error Command/Data Register */
30 #define SH7780_PCIAINT 0x130 /* Arbiter Interrupt Register */
[all …]
/kernel/linux/linux-4.19/drivers/phy/tegra/
Dxusb-tegra124.c29 #define FUSE_SKU_CALIB_HS_CURR_LEVEL_PADX_SHIFT(x) ((x) ? 15 : 0)
30 #define FUSE_SKU_CALIB_HS_CURR_LEVEL_PAD_MASK 0x3f
32 #define FUSE_SKU_CALIB_HS_IREF_CAP_MASK 0x3
34 #define FUSE_SKU_CALIB_HS_SQUELCH_LEVEL_MASK 0x3
36 #define FUSE_SKU_CALIB_HS_TERM_RANGE_ADJ_MASK 0xf
38 #define XUSB_PADCTL_USB2_PORT_CAP 0x008
40 #define XUSB_PADCTL_USB2_PORT_CAP_PORT_CAP_MASK 0x3
41 #define XUSB_PADCTL_USB2_PORT_CAP_DISABLED 0x0
42 #define XUSB_PADCTL_USB2_PORT_CAP_HOST 0x1
43 #define XUSB_PADCTL_USB2_PORT_CAP_DEVICE 0x2
[all …]
/kernel/linux/linux-5.10/drivers/phy/tegra/
Dxusb-tegra124.c21 #define FUSE_SKU_CALIB_HS_CURR_LEVEL_PADX_SHIFT(x) ((x) ? 15 : 0)
22 #define FUSE_SKU_CALIB_HS_CURR_LEVEL_PAD_MASK 0x3f
24 #define FUSE_SKU_CALIB_HS_IREF_CAP_MASK 0x3
26 #define FUSE_SKU_CALIB_HS_SQUELCH_LEVEL_MASK 0x3
28 #define FUSE_SKU_CALIB_HS_TERM_RANGE_ADJ_MASK 0xf
30 #define XUSB_PADCTL_USB2_PORT_CAP 0x008
32 #define XUSB_PADCTL_USB2_PORT_CAP_PORT_CAP_MASK 0x3
33 #define XUSB_PADCTL_USB2_PORT_CAP_DISABLED 0x0
34 #define XUSB_PADCTL_USB2_PORT_CAP_HOST 0x1
35 #define XUSB_PADCTL_USB2_PORT_CAP_DEVICE 0x2
[all …]
/kernel/linux/linux-5.10/drivers/soc/tegra/fuse/
Dspeedo-tegra114.c25 {0, UINT_MAX},
30 {0, UINT_MAX},
41 case 0x00: in rev_sku_to_speedo_ids()
42 case 0x10: in rev_sku_to_speedo_ids()
43 case 0x05: in rev_sku_to_speedo_ids()
44 case 0x06: in rev_sku_to_speedo_ids()
46 sku_info->soc_speedo_id = 0; in rev_sku_to_speedo_ids()
50 case 0x03: in rev_sku_to_speedo_ids()
51 case 0x04: in rev_sku_to_speedo_ids()
59 sku_info->cpu_speedo_id = 0; in rev_sku_to_speedo_ids()
[all …]
/kernel/linux/linux-4.19/drivers/soc/tegra/fuse/
Dspeedo-tegra114.c36 {0, UINT_MAX},
41 {0, UINT_MAX},
52 case 0x00: in rev_sku_to_speedo_ids()
53 case 0x10: in rev_sku_to_speedo_ids()
54 case 0x05: in rev_sku_to_speedo_ids()
55 case 0x06: in rev_sku_to_speedo_ids()
57 sku_info->soc_speedo_id = 0; in rev_sku_to_speedo_ids()
61 case 0x03: in rev_sku_to_speedo_ids()
62 case 0x04: in rev_sku_to_speedo_ids()
70 sku_info->cpu_speedo_id = 0; in rev_sku_to_speedo_ids()
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dvf610-pinfunc.h14 #define ALT0 0x0
15 #define ALT1 0x1
16 #define ALT2 0x2
17 #define ALT3 0x3
18 #define ALT4 0x4
19 #define ALT5 0x5
20 #define ALT6 0x6
21 #define ALT7 0x7
24 #define VF610_PAD_PTA6__GPIO_0 0x000 0x000 ALT0 0x0
25 #define VF610_PAD_PTA6__RMII_CLKOUT 0x000 0x000 ALT1 0x0
[all …]
Dimx6dl-pinfunc.h13 #define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x04c 0x360 0x000 0x0 0x0
14 #define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC 0x04c 0x360 0x000 0x1 0x0
15 #define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x04c 0x360 0x7f8 0x2 0x0
16 #define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x04c 0x360 0x000 0x3 0x0
17 #define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x04c 0x360 0x8fc 0x3 0x0
18 #define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x04c 0x360 0x000 0x5 0x0
19 #define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x04c 0x360 0x000 0x7 0x0
20 #define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x050 0x364 0x000 0x0 0x0
21 #define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS 0x050 0x364 0x000 0x1 0x0
22 #define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0 0x050 0x364 0x800 0x2 0x0
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dvf610-pinfunc.h18 #define ALT0 0x0
19 #define ALT1 0x1
20 #define ALT2 0x2
21 #define ALT3 0x3
22 #define ALT4 0x4
23 #define ALT5 0x5
24 #define ALT6 0x6
25 #define ALT7 0x7
28 #define VF610_PAD_PTA6__GPIO_0 0x000 0x000 ALT0 0x0
29 #define VF610_PAD_PTA6__RMII_CLKOUT 0x000 0x000 ALT1 0x0
[all …]
Dimx6dl-pinfunc.h17 #define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x04c 0x360 0x000 0x0 0x0
18 #define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC 0x04c 0x360 0x000 0x1 0x0
19 #define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x04c 0x360 0x7f8 0x2 0x0
20 #define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x04c 0x360 0x000 0x3 0x0
21 #define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x04c 0x360 0x8fc 0x3 0x0
22 #define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x04c 0x360 0x000 0x5 0x0
23 #define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x04c 0x360 0x000 0x7 0x0
24 #define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x050 0x364 0x000 0x0 0x0
25 #define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS 0x050 0x364 0x000 0x1 0x0
26 #define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0 0x050 0x364 0x800 0x2 0x0
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/
Dinput_formatter_local.h27 #define HIVE_IF_FSM_SYNC_STATUS 0x100
28 #define HIVE_IF_FSM_SYNC_COUNTER 0x104
29 #define HIVE_IF_FSM_DEINTERLEAVING_IDX 0x114
30 #define HIVE_IF_FSM_DECIMATION_H_COUNTER 0x118
31 #define HIVE_IF_FSM_DECIMATION_V_COUNTER 0x11C
32 #define HIVE_IF_FSM_DECIMATION_BLOCK_V_COUNTER 0x120
33 #define HIVE_IF_FSM_PADDING_STATUS 0x124
34 #define HIVE_IF_FSM_PADDING_ELEMENT_COUNTER 0x128
35 #define HIVE_IF_FSM_VECTOR_SUPPORT_ERROR 0x12C
36 #define HIVE_IF_FSM_VECTOR_SUPPORT_BUFF_FULL 0x130
[all …]
/kernel/linux/linux-5.10/drivers/usb/gadget/udc/
Dfotg210.h14 /* Global Mask of HC/OTG/DEV interrupt Register(0xC4) */
15 #define FOTG210_GMIR 0xC4
16 #define GMIR_INT_POLARITY 0x8 /*Active High*/
17 #define GMIR_MHC_INT 0x4
18 #define GMIR_MOTG_INT 0x2
19 #define GMIR_MDEV_INT 0x1
21 /* Device Main Control Register(0x100) */
22 #define FOTG210_DMCR 0x100
29 #define DMCR_CAP_RMWAKUP (1 << 0)
31 /* Device Address Register(0x104) */
[all …]
/kernel/linux/linux-4.19/drivers/usb/gadget/udc/
Dfotg210.h14 /* Global Mask of HC/OTG/DEV interrupt Register(0xC4) */
15 #define FOTG210_GMIR 0xC4
16 #define GMIR_INT_POLARITY 0x8 /*Active High*/
17 #define GMIR_MHC_INT 0x4
18 #define GMIR_MOTG_INT 0x2
19 #define GMIR_MDEV_INT 0x1
21 /* Device Main Control Register(0x100) */
22 #define FOTG210_DMCR 0x100
29 #define DMCR_CAP_RMWAKUP (1 << 0)
31 /* Device Address Register(0x104) */
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/hisilicon/
Dhikey-pinctrl.dtsi12 pinctrl-0 = <
22 0x0 MUX_M0 /* BOOT_SEL (IOMG000) */
28 0x100 MUX_M0 /* EMMC_CLK (IOMG064) */
29 0x104 MUX_M0 /* EMMC_CMD (IOMG065) */
30 0x108 MUX_M0 /* EMMC_DATA0 (IOMG066) */
31 0x10c MUX_M0 /* EMMC_DATA1 (IOMG067) */
32 0x110 MUX_M0 /* EMMC_DATA2 (IOMG068) */
33 0x114 MUX_M0 /* EMMC_DATA3 (IOMG069) */
34 0x118 MUX_M0 /* EMMC_DATA4 (IOMG070) */
35 0x11c MUX_M0 /* EMMC_DATA5 (IOMG071) */
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhikey-pinctrl.dtsi12 pinctrl-0 = <
22 0x0 MUX_M0 /* BOOT_SEL (IOMG000) */
28 0x100 MUX_M0 /* EMMC_CLK (IOMG064) */
29 0x104 MUX_M0 /* EMMC_CMD (IOMG065) */
30 0x108 MUX_M0 /* EMMC_DATA0 (IOMG066) */
31 0x10c MUX_M0 /* EMMC_DATA1 (IOMG067) */
32 0x110 MUX_M0 /* EMMC_DATA2 (IOMG068) */
33 0x114 MUX_M0 /* EMMC_DATA3 (IOMG069) */
34 0x118 MUX_M0 /* EMMC_DATA4 (IOMG070) */
35 0x11c MUX_M0 /* EMMC_DATA5 (IOMG071) */
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mn-pinfunc.h14 …ne MX8MN_IOMUXC_BOOT_MODE2_CCMSRCGPCMIX_BOOT_MODE2 0x020 0x25C 0x000 0x0 0x0
15 …ne MX8MN_IOMUXC_BOOT_MODE2_I2C1_SCL 0x020 0x25C 0x55C 0x1 0x3
16 …ne MX8MN_IOMUXC_BOOT_MODE3_CCMSRCGPCMIX_BOOT_MODE3 0x024 0x260 0x000 0x0 0x0
17 …ne MX8MN_IOMUXC_BOOT_MODE3_I2C1_SDA 0x024 0x260 0x56C 0x1 0x3
18 …ne MX8MN_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x028 0x290 0x000 0x0 0x0
19 …ne MX8MN_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_ENET_PHY_REF_CLK_ROOT 0x028 0x290 0x000 0x1 0x0
20 …ne MX8MN_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x028 0x290 0x000 0x5 0x0
21 …ne MX8MN_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_EXT_CLK1 0x028 0x290 0x000 0x6 0x0
22 …ne MX8MN_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x02C 0x294 0x000 0x0 0x0
23 …ne MX8MN_IOMUXC_GPIO1_IO01_PWM1_OUT 0x02C 0x294 0x000 0x1 0x0
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
Dphyreg_n.h6 #define NPHY_TBL_ID_GAIN1 0
27 #define NPHY_TO_BPHY_OFF 0xc00
29 #define NPHY_BandControl_currentBand 0x0001
30 #define RFCC_CHIP0_PU 0x0400
31 #define RFCC_POR_FORCE 0x0040
32 #define RFCC_OE_POR_FORCE 0x0080
33 #define NPHY_RfctrlIntc_override_OFF 0
38 #define RIFS_ENABLE 0x80
39 #define BPHY_BAND_SEL_UP20 0x10
40 #define NPHY_MLenable 0x02
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-tegra/
Dsleep.h26 #define PMC_SCRATCH37 0x130
27 #define PMC_SCRATCH38 0x134
28 #define PMC_SCRATCH39 0x138
29 #define PMC_SCRATCH41 0x140
34 #define CPU_NOT_RESETTABLE 0
38 #define TEGRA_FLUSH_CACHE_LOUIS 0
52 cmp \rcpu, #0
55 addne \rd, \rd, #0x14
56 moveq \rd, #0
61 cmp \rcpu, #0
[all …]
/kernel/linux/linux-4.19/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
Dphyreg_n.h17 #define NPHY_TBL_ID_GAIN1 0
38 #define NPHY_TO_BPHY_OFF 0xc00
40 #define NPHY_BandControl_currentBand 0x0001
41 #define RFCC_CHIP0_PU 0x0400
42 #define RFCC_POR_FORCE 0x0040
43 #define RFCC_OE_POR_FORCE 0x0080
44 #define NPHY_RfctrlIntc_override_OFF 0
49 #define RIFS_ENABLE 0x80
50 #define BPHY_BAND_SEL_UP20 0x10
51 #define NPHY_MLenable 0x02
[all …]
/kernel/linux/linux-4.19/tools/perf/arch/powerpc/util/
Dbook3s_hcalls.h9 {0x4, "H_REMOVE"}, \
10 {0x8, "H_ENTER"}, \
11 {0xc, "H_READ"}, \
12 {0x10, "H_CLEAR_MOD"}, \
13 {0x14, "H_CLEAR_REF"}, \
14 {0x18, "H_PROTECT"}, \
15 {0x1c, "H_GET_TCE"}, \
16 {0x20, "H_PUT_TCE"}, \
17 {0x24, "H_SET_SPRG0"}, \
18 {0x28, "H_SET_DABR"}, \
[all …]
/kernel/linux/linux-5.10/tools/perf/arch/powerpc/util/
Dbook3s_hcalls.h9 {0x4, "H_REMOVE"}, \
10 {0x8, "H_ENTER"}, \
11 {0xc, "H_READ"}, \
12 {0x10, "H_CLEAR_MOD"}, \
13 {0x14, "H_CLEAR_REF"}, \
14 {0x18, "H_PROTECT"}, \
15 {0x1c, "H_GET_TCE"}, \
16 {0x20, "H_PUT_TCE"}, \
17 {0x24, "H_SET_SPRG0"}, \
18 {0x28, "H_SET_DABR"}, \
[all …]

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