| /kernel/linux/linux-5.10/drivers/staging/rts5208/ |
| D | ms.h | 19 #define MS_EXTRA_SIZE 0x9 21 #define WRT_PRTCT 0x01 24 #define MS_NO_ERROR 0x00 25 #define MS_CRC16_ERROR 0x80 26 #define MS_TO_ERROR 0x40 27 #define MS_NO_CARD 0x20 28 #define MS_NO_MEMORY 0x10 29 #define MS_CMD_NK 0x08 30 #define MS_FLASH_READ_ERROR 0x04 31 #define MS_FLASH_WRITE_ERROR 0x02 [all …]
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| /kernel/linux/linux-4.19/drivers/staging/rts5208/ |
| D | ms.h | 31 #define MS_EXTRA_SIZE 0x9 33 #define WRT_PRTCT 0x01 36 #define MS_NO_ERROR 0x00 37 #define MS_CRC16_ERROR 0x80 38 #define MS_TO_ERROR 0x40 39 #define MS_NO_CARD 0x20 40 #define MS_NO_MEMORY 0x10 41 #define MS_CMD_NK 0x08 42 #define MS_FLASH_READ_ERROR 0x04 43 #define MS_FLASH_WRITE_ERROR 0x02 [all …]
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| /kernel/linux/linux-4.19/drivers/ide/ |
| D | ide-generic.c | 24 module_param(probe_mask, int, 0); 33 static const u16 legacy_bases[] = { 0x1f0 }; 36 static const u16 legacy_bases[] = { 0x1f0, 0x170, 0x1e8, 0x168 }; 39 static const u16 legacy_bases[] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 }; 50 if (pci_resource_start(p, 0) == 0x1f0) in ide_generic_check_pci_legacy_iobases() 52 if (pci_resource_start(p, 2) == 0x170) in ide_generic_check_pci_legacy_iobases() 55 /* Cyrix CS55{1,2}0 pre SFF MWDMA ATA on the bridge */ in ide_generic_check_pci_legacy_iobases() 64 pci_read_config_word(p, 0x6C, &val); in ide_generic_check_pci_legacy_iobases() 65 if (val & 0x8000) { in ide_generic_check_pci_legacy_iobases() 67 if (val & 0x4000) in ide_generic_check_pci_legacy_iobases() [all …]
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| D | q40ide.c | 28 #define PCIDE_BASE1 0x1f0 29 #define PCIDE_BASE2 0x170 30 #define PCIDE_BASE3 0x1e8 31 #define PCIDE_BASE4 0x168 32 #define PCIDE_BASE5 0x1e0 33 #define PCIDE_BASE6 0x160 43 case 0x1f0: return 14; in q40ide_default_irq() 44 case 0x170: return 15; in q40ide_default_irq() 45 case 0x1e8: return 11; in q40ide_default_irq() 47 return 0; in q40ide_default_irq() [all …]
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| D | opti621.c | 23 #define READ_REG 0 /* index of Read cycle timing register */ 34 * is at reg_base (0x1f0 primary, 0x170 secondary, 44 outb(0x83, reg_base + 2); in write_reg() 48 * is at reg_base (0x1f0 primary, 0x170 secondary, 54 u8 ret = 0; in read_reg() 60 outb(0x83, reg_base + 2); in read_reg() 75 { 0x20, 0x10, 0x00, 0x00, 0x00 }, /* 33 MHz */ in opti621_set_pio_mode() 76 { 0x10, 0x10, 0x00, 0x00, 0x00 }, /* 25 MHz */ in opti621_set_pio_mode() 79 { 0x5b, 0x45, 0x32, 0x21, 0x20 }, /* 33 MHz */ in opti621_set_pio_mode() 80 { 0x48, 0x34, 0x21, 0x10, 0x10 } /* 25 MHz */ in opti621_set_pio_mode() [all …]
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| /kernel/linux/linux-5.10/drivers/ide/ |
| D | ide-generic.c | 24 module_param(probe_mask, int, 0); 33 static const u16 legacy_bases[] = { 0x1f0 }; 36 static const u16 legacy_bases[] = { 0x1f0, 0x170, 0x1e8, 0x168 }; 39 static const u16 legacy_bases[] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 }; 50 if (pci_resource_start(p, 0) == 0x1f0) in ide_generic_check_pci_legacy_iobases() 52 if (pci_resource_start(p, 2) == 0x170) in ide_generic_check_pci_legacy_iobases() 55 /* Cyrix CS55{1,2}0 pre SFF MWDMA ATA on the bridge */ in ide_generic_check_pci_legacy_iobases() 64 pci_read_config_word(p, 0x6C, &val); in ide_generic_check_pci_legacy_iobases() 65 if (val & 0x8000) { in ide_generic_check_pci_legacy_iobases() 67 if (val & 0x4000) in ide_generic_check_pci_legacy_iobases() [all …]
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| D | q40ide.c | 28 #define PCIDE_BASE1 0x1f0 29 #define PCIDE_BASE2 0x170 30 #define PCIDE_BASE3 0x1e8 31 #define PCIDE_BASE4 0x168 32 #define PCIDE_BASE5 0x1e0 33 #define PCIDE_BASE6 0x160 43 case 0x1f0: return 14; in q40ide_default_irq() 44 case 0x170: return 15; in q40ide_default_irq() 45 case 0x1e8: return 11; in q40ide_default_irq() 47 return 0; in q40ide_default_irq() [all …]
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| D | opti621.c | 24 #define READ_REG 0 /* index of Read cycle timing register */ 35 * is at reg_base (0x1f0 primary, 0x170 secondary, 45 outb(0x83, reg_base + 2); in write_reg() 49 * is at reg_base (0x1f0 primary, 0x170 secondary, 55 u8 ret = 0; in read_reg() 61 outb(0x83, reg_base + 2); in read_reg() 76 { 0x20, 0x10, 0x00, 0x00, 0x00 }, /* 33 MHz */ in opti621_set_pio_mode() 77 { 0x10, 0x10, 0x00, 0x00, 0x00 }, /* 25 MHz */ in opti621_set_pio_mode() 80 { 0x5b, 0x45, 0x32, 0x21, 0x20 }, /* 33 MHz */ in opti621_set_pio_mode() 81 { 0x48, 0x34, 0x21, 0x10, 0x10 } /* 25 MHz */ in opti621_set_pio_mode() [all …]
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| /kernel/linux/linux-5.10/arch/mips/mm/ |
| D | cex-sb1.S | 31 * the L1 and L2) since it is fetched as 0xa0000100. 35 * (0x170-0x17f) are used to preserve k0, k1, and ra. 48 sd k0,0x170($0) 49 sd k1,0x178($0) 69 mtc0 $0,C0_CERR_D 101 andi k0,0x1fe0 108 cache Index_Invalidate_I,(0<<13)(k0) 117 ld k0,0x170($0) 118 ld k1,0x178($0) 140 bnezl $0, 1f
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| /kernel/linux/linux-4.19/arch/mips/mm/ |
| D | cex-sb1.S | 44 * the L1 and L2) since it is fetched as 0xa0000100. 48 * (0x170-0x17f) are used to preserve k0, k1, and ra. 61 sd k0,0x170($0) 62 sd k1,0x178($0) 82 mtc0 $0,C0_CERR_D 114 andi k0,0x1fe0 121 cache Index_Invalidate_I,(0<<13)(k0) 130 ld k0,0x170($0) 131 ld k1,0x178($0) 153 bnezl $0, 1f
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| /kernel/linux/linux-5.10/Documentation/fault-injection/ |
| D | nvme-fault-injection.rst | 33 name fault_inject, interval 1, probability 100, space 0, times 1 34 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.15.0-rc8+ #2 39 dump_stack+0x5c/0x7d 40 should_fail+0x148/0x170 41 nvme_should_fail+0x2f/0x50 [nvme_core] 42 nvme_process_cq+0xe7/0x1d0 [nvme] 43 nvme_irq+0x1e/0x40 [nvme] 44 __handle_irq_event_percpu+0x3a/0x190 45 handle_irq_event_percpu+0x30/0x70 46 handle_irq_event+0x36/0x60 [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ |
| D | zte,vou.txt | 79 ranges = <0 0x1440000 0x10000>; 81 dpc: dpc@0 { 83 reg = <0x0000 0x1000>, <0x1000 0x1000>, 84 <0x5000 0x1000>, <0x6000 0x1000>, 85 <0xa000 0x1000>; 98 reg = <0x8000 0x1000>; 102 zte,vga-power-control = <&sysctrl 0x170 0xe0>; 107 reg = <0xc000 0x4000>; 117 reg = <0x2000 0x1000>; 118 zte,tvenc-power-control = <&sysctrl 0x170 0x10>;
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/ |
| D | zte,vou.txt | 79 ranges = <0 0x1440000 0x10000>; 81 dpc: dpc@0 { 83 reg = <0x0000 0x1000>, <0x1000 0x1000>, 84 <0x5000 0x1000>, <0x6000 0x1000>, 85 <0xa000 0x1000>; 98 reg = <0x8000 0x1000>; 102 zte,vga-power-control = <&sysctrl 0x170 0xe0>; 107 reg = <0xc000 0x4000>; 117 reg = <0x2000 0x1000>; 118 zte,tvenc-power-control = <&sysctrl 0x170 0x10>;
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| /kernel/linux/linux-4.19/Documentation/fault-injection/ |
| D | nvme-fault-injection.txt | 31 name fault_inject, interval 1, probability 100, space 0, times 1 32 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.15.0-rc8+ #2 37 dump_stack+0x5c/0x7d 38 should_fail+0x148/0x170 39 nvme_should_fail+0x2f/0x50 [nvme_core] 40 nvme_process_cq+0xe7/0x1d0 [nvme] 41 nvme_irq+0x1e/0x40 [nvme] 42 __handle_irq_event_percpu+0x3a/0x190 43 handle_irq_event_percpu+0x30/0x70 44 handle_irq_event+0x36/0x60 [all …]
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| /kernel/linux/linux-5.10/arch/sparc/kernel/ |
| D | kprobes.c | 31 * - Set regs->tpc to point to kprobe->ainsn.insn[0] 52 if ((unsigned long) p->addr & 0x3UL) in arch_prepare_kprobe() 55 p->ainsn.insn[0] = *p->addr; in arch_prepare_kprobe() 56 flushi(&p->ainsn.insn[0]); in arch_prepare_kprobe() 62 return 0; in arch_prepare_kprobe() 111 regs->tpc = (unsigned long) &p->ainsn.insn[0]; in prepare_singlestep() 120 int ret = 0; in kprobe_handler() 207 if (regs->tnpc == regs->tpc + 0x4UL) in relbranch_fixup() 208 return real_pc + 0x8UL; in relbranch_fixup() 213 if ((insn & 0xc0000000) == 0x40000000 || in relbranch_fixup() [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | sprd-mcdt.txt | 17 reg = <0 0x41490000 0 0x170>;
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| /kernel/linux/linux-4.19/arch/sparc/kernel/ |
| D | kprobes.c | 31 * - Set regs->tpc to point to kprobe->ainsn.insn[0] 52 if ((unsigned long) p->addr & 0x3UL) in arch_prepare_kprobe() 55 p->ainsn.insn[0] = *p->addr; in arch_prepare_kprobe() 56 flushi(&p->ainsn.insn[0]); in arch_prepare_kprobe() 62 return 0; in arch_prepare_kprobe() 111 regs->tpc = (unsigned long) &p->ainsn.insn[0]; in prepare_singlestep() 120 int ret = 0; in kprobe_handler() 207 if (regs->tnpc == regs->tpc + 0x4UL) in relbranch_fixup() 208 return real_pc + 0x8UL; in relbranch_fixup() 213 if ((insn & 0xc0000000) == 0x40000000 || in relbranch_fixup() [all …]
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| /kernel/linux/linux-5.10/arch/mips/configs/ |
| D | mpc30x_defconfig | 53 CONFIG_CMDLINE="mem=32M console=ttyVR0,19200 ide0=0x170,0x376,73"
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| D | workpad_defconfig | 65 CONFIG_CMDLINE="console=ttyVR0,19200 ide0=0x170,0x376,49 mem=16M"
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| /kernel/linux/linux-5.10/tools/testing/selftests/kvm/lib/x86_64/ |
| D | svm.c | 34 0x10000, 0, 0); in vcpu_alloc_svm() 38 0x10000, 0, 0); in vcpu_alloc_svm() 43 0x10000, 0, 0); in vcpu_alloc_svm() 76 memset(vmcb, 0, sizeof(*vmcb)); in generic_svm_setup() 78 vmcb_set_seg(&save->es, get_es(), 0, -1U, data_seg_attr); in generic_svm_setup() 79 vmcb_set_seg(&save->cs, get_cs(), 0, -1U, code_seg_attr); in generic_svm_setup() 80 vmcb_set_seg(&save->ss, get_ss(), 0, -1U, data_seg_attr); in generic_svm_setup() 81 vmcb_set_seg(&save->ds, get_ds(), 0, -1U, data_seg_attr); in generic_svm_setup() 82 vmcb_set_seg(&save->gdtr, 0, get_gdt().address, get_gdt().size, 0); in generic_svm_setup() 83 vmcb_set_seg(&save->idtr, 0, get_idt().address, get_idt().size, 0); in generic_svm_setup() [all …]
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| /kernel/linux/linux-4.19/arch/mips/configs/ |
| D | mpc30x_defconfig | 55 CONFIG_CMDLINE="mem=32M console=ttyVR0,19200 ide0=0x170,0x376,73"
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| /kernel/linux/linux-5.10/drivers/ata/ |
| D | pata_legacy.c | 66 MODULE_PARM_DESC(all, "Grab all legacy port devices, even if PCI(0=off, 1=on)"); 69 BIOS = 0, 112 static int legacy_port[NR_HOST] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 }; 127 static int iordy_mask = 0xFFFFFFFF; /* Use iordy if available */ 162 struct legacy_probe *lp = &probe_list[0]; in legacy_probe_add() 166 for (i = 0; i < NR_HOST; i++) { in legacy_probe_add() 167 if (lp->port == 0 && free == NULL) in legacy_probe_add() 185 return 0; in legacy_probe_add() 213 return 0; in legacy_set_mode() 229 * do this. The mode range can be set if it is not 0x1F by setting [all …]
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| /kernel/linux/linux-4.19/drivers/ata/ |
| D | pata_legacy.c | 80 MODULE_PARM_DESC(all, "Grab all legacy port devices, even if PCI(0=off, 1=on)"); 83 BIOS = 0, 126 static int legacy_port[NR_HOST] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 }; 141 static int iordy_mask = 0xFFFFFFFF; /* Use iordy if available */ 176 struct legacy_probe *lp = &probe_list[0]; in legacy_probe_add() 180 for (i = 0; i < NR_HOST; i++) { in legacy_probe_add() 181 if (lp->port == 0 && free == NULL) in legacy_probe_add() 199 return 0; in legacy_probe_add() 227 return 0; in legacy_set_mode() 243 * do this. The mode range can be set if it is not 0x1F by setting [all …]
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| D | dm816.h | 8 #define DM816_CLKCTRL_OFFSET 0x0 12 #define DM816_USB_OTG_HS_CLKCTRL DM816_CLKCTRL_INDEX(0x58) 15 #define DM816_UART1_CLKCTRL DM816_CLKCTRL_INDEX(0x150) 16 #define DM816_UART2_CLKCTRL DM816_CLKCTRL_INDEX(0x154) 17 #define DM816_UART3_CLKCTRL DM816_CLKCTRL_INDEX(0x158) 18 #define DM816_GPIO1_CLKCTRL DM816_CLKCTRL_INDEX(0x15c) 19 #define DM816_GPIO2_CLKCTRL DM816_CLKCTRL_INDEX(0x160) 20 #define DM816_I2C1_CLKCTRL DM816_CLKCTRL_INDEX(0x164) 21 #define DM816_I2C2_CLKCTRL DM816_CLKCTRL_INDEX(0x168) 22 #define DM816_TIMER1_CLKCTRL DM816_CLKCTRL_INDEX(0x170) [all …]
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| /kernel/linux/linux-4.19/drivers/phy/qualcomm/ |
| D | phy-qcom-qmp.h | 10 #define QSERDES_COM_BG_TIMER 0x00c 11 #define QSERDES_COM_SSC_EN_CENTER 0x010 12 #define QSERDES_COM_SSC_ADJ_PER1 0x014 13 #define QSERDES_COM_SSC_ADJ_PER2 0x018 14 #define QSERDES_COM_SSC_PER1 0x01c 15 #define QSERDES_COM_SSC_PER2 0x020 16 #define QSERDES_COM_SSC_STEP_SIZE1 0x024 17 #define QSERDES_COM_SSC_STEP_SIZE2 0x028 18 #define QSERDES_COM_BIAS_EN_CLKBUFLR_EN 0x034 19 #define QSERDES_COM_CLK_ENABLE1 0x038 [all …]
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