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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/mediatek/
Dmediatek,vencltsys.txt20 reg = <0 0x19000000 0 0x1000>;
Dmediatek,jpgdecsys.txt20 reg = <0 0x19000000 0 0x1000>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/mediatek/
Dmediatek,jpgdecsys.txt20 reg = <0 0x19000000 0 0x1000>;
Dmediatek,vencltsys.txt20 reg = <0 0x19000000 0 0x1000>;
Dmediatek,ipu.txt23 reg = <0 0x19000000 0 0x1000>;
29 reg = <0 0x19010000 0 0x1000>;
35 reg = <0 0x19180000 0 0x1000>;
41 reg = <0 0x19280000 0 0x1000>;
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/memory-controllers/
Dingenic,jz4780-nemc.txt16 <cs number> 0 <physical address of mapping> <size of mapping>
49 reg = <0x13410000 0x10000>;
54 ranges = <1 0 0x1b000000 0x1000000
55 2 0 0x1a000000 0x1000000
56 3 0 0x19000000 0x1000000
57 4 0 0x18000000 0x1000000
58 5 0 0x17000000 0x1000000
59 6 0 0x16000000 0x1000000>;
65 reg = <1 0 0x1000000>;
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dintegrator.dtsi11 reg = <0x10000000 0x200>;
14 led@c.0 {
16 offset = <0x0c>;
17 mask = <0x01>;
26 reg = <0x12000000 0x100>;
30 reg = <0x13000000 0x100>;
36 reg = <0x13000100 0x100>;
42 reg = <0x13000200 0x100>;
51 reg = <0x14000000 0x100>;
52 clear-mask = <0xffffffff>;
[all …]
Dbcm-cygnus-clock.dtsi39 #clock-cells = <0>;
46 #clock-cells = <0>;
49 reg = <0x19000000 0x1000>;
54 #clock-cells = <0>;
63 #clock-cells = <0>;
73 reg = <0x0301d000 0x2c>, <0x0301c020 0x4>;
81 #clock-cells = <0>;
90 #clock-cells = <0>;
100 reg = <0x0301d02c 0x1c>, <0x0301c020 0x4>;
109 reg = <0x180a9800 0x2c>, <0x0301c020 0x4>, <0x180aa024 0x4>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Dingenic,nemc.yaml14 pattern: "^memory-controller@[0-9a-f]+$"
40 ".*@[0-9]+$":
91 reg = <0x13410000 0x10000>;
94 ranges = <1 0 0x1b000000 0x1000000>,
95 <2 0 0x1a000000 0x1000000>,
96 <3 0 0x19000000 0x1000000>,
97 <4 0 0x18000000 0x1000000>,
98 <5 0 0x17000000 0x1000000>,
99 <6 0 0x16000000 0x1000000>;
108 pinctrl-0 = <&pins_nemc_cs6>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dingenic,nand.yaml61 reg = <0x13410000 0x10000>;
64 ranges = <1 0 0x1b000000 0x1000000>,
65 <2 0 0x1a000000 0x1000000>,
66 <3 0 0x19000000 0x1000000>,
67 <4 0 0x18000000 0x1000000>,
68 <5 0 0x17000000 0x1000000>,
69 <6 0 0x16000000 0x1000000>;
75 reg = <1 0 0x1000000>;
78 #size-cells = <0>;
89 pinctrl-0 = <&pins_nemc>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dintegrator.dtsi12 reg = <0x0 0x0>;
17 reg = <0x10000000 0x200>;
20 led@c.0 {
22 offset = <0x0c>;
23 mask = <0x01>;
32 reg = <0x12000000 0x100>;
36 reg = <0x13000000 0x100>;
42 reg = <0x13000100 0x100>;
48 reg = <0x13000200 0x100>;
57 reg = <0x14000000 0x100>;
[all …]
Dbcm-cygnus-clock.dtsi39 #clock-cells = <0>;
46 #clock-cells = <0>;
49 reg = <0x19000000 0x1000>;
54 #clock-cells = <0>;
63 #clock-cells = <0>;
73 reg = <0x0301d000 0x2c>, <0x0301c020 0x4>;
81 #clock-cells = <0>;
90 #clock-cells = <0>;
100 reg = <0x0301d02c 0x1c>, <0x0301c020 0x4>;
109 reg = <0x180a9800 0x2c>, <0x0301c020 0x4>, <0x180aa024 0x4>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/dsa/
Dar9331.txt26 reg = <0x19000000 0x200>;
40 reg = <0x1a000000 0x200>;
56 #size-cells = <0>;
60 #size-cells = <0>;
63 reg = <0x10>;
75 #size-cells = <0>;
77 switch_port0: port@0 {
78 reg = <0x0>;
91 reg = <0x1>;
97 reg = <0x2>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dqca,ar71xx.yaml43 const: 0
82 reg = <0x19000000 0x200>;
95 reg = <0x1a000000 0x200>;
113 #size-cells = <0>;
117 #size-cells = <0>;
120 reg = <0x10>;
132 #size-cells = <0>;
134 switch_port0: port@0 {
135 reg = <0x0>;
148 reg = <0x1>;
[all …]
/kernel/linux/linux-4.19/arch/mips/sni/
Da20r.c30 PORT(0x3f8, 4),
31 PORT(0x2f8, 3),
45 .start = 0x1c081ffc,
46 .end = 0x1c081fff,
59 .start = 0x18000000,
60 .end = 0x18000004,
64 .start = 0x18010000,
65 .end = 0x18010004,
69 .start = 0x1ff00000,
70 .end = 0x1ff00020,
[all …]
/kernel/linux/linux-5.10/arch/mips/sni/
Da20r.c30 PORT(0x3f8, 4),
31 PORT(0x2f8, 3),
45 .start = 0x1c081ffc,
46 .end = 0x1c081fff,
59 .start = 0x18000000,
60 .end = 0x18000004,
64 .start = 0x18010000,
65 .end = 0x18010004,
69 .start = 0x1ff00000,
70 .end = 0x1ff00020,
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/
Dp1022ds.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x8000000>;
44 partition@0 {
45 reg = <0x0 0x03000000>;
51 reg = <0x03000000 0x00e00000>;
57 reg = <0x03e00000 0x00200000>;
63 reg = <0x04000000 0x00400000>;
69 reg = <0x04400000 0x03b00000>;
74 reg = <0x07f00000 0x00080000>;
80 reg = <0x07f80000 0x00080000>;
[all …]
/kernel/linux/linux-4.19/arch/powerpc/boot/dts/fsl/
Dp1022ds.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x8000000>;
44 partition@0 {
45 reg = <0x0 0x03000000>;
51 reg = <0x03000000 0x00e00000>;
57 reg = <0x03e00000 0x00200000>;
63 reg = <0x04000000 0x00400000>;
69 reg = <0x04400000 0x03b00000>;
74 reg = <0x07f00000 0x00080000>;
80 reg = <0x07f80000 0x00080000>;
[all …]
/kernel/linux/linux-5.10/arch/mips/boot/dts/qca/
Dar9331.dtsi12 #size-cells = <0>;
14 cpu@0 {
18 reg = <0>;
34 #clock-cells = <0>;
57 reg = <0x18000000 0x100>;
64 reg = <0x18020000 0x14>;
76 reg = <0x18040000 0x34>;
92 reg = <0x18050000 0x100>;
102 reg = <0x18060010 0x8>;
113 reg = <0x1806001c 0x4>;
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/mediatek/
Dmt6797.dtsi31 #size-cells = <0>;
33 cpu0: cpu@0 {
37 reg = <0x000>;
44 reg = <0x001>;
51 reg = <0x002>;
58 reg = <0x003>;
65 reg = <0x100>;
72 reg = <0x101>;
79 reg = <0x102>;
86 reg = <0x103>;
[all …]
/kernel/linux/linux-5.10/arch/mips/pci/
Dpci-lantiq.c27 #define PCI_CR_FCI_ADDR_MAP0 0x00C0
28 #define PCI_CR_FCI_ADDR_MAP1 0x00C4
29 #define PCI_CR_FCI_ADDR_MAP2 0x00C8
30 #define PCI_CR_FCI_ADDR_MAP3 0x00CC
31 #define PCI_CR_FCI_ADDR_MAP4 0x00D0
32 #define PCI_CR_FCI_ADDR_MAP5 0x00D4
33 #define PCI_CR_FCI_ADDR_MAP6 0x00D8
34 #define PCI_CR_FCI_ADDR_MAP7 0x00DC
35 #define PCI_CR_CLK_CTRL 0x0000
36 #define PCI_CR_PCI_MOD 0x0030
[all …]
/kernel/linux/linux-4.19/arch/mips/pci/
Dpci-lantiq.c29 #define PCI_CR_FCI_ADDR_MAP0 0x00C0
30 #define PCI_CR_FCI_ADDR_MAP1 0x00C4
31 #define PCI_CR_FCI_ADDR_MAP2 0x00C8
32 #define PCI_CR_FCI_ADDR_MAP3 0x00CC
33 #define PCI_CR_FCI_ADDR_MAP4 0x00D0
34 #define PCI_CR_FCI_ADDR_MAP5 0x00D4
35 #define PCI_CR_FCI_ADDR_MAP6 0x00D8
36 #define PCI_CR_FCI_ADDR_MAP7 0x00DC
37 #define PCI_CR_CLK_CTRL 0x0000
38 #define PCI_CR_PCI_MOD 0x0030
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-integrator/
Dhardware.h14 #define IO_BASE 0xF0000000 // VA of IO
15 #define IO_SIZE 0x0B000000 // How much?
20 #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE)
30 #define INTEGRATOR_BOOT_ROM_LO 0x00000000
31 #define INTEGRATOR_BOOT_ROM_HI 0x20000000
45 #define INTEGRATOR_SSRAM_BASE 0x00000000
46 #define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000
49 #define INTEGRATOR_FLASH_BASE 0x24000000
52 #define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000
58 #define INTEGRATOR_SDRAM_BASE 0x00040000
[all …]
/kernel/linux/linux-4.19/arch/mips/boot/dts/ingenic/
Djz4780.dtsi11 #address-cells = <0>;
19 reg = <0x10001000 0x50>;
30 #clock-cells = <0>;
35 #clock-cells = <0>;
41 reg = <0x10000000 0x100>;
51 reg = <0x10003000 0x4c>;
62 reg = <0x10010000 0x600>;
65 #size-cells = <0>;
67 gpa: gpio@0 {
69 reg = <0>;
[all …]
/kernel/linux/linux-4.19/arch/arm/mach-s3c24xx/
Dmach-qt2410.c53 { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
61 [0] = {
62 .hwport = 0,
63 .flags = 0,
70 .flags = 0,
77 .flags = 0,
160 .default_display = 0,
162 .lpcsel = ((0xCE6) & ~7) | 1<<4,
168 [0] = DEFINE_RES_MEM(0x19000000, 17),
181 .gpio = S3C2410_GPB(0),
[all …]

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