| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/bus/ |
| D | qcom,ebi2.txt | 24 CS0 GPIO134 0x1a800000-0x1b000000 (8MB)
25 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB)
26 CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB)
27 CS3 GPIO133 0x1d000000-0x25000000 (128 MB)
28 CS4 GPIO132 0x1c800000-0x1d000000 (8MB)
29 CS5 GPIO131 0x1c000000-0x1c800000 (8MB)
58 ranges = <0 0x0 0x1a800000 0x00800000>,
59 <1 0x0 0x1b000000 0x00800000>,
60 <2 0x0 0x1b800000 0x00800000>,
61 <3 0x0 0x1d000000 0x08000000>,
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/bus/ |
| D | qcom,ebi2.txt | 24 CS0 GPIO134 0x1a800000-0x1b000000 (8MB)
25 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB)
26 CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB)
27 CS3 GPIO133 0x1d000000-0x25000000 (128 MB)
28 CS4 GPIO132 0x1c800000-0x1d000000 (8MB)
29 CS5 GPIO131 0x1c000000-0x1c800000 (8MB)
58 ranges = <0 0x0 0x1a800000 0x00800000>,
59 <1 0x0 0x1b000000 0x00800000>,
60 <2 0x0 0x1b800000 0x00800000>,
61 <3 0x0 0x1d000000 0x08000000>,
[all …]
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| /kernel/linux/linux-4.19/arch/mips/include/asm/mach-ath79/ |
| D | ar71xx_regs.h | 22 #define AR71XX_APB_BASE 0x18000000
23 #define AR71XX_GE0_BASE 0x19000000
24 #define AR71XX_GE0_SIZE 0x10000
25 #define AR71XX_GE1_BASE 0x1a000000
26 #define AR71XX_GE1_SIZE 0x10000
27 #define AR71XX_EHCI_BASE 0x1b000000
28 #define AR71XX_EHCI_SIZE 0x1000
29 #define AR71XX_OHCI_BASE 0x1c000000
30 #define AR71XX_OHCI_SIZE 0x1000
31 #define AR71XX_SPI_BASE 0x1f000000
[all …]
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| /kernel/linux/linux-5.10/arch/mips/include/asm/mach-ath79/ |
| D | ar71xx_regs.h | 19 #define AR71XX_APB_BASE 0x18000000
20 #define AR71XX_GE0_BASE 0x19000000
21 #define AR71XX_GE0_SIZE 0x10000
22 #define AR71XX_GE1_BASE 0x1a000000
23 #define AR71XX_GE1_SIZE 0x10000
24 #define AR71XX_EHCI_BASE 0x1b000000
25 #define AR71XX_EHCI_SIZE 0x1000
26 #define AR71XX_OHCI_BASE 0x1c000000
27 #define AR71XX_OHCI_SIZE 0x1000
28 #define AR71XX_SPI_BASE 0x1f000000
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/mediatek/ |
| D | mediatek,ipesys.txt | 20 reg = <0 0x1b000000 0 0x1000>;
|
| D | mediatek,ethsys.txt | 24 reg = <0 0x1b000000 0 0x1000>;
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/mediatek/ |
| D | mediatek,ethsys.txt | 22 reg = <0 0x1b000000 0 0x1000>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | apm-xgene-dma.txt | 27 clocks = <&socplldiv2 0>;
28 reg = <0x0 0x1f27c000 0x0 0x1000>;
36 reg = <0x0 0x1f270000 0x0 0x10000>,
37 <0x0 0x1f200000 0x0 0x10000>,
38 <0x0 0x1b000000 0x0 0x400000>,
39 <0x0 0x1054a000 0x0 0x100>;
40 interrupts = <0x0 0x82 0x4>,
41 <0x0 0xb8 0x4>,
42 <0x0 0xb9 0x4>,
43 <0x0 0xba 0x4>,
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/dma/ |
| D | apm-xgene-dma.txt | 27 clocks = <&socplldiv2 0>;
28 reg = <0x0 0x1f27c000 0x0 0x1000>;
36 reg = <0x0 0x1f270000 0x0 0x10000>,
37 <0x0 0x1f200000 0x0 0x10000>,
38 <0x0 0x1b000000 0x0 0x400000>,
39 <0x0 0x1054a000 0x0 0x100>;
40 interrupts = <0x0 0x82 0x4>,
41 <0x0 0xb8 0x4>,
42 <0x0 0xb9 0x4>,
43 <0x0 0xba 0x4>,
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/memory-controllers/ |
| D | ingenic,jz4780-nemc.txt | 16 <cs number> 0 <physical address of mapping> <size of mapping>
49 reg = <0x13410000 0x10000>;
54 ranges = <1 0 0x1b000000 0x1000000
55 2 0 0x1a000000 0x1000000
56 3 0 0x19000000 0x1000000
57 4 0 0x18000000 0x1000000
58 5 0 0x17000000 0x1000000
59 6 0 0x16000000 0x1000000>;
65 reg = <1 0 0x1000000>;
|
| /kernel/linux/linux-4.19/arch/mips/pci/ |
| D | ops-loongson3.c | 10 #define PCI_ACCESS_READ 0
13 #define HT1LO_PCICFG_BASE 0x1a000000
14 #define HT1LO_PCICFG_BASE_TP1 0x1b000000
28 if (busnum == 0) { in loongson3_pci_config_access()
31 addrp = (void *)(TO_UNCAC(HT1LO_PCICFG_BASE) | (addr & 0xffff)); in loongson3_pci_config_access()
32 type = 0; in loongson3_pci_config_access()
36 type = 0x10000; in loongson3_pci_config_access()
43 if (*data == 0xffffffff) { in loongson3_pci_config_access()
54 u32 data = 0; in loongson3_pci_pcibios_read()
62 *val = (data >> ((where & 3) << 3)) & 0xff; in loongson3_pci_pcibios_read()
[all …]
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| /kernel/linux/linux-5.10/arch/arm/configs/ |
| D | lpc18xx_defconfig | 23 CONFIG_DRAM_BASE=0x28000000
24 CONFIG_DRAM_SIZE=0x02000000
25 CONFIG_FLASH_MEM_BASE=0x1b000000
26 CONFIG_FLASH_SIZE=0x00080000
27 CONFIG_ZBOOT_ROM_TEXT=0x0
28 CONFIG_ZBOOT_ROM_BSS=0x0
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/ |
| D | ingenic,nemc.yaml | 14 pattern: "^memory-controller@[0-9a-f]+$"
40 ".*@[0-9]+$":
91 reg = <0x13410000 0x10000>;
94 ranges = <1 0 0x1b000000 0x1000000>,
95 <2 0 0x1a000000 0x1000000>,
96 <3 0 0x19000000 0x1000000>,
97 <4 0 0x18000000 0x1000000>,
98 <5 0 0x17000000 0x1000000>,
99 <6 0 0x16000000 0x1000000>;
108 pinctrl-0 = <&pins_nemc_cs6>;
[all …]
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| /kernel/linux/linux-4.19/arch/arm/configs/ |
| D | lpc18xx_defconfig | 28 CONFIG_DRAM_BASE=0x28000000
29 CONFIG_DRAM_SIZE=0x02000000
30 CONFIG_FLASH_MEM_BASE=0x1b000000
31 CONFIG_FLASH_SIZE=0x00080000
33 CONFIG_ZBOOT_ROM_TEXT=0x0
34 CONFIG_ZBOOT_ROM_BSS=0x0
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | ingenic,nand.yaml | 61 reg = <0x13410000 0x10000>;
64 ranges = <1 0 0x1b000000 0x1000000>,
65 <2 0 0x1a000000 0x1000000>,
66 <3 0 0x19000000 0x1000000>,
67 <4 0 0x18000000 0x1000000>,
68 <5 0 0x17000000 0x1000000>,
69 <6 0 0x16000000 0x1000000>;
75 reg = <1 0 0x1000000>;
78 #size-cells = <0>;
89 pinctrl-0 = <&pins_nemc>;
[all …]
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| /kernel/linux/linux-4.19/arch/mips/boot/dts/qca/ |
| D | ar9331.dtsi | 12 #size-cells = <0>;
14 cpu@0 {
18 reg = <0>;
34 #clock-cells = <0>;
57 reg = <0x18000000 0x100>;
64 reg = <0x18020000 0x14>;
76 reg = <0x18040000 0x34>;
92 reg = <0x18050000 0x100>;
102 reg = <0x18060010 0x8>;
113 reg = <0x1806001c 0x4>;
[all …]
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| /kernel/linux/linux-4.19/arch/arc/boot/dts/ |
| D | axc001.dtsi | 26 ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
29 #clock-cells = <0>;
44 dw-apb-gpio@0x2000 {
46 reg = < 0x2000 0x80 >;
48 #size-cells = <0>;
50 ictl_intc: gpio-controller@0 {
55 reg = <0>;
63 debug_uart: dw-apb-uart@0x5000 {
65 reg = <0x5000 0x100>;
91 mb_intc: dw-apb-ictl@0xe0012000 {
[all …]
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| /kernel/linux/linux-5.10/arch/arc/boot/dts/ |
| D | axc001.dtsi | 23 ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
26 #clock-cells = <0>;
32 #clock-cells = <0>;
49 reg = < 0x2000 0x80 >;
51 #size-cells = <0>;
53 ictl_intc: gpio-controller@0 {
58 reg = <0>;
68 reg = <0x5000 0x100>;
97 reg = < 0x0 0xe0012000 0x0 0x200 >;
106 reg = <0x0 0x80000000 0x0 0x1b000000>; /* (512 - 32) MiB */
[all …]
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| /kernel/linux/linux-5.10/arch/mips/alchemy/devboards/ |
| D | db1000.c | 50 return 0; in db1000_board_setup()
57 if ((slot < 12) || (slot > 13) || pin == 0) in db1500_map_pci_irq()
60 return (pin == 1) ? AU1500_PCI_INTA : 0xff; in db1500_map_pci_irq()
75 [0] = {
77 .end = AU1500_PCI_PHYS_ADDR + 0xfff,
89 .id = 0,
100 [0] = {
102 .end = AU1100_LCD_PHYS_ADDR + 0x800 - 1,
114 .id = 0,
124 [0] = {
[all …]
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| /kernel/linux/linux-4.19/arch/mips/alchemy/devboards/ |
| D | db1000.c | 63 return 0; in db1000_board_setup()
70 if ((slot < 12) || (slot > 13) || pin == 0) in db1500_map_pci_irq()
73 return (pin == 1) ? AU1500_PCI_INTA : 0xff; in db1500_map_pci_irq()
86 [0] = {
88 .end = AU1500_PCI_PHYS_ADDR + 0xfff,
100 .id = 0,
111 [0] = {
113 .end = AU1100_LCD_PHYS_ADDR + 0x800 - 1,
127 .id = 0,
137 [0] = {
[all …]
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| /kernel/linux/linux-5.10/arch/mips/boot/dts/qca/ |
| D | ar9331.dtsi | 12 #size-cells = <0>;
14 cpu@0 {
18 reg = <0>;
34 #clock-cells = <0>;
57 reg = <0x18000000 0x100>;
64 reg = <0x18020000 0x14>;
76 reg = <0x18040000 0x34>;
92 reg = <0x18050000 0x100>;
102 reg = <0x18060010 0x8>;
113 reg = <0x1806001c 0x4>;
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-integrator/ |
| D | hardware.h | 14 #define IO_BASE 0xF0000000 // VA of IO
15 #define IO_SIZE 0x0B000000 // How much?
20 #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE)
30 #define INTEGRATOR_BOOT_ROM_LO 0x00000000
31 #define INTEGRATOR_BOOT_ROM_HI 0x20000000
45 #define INTEGRATOR_SSRAM_BASE 0x00000000
46 #define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000
49 #define INTEGRATOR_FLASH_BASE 0x24000000
52 #define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000
58 #define INTEGRATOR_SDRAM_BASE 0x00040000
[all …]
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| /kernel/linux/linux-4.19/arch/mips/boot/dts/ingenic/ |
| D | jz4780.dtsi | 11 #address-cells = <0>;
19 reg = <0x10001000 0x50>;
30 #clock-cells = <0>;
35 #clock-cells = <0>;
41 reg = <0x10000000 0x100>;
51 reg = <0x10003000 0x4c>;
62 reg = <0x10010000 0x600>;
65 #size-cells = <0>;
67 gpa: gpio@0 {
69 reg = <0>;
[all …]
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| /kernel/linux/linux-4.19/arch/arm/mach-integrator/ |
| D | hardware.h | 27 #define IO_BASE 0xF0000000 // VA of IO
28 #define IO_SIZE 0x0B000000 // How much?
33 #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE)
43 #define INTEGRATOR_BOOT_ROM_LO 0x00000000
44 #define INTEGRATOR_BOOT_ROM_HI 0x20000000
58 #define INTEGRATOR_SSRAM_BASE 0x00000000
59 #define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000
62 #define INTEGRATOR_FLASH_BASE 0x24000000
65 #define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000
71 #define INTEGRATOR_SDRAM_BASE 0x00040000
[all …]
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| /kernel/linux/linux-4.19/arch/arm64/boot/dts/apm/ |
| D | apm-storm.dtsi | 20 #size-cells = <0>;
22 cpu@0 {
25 reg = <0x0 0x000>;
27 cpu-release-addr = <0x1 0x0000fff8>;
33 reg = <0x0 0x001>;
35 cpu-release-addr = <0x1 0x0000fff8>;
41 reg = <0x0 0x100>;
43 cpu-release-addr = <0x1 0x0000fff8>;
49 reg = <0x0 0x101>;
51 cpu-release-addr = <0x1 0x0000fff8>;
[all …]
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