| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | mstar-v7.dtsi | 17 #size-cells = <0>; 19 cpu0: cpu@0 { 22 reg = <0x0>; 53 ranges = <0x16001000 0x16001000 0x00007000>, 54 <0x1f000000 0x1f000000 0x00400000>, 55 <0xa0000000 0xa0000000 0x20000>; 59 reg = <0x16001000 0x1000>, 60 <0x16002000 0x2000>, 61 <0x16004000 0x2000>, 62 <0x16006000 0x2000>; [all …]
|
| /kernel/linux/linux-4.19/include/linux/ssb/ |
| D | ssb_driver_extif.h | 25 #define SSB_EXTIF_PCMCIA_IOBASE(x) ((x) + 0x100000) 26 #define SSB_EXTIF_PCMCIA_CFGBASE(x) ((x) + 0x200000) 27 #define SSB_EXTIF_CFGIF_BASE(x) ((x) + 0x800000) 28 #define SSB_EXTIF_FLASH_BASE(x) ((x) + 0xc00000) 48 #define SSB_EXTIF_CTL 0x0000 49 #define SSB_EXTIF_CTL_UARTEN (1 << 0) /* UART enable */ 50 #define SSB_EXTIF_EXTSTAT 0x0004 51 #define SSB_EXTIF_EXTSTAT_EMODE (1 << 0) /* Endian mode (ro) */ 54 #define SSB_EXTIF_PCMCIA_CFG 0x0010 55 #define SSB_EXTIF_PCMCIA_MEMWAIT 0x0014 [all …]
|
| /kernel/linux/linux-5.10/include/linux/ssb/ |
| D | ssb_driver_extif.h | 24 #define SSB_EXTIF_PCMCIA_IOBASE(x) ((x) + 0x100000) 25 #define SSB_EXTIF_PCMCIA_CFGBASE(x) ((x) + 0x200000) 26 #define SSB_EXTIF_CFGIF_BASE(x) ((x) + 0x800000) 27 #define SSB_EXTIF_FLASH_BASE(x) ((x) + 0xc00000) 47 #define SSB_EXTIF_CTL 0x0000 48 #define SSB_EXTIF_CTL_UARTEN (1 << 0) /* UART enable */ 49 #define SSB_EXTIF_EXTSTAT 0x0004 50 #define SSB_EXTIF_EXTSTAT_EMODE (1 << 0) /* Endian mode (ro) */ 53 #define SSB_EXTIF_PCMCIA_CFG 0x0010 54 #define SSB_EXTIF_PCMCIA_MEMWAIT 0x0014 [all …]
|
| /kernel/linux/linux-5.10/drivers/misc/habanalabs/include/gaudi/ |
| D | gaudi_packets.h | 14 #define PACKET_HEADER_PACKET_ID_MASK 0x1F00000000000000ull 17 PACKET_WREG_32 = 0x1, 18 PACKET_WREG_BULK = 0x2, 19 PACKET_MSG_LONG = 0x3, 20 PACKET_MSG_SHORT = 0x4, 21 PACKET_CP_DMA = 0x5, 22 PACKET_REPEAT = 0x6, 23 PACKET_MSG_PROT = 0x7, 24 PACKET_FENCE = 0x8, 25 PACKET_LIN_DMA = 0x9, [all …]
|
| /kernel/linux/linux-4.19/arch/mips/boot/dts/lantiq/ |
| D | danube.dtsi | 8 cpu@0 { 17 reg = <0x1F800000 0x800000>; 18 ranges = <0x0 0x1F800000 0x7FFFFF>; 24 reg = <0x80200 0x120>; 29 reg = <0x803F0 0x10>; 37 reg = <0x1F000000 0x800000>; 38 ranges = <0x0 0x1F000000 0x7FFFFF>; 45 reg = <0x101000 0x1000>; 50 reg = <0x102000 0x1000>; 55 reg = <0x103000 0x1000>; [all …]
|
| /kernel/linux/linux-5.10/arch/mips/boot/dts/lantiq/ |
| D | danube.dtsi | 8 cpu@0 { 17 reg = <0x1f800000 0x800000>; 18 ranges = <0x0 0x1f800000 0x7fffff>; 24 reg = <0x80200 0x120>; 29 reg = <0x803f0 0x10>; 37 reg = <0x1f000000 0x800000>; 38 ranges = <0x0 0x1f000000 0x7fffff>; 45 reg = <0x101000 0x1000>; 50 reg = <0x102000 0x1000>; 55 reg = <0x103000 0x1000>; [all …]
|
| /kernel/linux/linux-5.10/arch/mips/include/asm/sgi/ |
| D | gio.h | 23 * 0 GFX 0x1f000000 - 0x1f3fffff 4MB 24 * 1 EXP0 0x1f400000 - 0x1f5fffff 2MB 25 * 2 EXP1 0x1f600000 - 0x1f9fffff 4MB 29 * - MISC 0x1fb00000 - 0x1fbfffff 1MB 32 * - RESERVED 0x18000000 - 0x1effffff 112MB 42 * bits 0:6 the product ID; ranges from 0x00 to 0x7F. 43 * bit 7 0=GIO Product ID is 8 bits wide 46 * bit 16 0=GIO32 and GIO32-bis, 1=GIO64. 47 * bit 17 0=no ROM present 52 * IDs above 0x50/0xd0 are of 3rd party boards. [all …]
|
| /kernel/linux/linux-4.19/arch/mips/include/asm/sgi/ |
| D | gio.h | 23 * 0 GFX 0x1f000000 - 0x1f3fffff 4MB 24 * 1 EXP0 0x1f400000 - 0x1f5fffff 2MB 25 * 2 EXP1 0x1f600000 - 0x1f9fffff 4MB 29 * - MISC 0x1fb00000 - 0x1fbfffff 1MB 32 * - RESERVED 0x18000000 - 0x1effffff 112MB 42 * bits 0:6 the product ID; ranges from 0x00 to 0x7F. 43 * bit 7 0=GIO Product ID is 8 bits wide 46 * bit 16 0=GIO32 and GIO32-bis, 1=GIO64. 47 * bit 17 0=no ROM present 52 * IDs above 0x50/0xd0 are of 3rd party boards. [all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/interrupt-controller/ |
| D | google,goldfish-pic.txt | 15 #interrupt-cells = <0x1>; 16 #address-cells = <0>; 23 reg = <0x1f000000 0x1000>; 26 #interrupt-cells = <0x1>; 29 interrupts = <0x2>;
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | google,goldfish-pic.txt | 15 #interrupt-cells = <0x1>; 16 #address-cells = <0>; 23 reg = <0x1f000000 0x1000>; 26 #interrupt-cells = <0x1>; 29 interrupts = <0x2>;
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/spi/ |
| D | spi-ath79.txt | 9 - #size-cells: <0>, also as required by generic SPI binding. 17 reg = <0x1f000000 0x10>; 23 #size-cells = <0>;
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | spi-ath79.txt | 9 - #size-cells: <0>, also as required by generic SPI binding. 17 reg = <0x1f000000 0x10>; 23 #size-cells = <0>;
|
| D | mikrotik,rb4xx-spi.yaml | 33 #size-cells = <0>; 35 reg = <0x1f000000 0x10>;
|
| D | qca,ar934x-spi.yaml | 39 reg = <0x1f000000 0x1c>; 42 #size-cells = <0>;
|
| /kernel/linux/linux-5.10/arch/mips/cobalt/ |
| D | lcd.c | 13 .start = 0x1f000000, 14 .end = 0x1f00001f, 35 return 0; in cobalt_lcd_add()
|
| /kernel/linux/linux-4.19/arch/mips/boot/dts/ralink/ |
| D | rt2880_eval.dts | 10 memory@0 { 12 reg = <0x8000000 0x2000000>; 21 reg = <0x1f000000 0x400000>; 28 partition@0 { 30 reg = <0x0 0x30000>; 35 reg = <0x30000 0x10000>; 40 reg = <0x40000 0x10000>; 45 reg = <0x50000 0x3b0000>;
|
| D | rt3052_eval.dts | 10 memory@0 { 12 reg = <0x0 0x2000000>; 21 reg = <0x1f000000 0x800000>; 28 partition@0 { 30 reg = <0x0 0x30000>; 35 reg = <0x30000 0x10000>; 40 reg = <0x40000 0x10000>; 45 reg = <0x50000 0x7b0000>;
|
| /kernel/linux/linux-5.10/arch/mips/boot/dts/ralink/ |
| D | rt2880_eval.dts | 10 memory@0 { 12 reg = <0x8000000 0x2000000>; 21 reg = <0x1f000000 0x400000>; 28 partition@0 { 30 reg = <0x0 0x30000>; 35 reg = <0x30000 0x10000>; 40 reg = <0x40000 0x10000>; 45 reg = <0x50000 0x3b0000>;
|
| D | rt3052_eval.dts | 10 memory@0 { 12 reg = <0x0 0x2000000>; 21 reg = <0x1f000000 0x800000>; 28 partition@0 { 30 reg = <0x0 0x30000>; 35 reg = <0x30000 0x10000>; 40 reg = <0x40000 0x10000>; 45 reg = <0x50000 0x7b0000>;
|
| /kernel/linux/linux-4.19/arch/mips/cobalt/ |
| D | lcd.c | 26 .start = 0x1f000000, 27 .end = 0x1f00001f, 48 return 0; in cobalt_lcd_add()
|
| /kernel/linux/linux-4.19/drivers/gpu/drm/nouveau/nvkm/subdev/fault/ |
| D | gv100.c | 33 const u32 foff = buffer->id * 0x14; in gv100_fault_buffer_process() 34 u32 get = nvkm_rd32(device, 0x100e2c + foff); in gv100_fault_buffer_process() 35 u32 put = nvkm_rd32(device, 0x100e30 + foff); in gv100_fault_buffer_process() 42 const u32 instlo = nvkm_ro32(mem, base + 0x00); in gv100_fault_buffer_process() 43 const u32 insthi = nvkm_ro32(mem, base + 0x04); in gv100_fault_buffer_process() 44 const u32 addrlo = nvkm_ro32(mem, base + 0x08); in gv100_fault_buffer_process() 45 const u32 addrhi = nvkm_ro32(mem, base + 0x0c); in gv100_fault_buffer_process() 46 const u32 timelo = nvkm_ro32(mem, base + 0x10); in gv100_fault_buffer_process() 47 const u32 timehi = nvkm_ro32(mem, base + 0x14); in gv100_fault_buffer_process() 48 const u32 info0 = nvkm_ro32(mem, base + 0x18); in gv100_fault_buffer_process() [all …]
|
| /kernel/linux/linux-5.10/drivers/misc/habanalabs/include/goya/ |
| D | goya_packets.h | 14 #define PACKET_HEADER_PACKET_ID_MASK 0x1F00000000000000ull 17 PACKET_WREG_32 = 0x1, 18 PACKET_WREG_BULK = 0x2, 19 PACKET_MSG_LONG = 0x3, 20 PACKET_MSG_SHORT = 0x4, 21 PACKET_CP_DMA = 0x5, 22 PACKET_MSG_PROT = 0x7, 23 PACKET_FENCE = 0x8, 24 PACKET_LIN_DMA = 0x9, 25 PACKET_NOP = 0xA, [all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/fault/ |
| D | gv100.c | 43 const u32 instlo = nvkm_ro32(mem, base + 0x00); in gv100_fault_buffer_process() 44 const u32 insthi = nvkm_ro32(mem, base + 0x04); in gv100_fault_buffer_process() 45 const u32 addrlo = nvkm_ro32(mem, base + 0x08); in gv100_fault_buffer_process() 46 const u32 addrhi = nvkm_ro32(mem, base + 0x0c); in gv100_fault_buffer_process() 47 const u32 timelo = nvkm_ro32(mem, base + 0x10); in gv100_fault_buffer_process() 48 const u32 timehi = nvkm_ro32(mem, base + 0x14); in gv100_fault_buffer_process() 49 const u32 info0 = nvkm_ro32(mem, base + 0x18); in gv100_fault_buffer_process() 50 const u32 info1 = nvkm_ro32(mem, base + 0x1c); in gv100_fault_buffer_process() 54 get = 0; in gv100_fault_buffer_process() 60 info.engine = (info0 & 0x000000ff); in gv100_fault_buffer_process() [all …]
|
| /kernel/linux/linux-5.10/include/linux/bcma/ |
| D | bcma_driver_gmac_cmn.h | 7 #define BCMA_GMAC_CMN_STAG0 0x000 8 #define BCMA_GMAC_CMN_STAG1 0x004 9 #define BCMA_GMAC_CMN_STAG2 0x008 10 #define BCMA_GMAC_CMN_STAG3 0x00C 11 #define BCMA_GMAC_CMN_PARSER_CTL 0x020 12 #define BCMA_GMAC_CMN_MIB_MAX_LEN 0x024 13 #define BCMA_GMAC_CMN_PHY_ACCESS 0x100 14 #define BCMA_GMAC_CMN_PA_DATA_MASK 0x0000ffff 15 #define BCMA_GMAC_CMN_PA_ADDR_MASK 0x001f0000 17 #define BCMA_GMAC_CMN_PA_REG_MASK 0x1f000000 [all …]
|
| /kernel/linux/linux-4.19/include/linux/bcma/ |
| D | bcma_driver_gmac_cmn.h | 7 #define BCMA_GMAC_CMN_STAG0 0x000 8 #define BCMA_GMAC_CMN_STAG1 0x004 9 #define BCMA_GMAC_CMN_STAG2 0x008 10 #define BCMA_GMAC_CMN_STAG3 0x00C 11 #define BCMA_GMAC_CMN_PARSER_CTL 0x020 12 #define BCMA_GMAC_CMN_MIB_MAX_LEN 0x024 13 #define BCMA_GMAC_CMN_PHY_ACCESS 0x100 14 #define BCMA_GMAC_CMN_PA_DATA_MASK 0x0000ffff 15 #define BCMA_GMAC_CMN_PA_ADDR_MASK 0x001f0000 17 #define BCMA_GMAC_CMN_PA_REG_MASK 0x1f000000 [all …]
|