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/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dprima2.dtsi18 #size-cells = <0>;
20 cpu@0 {
23 reg = <0x0>;
29 timebase-frequency = <0>;
30 bus-frequency = <0>;
31 clock-frequency = <0>;
53 ranges = <0x40000000 0x40000000 0x80000000>;
57 reg = <0x80040000 0x1000>;
61 arm,filter-ranges = <0 0x40000000>;
68 reg = <0x80020000 0x1000>;
[all …]
Datlas6.dtsi18 #size-cells = <0>;
20 cpu@0 {
21 reg = <0x0>;
27 timebase-frequency = <0>;
28 bus-frequency = <0>;
29 clock-frequency = <0>;
51 ranges = <0x40000000 0x40000000 0x80000000>;
57 reg = <0x80020000 0x1000>;
64 ranges = <0x88000000 0x88000000 0x40000>;
68 reg = <0x88000000 0x1000>;
[all …]
Ds3c24xx.dtsi23 reg = <0x4a000000 0x100>;
29 reg = <0x56000000 0x1000>;
33 interrupts = <0 0 0 3>,
34 <0 0 1 3>,
35 <0 0 2 3>,
36 <0 0 3 3>,
37 <0 0 4 4>,
38 <0 0 5 4>;
44 reg = <0x51000000 0x1000>;
45 interrupts = <0 0 10 3>, <0 0 11 3>, <0 0 12 3>, <0 0 13 3>, <0 0 14 3>;
[all …]
Duniphier-pxs2.dtsi18 #size-cells = <0>;
20 cpu0: cpu@0 {
23 reg = <0>;
111 #clock-cells = <0>;
116 #clock-cells = <0>;
160 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
161 <0x506c0000 0x400>;
162 interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>;
173 reg = <0x54006800 0x40>;
174 interrupts = <0 33 4>;
[all …]
Domap4.dtsi36 #size-cells = <0>;
38 cpu@0 {
42 reg = <0x0>;
53 reg = <0x1>;
72 reg = <0x48241000 0x1000>,
73 <0x48240100 0x0100>;
79 reg = <0x48242000 0x1000>;
87 reg = <0x48240600 0x20>;
96 reg = <0x48281000 0x1000>;
136 reg = <0x44000000 0x1000>,
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dprima2.dtsi16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0x0>;
27 timebase-frequency = <0>;
28 bus-frequency = <0>;
29 clock-frequency = <0>;
51 ranges = <0x40000000 0x40000000 0x80000000>;
55 reg = <0x80040000 0x1000>;
59 arm,filter-ranges = <0 0x40000000>;
66 reg = <0x80020000 0x1000>;
[all …]
Datlas6.dtsi16 #size-cells = <0>;
18 cpu@0 {
19 reg = <0x0>;
25 timebase-frequency = <0>;
26 bus-frequency = <0>;
27 clock-frequency = <0>;
49 ranges = <0x40000000 0x40000000 0x80000000>;
55 reg = <0x80020000 0x1000>;
62 ranges = <0x88000000 0x88000000 0x40000>;
66 reg = <0x88000000 0x1000>;
[all …]
Ds3c24xx.dtsi23 reg = <0x4a000000 0x100>;
29 reg = <0x56000000 0x1000>;
33 interrupts = <0 0 0 3>,
34 <0 0 1 3>,
35 <0 0 2 3>,
36 <0 0 3 3>,
37 <0 0 4 4>,
38 <0 0 5 4>;
44 reg = <0x51000000 0x1000>;
45 interrupts = <0 0 10 3>, <0 0 11 3>, <0 0 12 3>, <0 0 13 3>, <0 0 14 3>;
[all …]
Dam4372.dtsi23 memory@0 {
25 reg = <0 0>;
45 #size-cells = <0>;
46 cpu: cpu@0 {
50 reg = <0>;
79 opp-supported-hw = <0xFF 0x01>;
86 opp-supported-hw = <0xFF 0x04>;
92 opp-supported-hw = <0xFF 0x08>;
98 opp-supported-hw = <0xFF 0x10>;
104 opp-supported-hw = <0xFF 0x20>;
[all …]
Dam33xx.dtsi50 #size-cells = <0>;
51 cpu@0 {
55 reg = <0>;
89 opp-supported-hw = <0x06 0x0010>;
96 opp-supported-hw = <0x01 0x00FF>;
103 opp-supported-hw = <0x06 0x0020>;
110 opp-supported-hw = <0x01 0xFFFF>;
116 opp-supported-hw = <0x06 0x0040>;
122 opp-supported-hw = <0x01 0xFFFF>;
128 opp-supported-hw = <0x06 0x0080>;
[all …]
Domap5.dtsi45 #size-cells = <0>;
47 cpu0: cpu@0 {
50 reg = <0x0>;
69 reg = <0x1>;
113 reg = <0 0x48211000 0 0x1000>,
114 <0 0x48212000 0 0x2000>,
115 <0 0x48214000 0 0x2000>,
116 <0 0x48216000 0 0x2000>;
124 reg = <0 0x48281000 0 0x1000>;
152 ranges = <0 0 0 0xc0000000>;
[all …]
Domap4.dtsi40 #size-cells = <0>;
42 cpu@0 {
46 reg = <0x0>;
57 reg = <0x1>;
76 reg = <0x48241000 0x1000>,
77 <0x48240100 0x0100>;
83 reg = <0x48242000 0x1000>;
91 reg = <0x48240600 0x20>;
100 reg = <0x48281000 0x1000>;
135 reg = <0x44000000 0x1000>,
[all …]
Duniphier-pxs2.dtsi18 #size-cells = <0>;
20 cpu0: cpu@0 {
23 reg = <0>;
111 #clock-cells = <0>;
116 #clock-cells = <0>;
162 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
163 <0x506c0000 0x400>;
164 interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>;
175 reg = <0x54006000 0x100>;
177 #size-cells = <0>;
[all …]
Ddra7.dtsi61 reg = <0x0 0x48211000 0x0 0x1000>,
62 <0x0 0x48212000 0x0 0x2000>,
63 <0x0 0x48214000 0x0 0x2000>,
64 <0x0 0x48216000 0x0 0x2000>;
73 reg = <0x0 0x48281000 0x0 0x1000>;
79 #size-cells = <0>;
81 cpu0: cpu@0 {
84 reg = <0>;
108 opp-supported-hw = <0xFF 0x01>;
117 opp-supported-hw = <0xFF 0x02>;
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-s3c/
Dmap-s3c.h22 #define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000)
23 #define S3C2412_VA_EBI S3C_ADDR_CPU(0x00100000)
25 #define S3C2410_PA_UART (0x50000000)
35 * 0xFA800000, which is not in the way of any current mapping
39 #define S3C2410_PA_GPIO (0x56000000)
43 #define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000)
45 #define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000)
46 #define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000)
59 #define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10)
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/sound/
Duniphier,aio.txt14 - pinctrl-0 : defined I2S signal pins for an external codec chip.
34 reg = <0x56000000 0x80000>;
35 interrupts = <0 144 4>;
37 pinctrl-0 = <&pinctrl_aout>;
/kernel/linux/linux-4.19/arch/arm/plat-samsung/include/plat/
Dmap-s3c.h20 #define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000)
21 #define S3C2412_VA_EBI S3C_ADDR_CPU(0x00100000)
23 #define S3C2410_PA_UART (0x50000000)
33 * 0xFA800000, which is not in the way of any current mapping
37 #define S3C2410_PA_GPIO (0x56000000)
41 #define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000)
43 #define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000)
44 #define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000)
55 #define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000)
56 #define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000)
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Dsocionext,uniphier-aio.yaml48 "^port@[0-9]$":
71 reg = <0x56000000 0x80000>;
72 interrupts = <0 144 4>;
74 pinctrl-0 = <&pinctrl_aout>;
/kernel/linux/linux-4.19/arch/arm64/boot/dts/socionext/
Duniphier-ld11.dtsi11 /memreserve/ 0x80000000 0x02000000;
21 #size-cells = <0>;
34 cpu0: cpu@0 {
37 reg = <0 0x000>;
46 reg = <0 0x001>;
95 #clock-cells = <0>;
113 soc@0 {
117 ranges = <0 0 0 0xffffffff>;
122 reg = <0x54006800 0x40>;
123 interrupts = <0 33 4>;
[all …]
Duniphier-ld20.dtsi12 /memreserve/ 0x80000000 0x02000000;
22 #size-cells = <0>;
44 cpu0: cpu@0 {
47 reg = <0 0x000>;
57 reg = <0 0x001>;
67 reg = <0 0x100>;
77 reg = <0 0x101>;
169 #clock-cells = <0>;
221 soc@0 {
225 ranges = <0 0 0 0xffffffff>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/socionext/
Duniphier-ld11.dtsi19 #size-cells = <0>;
32 cpu0: cpu@0 {
35 reg = <0 0x000>;
44 reg = <0 0x001>;
93 #clock-cells = <0>;
117 reg = <0x0 0x81000000 0x0 0x01000000>;
122 soc@0 {
126 ranges = <0 0 0 0xffffffff>;
131 reg = <0x54006000 0x100>;
133 #size-cells = <0>;
[all …]
Duniphier-ld20.dtsi20 #size-cells = <0>;
42 cpu0: cpu@0 {
45 reg = <0 0x000>;
55 reg = <0 0x001>;
65 reg = <0 0x100>;
75 reg = <0 0x101>;
167 #clock-cells = <0>;
222 reg = <0x0 0x81000000 0x0 0x01000000>;
227 soc@0 {
231 ranges = <0 0 0 0xffffffff>;
[all …]
/kernel/linux/linux-5.10/crypto/
Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/kernel/linux/linux-4.19/crypto/
Daes_generic.c68 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
69 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
70 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
71 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
72 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
73 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
74 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
75 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
76 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
77 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/kernel/linux/linux-4.19/drivers/scsi/lpfc/
Dlpfc_hw.h23 #define FDMI_DID 0xfffffaU
24 #define NameServer_DID 0xfffffcU
25 #define SCR_DID 0xfffffdU
26 #define Fabric_DID 0xfffffeU
27 #define Bcast_DID 0xffffffU
28 #define Mask_DID 0xffffffU
29 #define CT_DID_MASK 0xffff00U
30 #define Fabric_DID_MASK 0xfff000U
31 #define WELL_KNOWN_DID_MASK 0xfffff0U
42 0 */
[all …]

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