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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dstm32mp157.dtsi13 reg = <0x59000000 0x800>;
22 reg = <0x5a000000 0x800>;
28 #size-cells = <0>;
33 #size-cells = <0>;
Duniphier-sld8.dtsi17 #size-cells = <0>;
19 cpu@0 {
22 reg = <0>;
36 #clock-cells = <0>;
41 #clock-cells = <0>;
56 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
57 <0x506c0000 0x400>;
58 interrupts = <0 174 4>, <0 175 4>;
69 reg = <0x54006000 0x100>;
71 #size-cells = <0>;
[all …]
Duniphier-ld4.dtsi17 #size-cells = <0>;
19 cpu@0 {
22 reg = <0>;
36 #clock-cells = <0>;
41 #clock-cells = <0>;
56 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
57 <0x506c0000 0x400>;
58 interrupts = <0 174 4>, <0 175 4>;
69 reg = <0x54006000 0x100>;
71 #size-cells = <0>;
[all …]
/kernel/linux/linux-4.19/arch/h8300/include/asm/
Dtraps.h22 #define JMP_OP 0x5a000000
23 #define JSR_OP 0x5e000000
26 #define CPU_VECTOR ((unsigned long *)0x000000)
27 #define ADDR_MASK (0xffffff)
/kernel/linux/linux-5.10/arch/h8300/include/asm/
Dtraps.h22 #define JMP_OP 0x5a000000
23 #define JSR_OP 0x5e000000
26 #define CPU_VECTOR ((unsigned long *)0x000000)
27 #define ADDR_MASK (0xffffff)
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/mmc/
Dsamsung,s3cmci.txt21 - pinctrl-0: Should specify pin control groups used for this controller.
34 pinctrl-0 = <&sdi_pins>;
35 reg = <0x5a000000 0x100000>;
36 interrupts = <0 0 21 3>;
Dsdhci-cadence.txt25 to sampling clock. The delay starts from 5ns (for delay parameter equal to 0)
29 Valid range = [0:0x1F].
32 Valid range = [0:0x1F].
35 Valid range = [0:0x1F].
38 Valid range = [0:0x1F].
41 Valid range = [0:0x1F].
44 Valid range = [0:0x1F].
47 Valid range = [0:0x1F].
50 Valid range = [0:0x1F].
59 Valid range = [0:0x7F].
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dsamsung,s3cmci.txt21 - pinctrl-0: Should specify pin control groups used for this controller.
34 pinctrl-0 = <&sdi_pins>;
35 reg = <0x5a000000 0x100000>;
36 interrupts = <0 0 21 3>;
Dcdns,sdhci.yaml34 # sampling clock. The delay starts from 5ns (for delay parameter equal to 0)
40 minimum: 0
41 maximum: 0x1f
46 minimum: 0
47 maximum: 0x1f
52 minimum: 0
53 maximum: 0x1f
58 minimum: 0
59 maximum: 0x1f
64 minimum: 0
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/
Dsocionext,uniphier-mio-dmac.yaml52 // In the example below, "interrupts = <0 68 4>, <0 68 4>, ..." is not a
57 reg = <0x5a000000 0x1000>;
58 interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>,
59 <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/
Dst,stm32-dsi.yaml61 port@0:
90 reg = <0x5a000000 0x800>;
98 #size-cells = <0>;
102 #size-cells = <0>;
104 port@0 {
105 reg = <0>;
119 panel-dsi@0 {
121 reg = <0>;
/kernel/linux/linux-5.10/arch/arm/mach-s3c/
Dmap-s3c24xx.h19 #define S3C2410_PA_IRQ (0x4A000000)
23 #define S3C2410_PA_MEMCTRL (0x48000000)
27 #define S3C2410_PA_TIMER (0x51000000)
34 #define S3C2410_PA_USBDEV (0x52000000)
38 #define S3C2410_PA_WATCHDOG (0x53000000)
52 #define S3C2410_PA_USBHOST (0x49000000)
55 #define S3C2416_PA_HSUDC (0x49800000)
59 #define S3C2410_PA_DMA (0x4B000000)
63 #define S3C2410_PA_CLKPWR (0x4C000000)
66 #define S3C2410_PA_LCD (0x4D000000)
[all …]
/kernel/linux/linux-4.19/arch/arm/mach-s3c24xx/include/mach/
Dmap.h19 #define S3C2410_PA_IRQ (0x4A000000)
23 #define S3C2410_PA_MEMCTRL (0x48000000)
27 #define S3C2410_PA_TIMER (0x51000000)
34 #define S3C2410_PA_USBDEV (0x52000000)
38 #define S3C2410_PA_WATCHDOG (0x53000000)
52 #define S3C2410_PA_USBHOST (0x49000000)
55 #define S3C2416_PA_HSUDC (0x49800000)
59 #define S3C2410_PA_DMA (0x4B000000)
63 #define S3C2410_PA_CLKPWR (0x4C000000)
66 #define S3C2410_PA_LCD (0x4D000000)
[all …]
/kernel/linux/linux-5.10/crypto/
Dmichael_mic.c30 return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8); in xswap()
44 } while (0)
51 mctx->pending_len = 0; in michael_init()
55 return 0; in michael_init()
74 return 0; in michael_update()
78 mctx->pending_len = 0; in michael_update()
88 if (len > 0) { in michael_update()
93 return 0; in michael_update()
102 /* Last block and padding (0x5a, 4..7 x 0) */ in michael_final()
104 case 0: in michael_final()
[all …]
/kernel/linux/linux-4.19/crypto/
Dmichael_mic.c33 return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8); in xswap()
47 } while (0)
54 mctx->pending_len = 0; in michael_init()
58 return 0; in michael_init()
78 return 0; in michael_update()
83 mctx->pending_len = 0; in michael_update()
94 if (len > 0) { in michael_update()
99 return 0; in michael_update()
109 /* Last block and padding (0x5a, 4..7 x 0) */ in michael_final()
111 case 0: in michael_final()
[all …]
/kernel/linux/linux-4.19/drivers/staging/ks7010/
Dmichael_mic.c20 mic->m_bytes = 0; in michael_clear()
37 mic->r ^= ((mic->l & 0xff00ff00) >> 8) | in michael_block()
38 ((mic->l & 0x00ff00ff) << 8); in michael_block()
64 mic->m_bytes = 0; in michael_append()
74 if (bytes > 0) { in michael_append()
85 case 0: in michael_get_mic()
86 mic->l ^= 0x5a; in michael_get_mic()
89 mic->l ^= data[0] | 0x5a00; in michael_get_mic()
92 mic->l ^= data[0] | (data[1] << 8) | 0x5a0000; in michael_get_mic()
95 mic->l ^= data[0] | (data[1] << 8) | (data[2] << 16) | in michael_get_mic()
[all …]
/kernel/linux/linux-5.10/drivers/watchdog/
Dbcm2835_wdt.c23 #define PM_RSTC 0x1c
24 #define PM_RSTS 0x20
25 #define PM_WDOG 0x24
27 #define PM_PASSWORD 0x5a000000
29 #define PM_WDOG_TIME_SET 0x000fffff
30 #define PM_RSTC_WRCFG_CLR 0xffffffcf
31 #define PM_RSTS_HADWRH_SET 0x00000040
32 #define PM_RSTC_WRCFG_SET 0x00000030
33 #define PM_RSTC_WRCFG_FULL_RESET 0x00000020
34 #define PM_RSTC_RESET 0x00000102
[all …]
/kernel/linux/linux-4.19/drivers/watchdog/
Dbcm2835_wdt.c22 #define PM_RSTC 0x1c
23 #define PM_RSTS 0x20
24 #define PM_WDOG 0x24
26 #define PM_PASSWORD 0x5a000000
28 #define PM_WDOG_TIME_SET 0x000fffff
29 #define PM_RSTC_WRCFG_CLR 0xffffffcf
30 #define PM_RSTS_HADWRH_SET 0x00000040
31 #define PM_RSTC_WRCFG_SET 0x00000030
32 #define PM_RSTC_WRCFG_FULL_RESET 0x00000020
33 #define PM_RSTC_RESET 0x00000102
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-omap2/
Diomap.h33 #define OMAP2_L3_IO_OFFSET 0x90000000
36 #define OMAP2_L4_IO_OFFSET 0xb2000000
39 #define OMAP4_L3_IO_OFFSET 0xb4000000
42 #define AM33XX_L4_WK_IO_OFFSET 0xb5000000
45 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000
48 #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
58 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
61 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
65 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
70 /* 0x6e000000 --> 0xfe000000 */
[all …]
/kernel/linux/linux-4.19/arch/arm/mach-omap2/
Diomap.h33 #define OMAP2_L3_IO_OFFSET 0x90000000
36 #define OMAP2_L4_IO_OFFSET 0xb2000000
39 #define OMAP4_L3_IO_OFFSET 0xb4000000
42 #define AM33XX_L4_WK_IO_OFFSET 0xb5000000
45 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000
48 #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
58 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
61 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
65 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
70 /* 0x6e000000 --> 0xfe000000 */
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/socionext/
Duniphier-pxs3.dtsi11 /memreserve/ 0x80000000 0x02000000;
21 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0 0x000>;
52 reg = <0 0x001>;
61 reg = <0 0x002>;
70 reg = <0 0x003>;
123 #clock-cells = <0>;
141 soc@0 {
145 ranges = <0 0 0 0xffffffff>;
[all …]
Duniphier-ld11.dtsi11 /memreserve/ 0x80000000 0x02000000;
21 #size-cells = <0>;
34 cpu0: cpu@0 {
37 reg = <0 0x000>;
46 reg = <0 0x001>;
95 #clock-cells = <0>;
113 soc@0 {
117 ranges = <0 0 0 0xffffffff>;
122 reg = <0x54006800 0x40>;
123 interrupts = <0 33 4>;
[all …]
Duniphier-ld20.dtsi12 /memreserve/ 0x80000000 0x02000000;
22 #size-cells = <0>;
44 cpu0: cpu@0 {
47 reg = <0 0x000>;
57 reg = <0 0x001>;
67 reg = <0 0x100>;
77 reg = <0 0x101>;
169 #clock-cells = <0>;
221 soc@0 {
225 ranges = <0 0 0 0xffffffff>;
[all …]
/kernel/linux/linux-5.10/drivers/soc/bcm/
Dbcm2835-power.c19 #define PM_GNRIC 0x00
20 #define PM_AUDIO 0x04
21 #define PM_STATUS 0x18
22 #define PM_RSTC 0x1c
23 #define PM_RSTS 0x20
24 #define PM_WDOG 0x24
25 #define PM_PADS0 0x28
26 #define PM_PADS2 0x2c
27 #define PM_PADS3 0x30
28 #define PM_PADS4 0x34
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/socionext/
Duniphier-ld11.dtsi19 #size-cells = <0>;
32 cpu0: cpu@0 {
35 reg = <0 0x000>;
44 reg = <0 0x001>;
93 #clock-cells = <0>;
117 reg = <0x0 0x81000000 0x0 0x01000000>;
122 soc@0 {
126 ranges = <0 0 0 0xffffffff>;
131 reg = <0x54006000 0x100>;
133 #size-cells = <0>;
[all …]

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