Searched +full:0 +full:x70000000 (Results 1 – 25 of 388) sorted by relevance
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| /kernel/linux/linux-5.10/drivers/of/unittest-data/ |
| D | tests-address.dtsi | 17 ranges = <0x70000000 0x70000000 0x40000000>,
18 <0x00000000 0xd0000000 0x20000000>;
19 dma-ranges = <0x0 0x20000000 0x40000000>;
22 reg = <0x70000000 0x1000>;
28 ranges = <0x0 0x0 0x80000000 0x0 0x100000>;
29 dma-ranges = <0x1 0x0 0x0 0x20 0x0>;
32 reg = <0x0 0x1000 0x0 0x1000>;
40 reg = <0x90000000 0x1000>;
41 ranges = <0x42000000 0x0 0x40000000 0x40000000 0x0 0x10000000>;
42 dma-ranges = <0x42000000 0x0 0x80000000 0x00000000 0x0 0x10000000>,
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/ |
| D | k3-am65.dtsi | 68 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
69 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
70 <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
71 <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
72 <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
73 <0x00 0x70000000 0x00 0x70000000 0x00 0x00200000>, /* MSMC SRAM */
74 <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
76 <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
77 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
78 <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */
[all …]
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| D | k3-j7200.dtsi | 39 #size-cells = <0>;
53 cpu0: cpu@0 {
55 reg = <0x000>;
58 i-cache-size = <0xc000>;
61 d-cache-size = <0x8000>;
69 reg = <0x001>;
72 i-cache-size = <0xc000>;
75 d-cache-size = <0x8000>;
85 cache-size = <0x100000>;
125 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/pci/ |
| D | designware-pcie-ecam.txt | 29 reg = <0x0 0x7f000000 0x0 0xf00000>;
30 bus-range = <0x0 0xe>;
33 ranges = <0x1000000 0x00 0x00010000 0x00 0x7ff00000 0x0 0x00010000>,
34 <0x2000000 0x00 0x70000000 0x00 0x70000000 0x0 0x0f000000>,
35 <0x3000000 0x3f 0x00000000 0x3f 0x00000000 0x1 0x00000000>;
37 #interrupt-cells = <0x1>;
38 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
39 interrupt-map = <0x0 0x0 0x0 0x0 &gic 0x0 0x0 0x0 182 0x4>;
40 msi-map = <0x0 &its 0x0 0x10000>;
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| /kernel/linux/linux-5.10/arch/sparc/include/asm/ |
| D | fbio.h | 10 #define CG6_FBC 0x70000000
11 #define CG6_TEC 0x70001000
12 #define CG6_BTREGS 0x70002000
13 #define CG6_FHC 0x70004000
14 #define CG6_THC 0x70005000
15 #define CG6_ROM 0x70006000
16 #define CG6_RAM 0x70016000
17 #define CG6_DHC 0x80000000
19 #define CG3_MMAP_OFFSET 0x4000000
22 #define TCX_RAM8BIT 0x00000000
[all …]
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| /kernel/linux/linux-4.19/arch/sparc/include/asm/ |
| D | fbio.h | 10 #define CG6_FBC 0x70000000
11 #define CG6_TEC 0x70001000
12 #define CG6_BTREGS 0x70002000
13 #define CG6_FHC 0x70004000
14 #define CG6_THC 0x70005000
15 #define CG6_ROM 0x70006000
16 #define CG6_RAM 0x70016000
17 #define CG6_DHC 0x80000000
19 #define CG3_MMAP_OFFSET 0x4000000
22 #define TCX_RAM8BIT 0x00000000
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-tegra/ |
| D | iomap.h | 16 #define TEGRA_IRAM_BASE 0x40000000
19 #define TEGRA_ARM_PERIF_BASE 0x50040000
22 #define TEGRA_ARM_INT_DIST_BASE 0x50041000
25 #define TEGRA_TMR1_BASE 0x60005000
28 #define TEGRA_TMR2_BASE 0x60005008
31 #define TEGRA_TMRUS_BASE 0x60005010
34 #define TEGRA_TMR3_BASE 0x60005050
37 #define TEGRA_TMR4_BASE 0x60005058
40 #define TEGRA_CLK_RESET_BASE 0x60006000
43 #define TEGRA_FLOW_CTRL_BASE 0x60007000
[all …]
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| /kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/ |
| D | elf.h | 23 #define PT_NULL 0
31 #define PT_LOOS 0x60000000
32 #define PT_HIOS 0x6fffffff
33 #define PT_LOPROC 0x70000000
34 #define PT_HIPROC 0x7fffffff
35 #define PT_GNU_EH_FRAME 0x6474e550
36 #define PT_GNU_STACK (PT_LOOS + 0x474e551)
37 #define PN_XNUM 0xffff
38 #define ET_NONE 0
43 #define ET_LOPROC 0xff00
[all …]
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| /kernel/linux/linux-4.19/arch/arm/mach-tegra/ |
| D | iomap.h | 25 #define TEGRA_IRAM_BASE 0x40000000
28 #define TEGRA_ARM_PERIF_BASE 0x50040000
31 #define TEGRA_ARM_INT_DIST_BASE 0x50041000
34 #define TEGRA_TMR1_BASE 0x60005000
37 #define TEGRA_TMR2_BASE 0x60005008
40 #define TEGRA_TMRUS_BASE 0x60005010
43 #define TEGRA_TMR3_BASE 0x60005050
46 #define TEGRA_TMR4_BASE 0x60005058
49 #define TEGRA_CLK_RESET_BASE 0x60006000
52 #define TEGRA_FLOW_CTRL_BASE 0x60007000
[all …]
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| /kernel/linux/linux-4.19/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/ |
| D | phytbl_lcn.c | 21 0x00000000,
22 0x00000000,
23 0x00000000,
24 0x00000000,
25 0x00000000,
26 0x00000000,
27 0x00000000,
28 0x00000000,
29 0x00000004,
30 0x00000000,
[all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/ |
| D | phytbl_lcn.c | 10 0x00000000,
11 0x00000000,
12 0x00000000,
13 0x00000000,
14 0x00000000,
15 0x00000000,
16 0x00000000,
17 0x00000000,
18 0x00000004,
19 0x00000000,
[all …]
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| /kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/ |
| D | elf.h | 36 #define PT_NULL 0
44 #define PT_LOOS 0x60000000
45 #define PT_HIOS 0x6fffffff
46 #define PT_LOPROC 0x70000000
47 #define PT_HIPROC 0x7fffffff
48 #define PT_GNU_EH_FRAME 0x6474e550
49 #define PT_GNU_PROPERTY 0x6474e553
50 #define PT_GNU_STACK (PT_LOOS + 0x474e551)
51 #define PN_XNUM 0xffff
52 #define ET_NONE 0
[all …]
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| /kernel/linux/linux-5.10/arch/m68k/include/asm/ |
| D | fbio.h | 13 #define FBTYPE_SUN1BW 0 /* mono */
58 #define FBIOGTYPE _IOR('F', 0, struct fbtype)
61 int index; /* first element (0 origin) */
124 #define FB_WID_SHARED_8 0
196 #define FB_CLUT_WAIT 0x00000001 /* Not yet implemented */
225 #define CG6_FBC 0x70000000
226 #define CG6_TEC 0x70001000
227 #define CG6_BTREGS 0x70002000
228 #define CG6_FHC 0x70004000
229 #define CG6_THC 0x70005000
[all …]
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| /kernel/linux/linux-4.19/arch/m68k/include/asm/ |
| D | fbio.h | 13 #define FBTYPE_SUN1BW 0 /* mono */
58 #define FBIOGTYPE _IOR('F', 0, struct fbtype)
61 int index; /* first element (0 origin) */
124 #define FB_WID_SHARED_8 0
196 #define FB_CLUT_WAIT 0x00000001 /* Not yet implemented */
225 #define CG6_FBC 0x70000000
226 #define CG6_TEC 0x70001000
227 #define CG6_BTREGS 0x70002000
228 #define CG6_FHC 0x70004000
229 #define CG6_THC 0x70005000
[all …]
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| /kernel/linux/linux-4.19/arch/powerpc/boot/dts/ |
| D | kuroboxHD.dts | 37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x4000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
[all …]
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| D | kuroboxHG.dts | 37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x8000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/ |
| D | kuroboxHD.dts | 37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x4000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
[all …]
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| D | kuroboxHG.dts | 37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x8000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
[all …]
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| /kernel/linux/linux-4.19/drivers/gpu/drm/amd/amdkfd/ |
| D | cwsr_trap_handler.h | 24 0xbf820001, 0xbf82012b,
25 0xb8f4f802, 0x89748674,
26 0xb8f5f803, 0x8675ff75,
27 0x00000400, 0xbf850017,
28 0xc00a1e37, 0x00000000,
29 0xbf8c007f, 0x87777978,
30 0xbf840005, 0x8f728374,
31 0xb972e0c2, 0xbf800002,
32 0xb9740002, 0xbe801d78,
33 0xb8f5f803, 0x8675ff75,
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mips/ |
| D | mscc.txt | 25 reg = <0x71070000 0x1c>;
42 reg = <0x70000000 0x2c>;
|
| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | elf.h | 26 #define PT_NULL 0
34 #define PT_LOOS 0x60000000 /* OS-specific */
35 #define PT_HIOS 0x6fffffff /* OS-specific */
36 #define PT_LOPROC 0x70000000
37 #define PT_HIPROC 0x7fffffff
38 #define PT_GNU_EH_FRAME 0x6474e550
39 #define PT_GNU_PROPERTY 0x6474e553
41 #define PT_GNU_STACK (PT_LOOS + 0x474e551)
47 * or equal to PN_XNUM(0xffff), it is set to sh_info field of the
48 * section header at index 0, and PN_XNUM is set to e_phnum
[all …]
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| /kernel/linux/linux-4.19/include/uapi/linux/ |
| D | elf.h | 26 #define PT_NULL 0
34 #define PT_LOOS 0x60000000 /* OS-specific */
35 #define PT_HIOS 0x6fffffff /* OS-specific */
36 #define PT_LOPROC 0x70000000
37 #define PT_HIPROC 0x7fffffff
38 #define PT_GNU_EH_FRAME 0x6474e550
40 #define PT_GNU_STACK (PT_LOOS + 0x474e551)
46 * or equal to PN_XNUM(0xffff), it is set to sh_info field of the
47 * section header at index 0, and PN_XNUM is set to e_phnum
48 * field. Otherwise, the section header at index 0 is zero
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mips/ |
| D | mscc.txt | 25 reg = <0x71070000 0x1c>;
42 reg = <0x70000000 0x2c>;
58 reg = <0x10d0000 0x10000>;
|
| /kernel/linux/linux-4.19/arch/arm64/boot/dts/sprd/ |
| D | sharkl64.dtsi | 28 reg = <0 0x70000000 0 0x100>;
29 interrupts = <0 2 0xf04>;
36 reg = <0 0x70100000 0 0x100>;
37 interrupts = <0 3 0xf04>;
44 reg = <0 0x70200000 0 0x100>;
45 interrupts = <0 4 0xf04>;
52 reg = <0 0x70300000 0 0x100>;
53 interrupts = <0 5 0xf04>;
62 #clock-cells = <0>;
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/sprd/ |
| D | sharkl64.dtsi | 28 reg = <0 0x70000000 0 0x100>;
29 interrupts = <0 2 0xf04>;
36 reg = <0 0x70100000 0 0x100>;
37 interrupts = <0 3 0xf04>;
44 reg = <0 0x70200000 0 0x100>;
45 interrupts = <0 4 0xf04>;
52 reg = <0 0x70300000 0 0x100>;
53 interrupts = <0 5 0xf04>;
62 #clock-cells = <0>;
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