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Searched +full:0 +full:xfff11000 (Results 1 – 9 of 9) sorted by relevance

/kernel/linux/linux-5.10/arch/arm/boot/dts/
Decx-2000.dts9 /memreserve/ 0x00000000 0x0001000;
19 #size-cells = <0>;
21 cpu@0 {
24 reg = <0>;
54 memory@0 {
57 reg = <0x00000000 0x00000000 0x00000000 0xff800000>;
63 reg = <0x00000002 0x00000000 0x00000003 0x00000000>;
67 ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>;
70 compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>,
71 <1 14 0xf08>,
[all …]
Dhighbank.dts9 /memreserve/ 0x00000000 0x0001000;
19 #size-cells = <0>;
24 reg = <0x900>;
43 reg = <0x901>;
62 reg = <0x902>;
81 reg = <0x903>;
98 memory@0 {
101 reg = <0x00000000 0xff900000>;
105 ranges = <0x00000000 0x00000000 0xffffffff>;
109 reg = <0xfff00000 0x1000>;
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Decx-2000.dts20 /memreserve/ 0x00000000 0x0001000;
31 #size-cells = <0>;
33 cpu@0 {
36 reg = <0>;
66 memory@0 {
69 reg = <0x00000000 0x00000000 0x00000000 0xff800000>;
75 reg = <0x00000002 0x00000000 0x00000003 0x00000000>;
79 ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>;
82 compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>,
83 <1 14 0xf08>,
[all …]
Dhighbank.dts20 /memreserve/ 0x00000000 0x0001000;
31 #size-cells = <0>;
36 reg = <0x900>;
55 reg = <0x901>;
74 reg = <0x902>;
93 reg = <0x903>;
113 reg = <0x00000000 0xff900000>;
117 ranges = <0x00000000 0x00000000 0xffffffff>;
121 reg = <0xfff00000 0x1000>;
122 interrupts = <0 91 4>;
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic.txt31 The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI
35 SPI interrupts are in the range [0-987]. PPI interrupts are in the
36 range [0-15].
39 bits[3:0] trigger type and level flags.
87 reg = <0xfff11000 0x1000>,
88 <0xfff10100 0x100>;
113 reg = <0x2c001000 0x1000>,
114 <0x2c002000 0x2000>,
115 <0x2c004000 0x2000>,
116 <0x2c006000 0x2000>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic.yaml59 enum: [ 0, 1 ]
66 The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI
70 SPI interrupts are in the range [0-987]. PPI interrupts are in the
71 range [0-15].
74 bits[3:0] trigger type and level flags.
142 "^v2m@[0-9a-f]+$":
189 reg = <0xfff11000 0x1000>,
190 <0xfff10100 0x100>;
199 reg = <0x2c001000 0x1000>,
200 <0x2c002000 0x2000>,
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhikey970-pinctrl.dtsi16 reg = <0x0 0xe896c000 0x0 0x72c>;
18 #gpio-range-cells = <0x3>;
19 pinctrl-single,register-width = <0x20>;
20 pinctrl-single,function-mask = <0x7>;
22 pinctrl-single,gpio-range = <&range 0 82 0>;
26 0x054 MUX_M2 /* UART0_RXD */
27 0x058 MUX_M2 /* UART0_TXD */
33 0x700 MUX_M2 /* UART2_CTS_N */
34 0x704 MUX_M2 /* UART2_RTS_N */
35 0x708 MUX_M2 /* UART2_RXD */
[all …]
Dhikey960-pinctrl.dtsi18 reg = <0x0 0xe896c000 0x0 0x1f0>;
20 #gpio-range-cells = <0x3>;
21 pinctrl-single,register-width = <0x20>;
22 pinctrl-single,function-mask = <0x7>;
25 &range 0 7 0
26 &range 8 116 0>;
30 0x008 MUX_M1 /* PMU1_SSI */
31 0x00c MUX_M1 /* PMU2_SSI */
32 0x010 MUX_M1 /* PMU_CLKOUT */
33 0x100 MUX_M1 /* PMU_HKADC_SSI */
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/hisilicon/
Dhikey960-pinctrl.dtsi18 reg = <0x0 0xe896c000 0x0 0x1f0>;
20 #gpio-range-cells = <0x3>;
21 pinctrl-single,register-width = <0x20>;
22 pinctrl-single,function-mask = <0x7>;
25 &range 0 7 0
26 &range 8 116 0>;
30 0x008 MUX_M1 /* PMU1_SSI */
31 0x00c MUX_M1 /* PMU2_SSI */
32 0x010 MUX_M1 /* PMU_CLKOUT */
33 0x100 MUX_M1 /* PMU_HKADC_SSI */
[all …]