| /kernel/liteos_m/testsuites/sample/kernel/queue/ |
| D | It_los_queue_004.c | 43 // 0xFFFE, maxMsgSize is 1-0xFFFF-4, 0xFFFE is the boundary value in Testcase()
44 ret = LOS_QueueCreate("Q1", 1, &g_testQueueID01, 0, 0xFFFE); in Testcase()
48 // CB2201 Board is low memory device, set max message size 0x4000. in Testcase()
49 ret = LOS_QueueCreate("Q1", 1, &g_testQueueID01, 0, 0x4000); in Testcase()
51 // 0x8000, is the middle number. in Testcase()
52 ret = LOS_QueueCreate("Q1", 1, &g_testQueueID01, 0, 0x8000); in Testcase()
56 ret = LOS_QueueWrite(g_testQueueID01 + 1, &buff1, QUEUE_BASE_MSGSIZE, 0); in Testcase()
59 ret = LOS_QueueRead(g_testQueueID01 + 1, &buff2, QUEUE_BASE_MSGSIZE, 0); in Testcase()
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| D | It_los_queue_009.c | 44 ret = LOS_QueueCreate("Q1", 0xFFFE, &g_testQueueID01, 0, 0xFFF0); in Testcase()
47 ret = LOS_QueueWrite(g_testQueueID01, &buff1, QUEUE_BASE_MSGSIZE, 0); in Testcase()
50 ret = LOS_QueueRead(g_testQueueID01, &buff2, QUEUE_BASE_MSGSIZE, 0); in Testcase()
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| /kernel/linux/linux-5.10/drivers/mfd/ |
| D | tmio_core.c | 9 #define CNF_CMD 0x04
10 #define CNF_CTL_BASE 0x10
11 #define CNF_INT_PIN 0x3d
12 #define CNF_STOP_CLK_CTL 0x40
13 #define CNF_GCLK_CTL 0x41
14 #define CNF_SD_CLK_MODE 0x42
15 #define CNF_PIN_STATUS 0x44
16 #define CNF_PWR_CTL_1 0x48
17 #define CNF_PWR_CTL_2 0x49
18 #define CNF_PWR_CTL_3 0x4a
[all …]
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| D | tc6387xb.c | 30 .start = 0x800,
31 .end = 0x9ff,
35 .start = 0,
36 .end = 0,
53 return 0; in tc6387xb_suspend()
65 tmio_core_mmc_resume(tc6387xb->scr + 0x200, 0, in tc6387xb_resume()
66 tc6387xb_mmc_resources[0].start & 0xfffe); in tc6387xb_resume()
68 return 0; in tc6387xb_resume()
81 tmio_core_mmc_pwr(tc6387xb->scr + 0x200, 0, state); in tc6387xb_mmc_pwr()
88 tmio_core_mmc_clk_div(tc6387xb->scr + 0x200, 0, state); in tc6387xb_mmc_clk_div()
[all …]
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| /kernel/linux/linux-4.19/drivers/mfd/ |
| D | tmio_core.c | 12 #define CNF_CMD 0x04
13 #define CNF_CTL_BASE 0x10
14 #define CNF_INT_PIN 0x3d
15 #define CNF_STOP_CLK_CTL 0x40
16 #define CNF_GCLK_CTL 0x41
17 #define CNF_SD_CLK_MODE 0x42
18 #define CNF_PIN_STATUS 0x44
19 #define CNF_PWR_CTL_1 0x48
20 #define CNF_PWR_CTL_2 0x49
21 #define CNF_PWR_CTL_3 0x4a
[all …]
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| D | tc6387xb.c | 34 .start = 0x800,
35 .end = 0x9ff,
39 .start = 0,
40 .end = 0,
57 return 0; in tc6387xb_suspend()
69 tmio_core_mmc_resume(tc6387xb->scr + 0x200, 0, in tc6387xb_resume()
70 tc6387xb_mmc_resources[0].start & 0xfffe); in tc6387xb_resume()
72 return 0; in tc6387xb_resume()
86 tmio_core_mmc_pwr(tc6387xb->scr + 0x200, 0, state); in tc6387xb_mmc_pwr()
94 tmio_core_mmc_clk_div(tc6387xb->scr + 0x200, 0, state); in tc6387xb_mmc_clk_div()
[all …]
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| /kernel/linux/linux-4.19/arch/x86/include/uapi/asm/ |
| D | boot.h | 6 #define NORMAL_VGA 0xffff /* 80x25 mode */
7 #define EXTENDED_VGA 0xfffe /* 80x50 mode */
8 #define ASK_VGA 0xfffd /* ask for it at bootup */
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| /kernel/linux/linux-5.10/arch/x86/include/uapi/asm/ |
| D | boot.h | 6 #define NORMAL_VGA 0xffff /* 80x25 mode */
7 #define EXTENDED_VGA 0xfffe /* 80x50 mode */
8 #define ASK_VGA 0xfffd /* ask for it at bootup */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | dma-controller.yaml | 26 reg = <0x48000000 0x1000>;
27 interrupts = <0 12 0x4
28 0 13 0x4
29 0 14 0x4
30 0 15 0x4>;
34 dma-channel-mask = <0xfffe>;
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| /kernel/linux/linux-5.10/include/net/ |
| D | af_ieee802154.h | 18 IEEE802154_ADDR_NONE = 0x0,
19 /* RESERVED = 0x01, */
20 IEEE802154_ADDR_SHORT = 0x2, /* 16-bit address + PANid */
21 IEEE802154_ADDR_LONG = 0x3, /* 64-bit address + PANid */
36 #define IEEE802154_PANID_BROADCAST 0xffff
37 #define IEEE802154_ADDR_BROADCAST 0xffff
38 #define IEEE802154_ADDR_UNDEF 0xfffe
46 #define SOL_IEEE802154 0
48 #define WPAN_WANTACK 0
53 #define WPAN_SECURITY_DEFAULT 0
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| /kernel/linux/linux-4.19/include/net/ |
| D | af_ieee802154.h | 26 IEEE802154_ADDR_NONE = 0x0,
27 /* RESERVED = 0x01, */
28 IEEE802154_ADDR_SHORT = 0x2, /* 16-bit address + PANid */
29 IEEE802154_ADDR_LONG = 0x3, /* 64-bit address + PANid */
44 #define IEEE802154_PANID_BROADCAST 0xffff
45 #define IEEE802154_ADDR_BROADCAST 0xffff
46 #define IEEE802154_ADDR_UNDEF 0xfffe
54 #define SOL_IEEE802154 0
56 #define WPAN_WANTACK 0
61 #define WPAN_SECURITY_DEFAULT 0
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| /kernel/linux/linux-4.19/drivers/net/ethernet/broadcom/bnxt/ |
| D | bnxt_ethtool.h | 78 #define BNXT_FW_RESET_AP 0xfffe
79 #define BNXT_FW_RESET_CHIP 0xffff
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| /kernel/linux/linux-5.10/include/linux/mtd/ |
| D | nftl.h | 15 #define BLOCK_NIL 0xffff /* last block of a chain */
16 #define BLOCK_FREE 0xfffe /* free block */
17 #define BLOCK_NOTEXPLORED 0xfffd /* non explored block, only used during mounting */
18 #define BLOCK_RESERVED 0xfffc /* bios block or bad block */
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| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| D | r600_dma.c | 61 return (rptr & 0x3fffc) >> 2; in r600_dma_get_rptr()
75 return (RREG32(DMA_RB_WPTR) & 0x3fffc) >> 2; in r600_dma_get_wptr()
89 WREG32(DMA_RB_WPTR, (ring->wptr << 2) & 0x3fffc); in r600_dma_set_wptr()
118 * Returns 0 for success, error for failure.
127 WREG32(DMA_SEM_INCOMPLETE_TIMER_CNTL, 0); in r600_dma_resume()
128 WREG32(DMA_SEM_WAIT_FAIL_TIMER_CNTL, 0); in r600_dma_resume()
139 WREG32(DMA_RB_RPTR, 0); in r600_dma_resume()
140 WREG32(DMA_RB_WPTR, 0); in r600_dma_resume()
144 upper_32_bits(rdev->wb.gpu_addr + R600_WB_DMA_RPTR_OFFSET) & 0xFF); in r600_dma_resume()
146 ((rdev->wb.gpu_addr + R600_WB_DMA_RPTR_OFFSET) & 0xFFFFFFFC)); in r600_dma_resume()
[all …]
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| /kernel/linux/linux-4.19/drivers/gpu/drm/radeon/ |
| D | r600_dma.c | 61 return (rptr & 0x3fffc) >> 2; in r600_dma_get_rptr()
75 return (RREG32(DMA_RB_WPTR) & 0x3fffc) >> 2; in r600_dma_get_wptr()
89 WREG32(DMA_RB_WPTR, (ring->wptr << 2) & 0x3fffc); in r600_dma_set_wptr()
118 * Returns 0 for success, error for failure.
127 WREG32(DMA_SEM_INCOMPLETE_TIMER_CNTL, 0); in r600_dma_resume()
128 WREG32(DMA_SEM_WAIT_FAIL_TIMER_CNTL, 0); in r600_dma_resume()
139 WREG32(DMA_RB_RPTR, 0); in r600_dma_resume()
140 WREG32(DMA_RB_WPTR, 0); in r600_dma_resume()
144 upper_32_bits(rdev->wb.gpu_addr + R600_WB_DMA_RPTR_OFFSET) & 0xFF); in r600_dma_resume()
146 ((rdev->wb.gpu_addr + R600_WB_DMA_RPTR_OFFSET) & 0xFFFFFFFC)); in r600_dma_resume()
[all …]
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| /kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/ |
| D | if_arp.h | 9 #define ARPHRD_NETROM 0
75 #define ARPHRD_VOID 0xFFFF
76 #define ARPHRD_NONE 0xFFFE
97 #define ATF_COM 0x02
98 #define ATF_PERM 0x04
99 #define ATF_PUBL 0x08
100 #define ATF_USETRAILERS 0x10
101 #define ATF_NETMASK 0x20
102 #define ATF_DONTPUB 0x40
109 #if 0
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| /kernel/linux/linux-5.10/drivers/gpu/drm/gma500/ |
| D | psb_device.c | 24 return 0; in psb_output_init()
38 #define PSB_BLC_MAX_PWM_REG_FREQ 0xFFFE
39 #define PSB_BLC_MIN_PWM_REG_FREQ 0x2
41 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
89 return 0; in psb_backlight_setup()
103 return 0; in psb_set_brightness()
117 memset(&props, 0, sizeof(struct backlight_properties)); in psb_backlight_init()
127 if (ret < 0) { in psb_backlight_init()
140 return 0; in psb_backlight_init()
197 return 0; in psb_save_display_registers()
[all …]
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| /kernel/linux/patches/linux-5.10/prebuilts/usr/include/asm-x86/asm/ |
| D | boot.h | 21 #define NORMAL_VGA 0xffff
22 #define EXTENDED_VGA 0xfffe
23 #define ASK_VGA 0xfffd
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| /kernel/linux/linux-4.19/include/linux/mtd/ |
| D | nftl.h | 29 #define BLOCK_NIL 0xffff /* last block of a chain */
30 #define BLOCK_FREE 0xfffe /* free block */
31 #define BLOCK_NOTEXPLORED 0xfffd /* non explored block, only used during mounting */
32 #define BLOCK_RESERVED 0xfffc /* bios block or bad block */
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| /kernel/liteos_a/testsuites/kernel/sample/kernel_base/ipc/sem/smoke/ |
| D | It_los_sem_006.c | 40 #define IT_SEM_COUNT_MAX 0xFFFE
46 ret = LOS_SemCreate(0, &g_semID); in Testcase()
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| D | It_los_sem_003.c | 40 #define IT_SEM_COUNT_MAX 0xFFFE
46 ret = LOS_SemCreate(0, &g_semID); in Testcase()
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| D | It_los_sem_001.c | 40 #define IT_SEM_COUNT_MAX 0xFFFE
46 ret = LOS_SemCreate(0, &g_semID); in Testcase()
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| /kernel/liteos_a/testsuites/kernel/sample/kernel_base/ipc/queue/full/ |
| D | It_los_queue_009.c | 47 ret = LOS_QueueCreate("Q1", 0xFFFE, &g_testQueueID01, 0, 0xFFF0); in Testcase()
50 … ret = LOS_QueueWrite(g_testQueueID01, &buff1, 8, 0); // 8, Write the setting size of queue buffer. in Testcase()
53 ret = LOS_QueueRead(g_testQueueID01, &buff2, 8, 0); // 8, Read the setting size of queue buffer. in Testcase()
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| /kernel/linux/linux-4.19/drivers/infiniband/hw/hns/ |
| D | hns_roce_common.h | 55 } while (0)
65 * @bits: the number of bits of a and b, range: 0~31.
73 * If a equals 0xfffe, b equals 0x1 and bits equals 16, we think b has
74 * incresed from 0xffff to 0x1 and a is less than b.
75 * If a equals 0xfffe, b equals 0x0xf001 and bits equals 16, we think a
84 roce_hw_index_shift(bits)) < 0)
99 #define ROCEE_DMAE_USER_CFG1_ROCEE_STREAM_ID_TB_CFG_S 0
107 #define ROCEE_DMAE_USER_CFG2_ROCEE_STREAM_ID_PKT_CFG_S 0
115 #define ROCEE_DB_SQ_WL_ROCEE_DB_SQ_WL_S 0
123 #define ROCEE_DB_OTHERS_WL_ROCEE_DB_OTH_WL_S 0
[all …]
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| /kernel/linux/linux-5.10/drivers/watchdog/ |
| D | ibmasr.c | 37 #define TOPAZ_ASR_TOGGLE 0x40
38 #define TOPAZ_ASR_DISABLE 0x80
41 #define PEARL_BASE 0xe04
42 #define PEARL_WRITE 0xe06
43 #define PEARL_READ 0xe07
45 #define PEARL_ASR_DISABLE_MASK 0x80 /* bit 7: disable = 1, enable = 0 */
46 #define PEARL_ASR_TOGGLE_MASK 0x40 /* bit 6: 0, then 1, then 0 */
49 #define JASPER_ASR_REG_OFFSET 0x38
51 #define JASPER_ASR_DISABLE_MASK 0x01 /* bit 0: disable = 1, enable = 0 */
52 #define JASPER_ASR_TOGGLE_MASK 0x02 /* bit 1: 0, then 1, then 0 */
[all …]
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