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/kernel/linux/linux-5.10/arch/arm/mach-davinci/
Dda850.c2 * TI DA850/OMAP-L138 chip specific setup
4 * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/
6 * Derived from: arch/arm/mach-davinci/da830.c
15 #include <linux/clk-provider.h>
22 #include <linux/irqchip/irq-davinci-cp-intc.h>
23 #include <linux/mfd/da8xx-cfgchip.h>
24 #include <linux/platform_data/clk-da8xx-cfgchip.h>
25 #include <linux/platform_data/clk-davinci-pll.h>
26 #include <linux/platform_data/davinci-cpufreq.h>
27 #include <linux/platform_data/gpio-davinci.h>
[all …]
/kernel/linux/linux-4.19/arch/arm/mach-davinci/
Dda850.c2 * TI DA850/OMAP-L138 chip specific setup
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
6 * Derived from: arch/arm/mach-davinci/da830.c
15 #include <linux/clk-provider.h>
21 #include <linux/mfd/da8xx-cfgchip.h>
22 #include <linux/platform_data/clk-da8xx-cfgchip.h>
23 #include <linux/platform_data/clk-davinci-pll.h>
24 #include <linux/platform_data/gpio-davinci.h>
56 MUX_CFG(DA850, NUART0_CTS, 3, 24, 15, 2, false)
57 MUX_CFG(DA850, NUART0_RTS, 3, 28, 15, 2, false)
[all …]
/kernel/linux/linux-5.10/include/linux/mfd/wm831x/
Dotp.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/linux/mfd/wm831x/otp.h -- OTP interface for WM831x
17 * R30720 (0x7800) - Unique ID 1
19 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
20 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
21 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
24 * R30721 (0x7801) - Unique ID 2
26 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
27 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
28 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
[all …]
Dregulator.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/mfd/wm831x/regulator.h -- Regulator definitons for wm831x
14 * R16462 (0x404E) - Current Sink 1
18 #define WM831X_CS1_ENA_SHIFT 15 /* CS1_ENA */
19 #define WM831X_CS1_ENA_WIDTH 1 /* CS1_ENA */
23 #define WM831X_CS1_DRIVE_WIDTH 1 /* CS1_DRIVE */
27 #define WM831X_CS1_SLPENA_WIDTH 1 /* CS1_SLPENA */
28 #define WM831X_CS1_OFF_RAMP_MASK 0x0C00 /* CS1_OFF_RAMP - [11:10] */
29 #define WM831X_CS1_OFF_RAMP_SHIFT 10 /* CS1_OFF_RAMP - [11:10] */
30 #define WM831X_CS1_OFF_RAMP_WIDTH 2 /* CS1_OFF_RAMP - [11:10] */
[all …]
/kernel/linux/linux-4.19/include/linux/mfd/wm831x/
Dotp.h2 * include/linux/mfd/wm831x/otp.h -- OTP interface for WM831x
22 * R30720 (0x7800) - Unique ID 1
24 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
25 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
26 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
29 * R30721 (0x7801) - Unique ID 2
31 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
32 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
33 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
36 * R30722 (0x7802) - Unique ID 3
[all …]
Dregulator.h2 * linux/mfd/wm831x/regulator.h -- Regulator definitons for wm831x
19 * R16462 (0x404E) - Current Sink 1
23 #define WM831X_CS1_ENA_SHIFT 15 /* CS1_ENA */
24 #define WM831X_CS1_ENA_WIDTH 1 /* CS1_ENA */
28 #define WM831X_CS1_DRIVE_WIDTH 1 /* CS1_DRIVE */
32 #define WM831X_CS1_SLPENA_WIDTH 1 /* CS1_SLPENA */
33 #define WM831X_CS1_OFF_RAMP_MASK 0x0C00 /* CS1_OFF_RAMP - [11:10] */
34 #define WM831X_CS1_OFF_RAMP_SHIFT 10 /* CS1_OFF_RAMP - [11:10] */
35 #define WM831X_CS1_OFF_RAMP_WIDTH 2 /* CS1_OFF_RAMP - [11:10] */
36 #define WM831X_CS1_ON_RAMP_MASK 0x0300 /* CS1_ON_RAMP - [9:8] */
[all …]
/kernel/linux/linux-5.10/sound/soc/codecs/
Dwm5100.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * wm5100.h -- WM5100 ALSA SoC Audio driver
18 #define WM5100_CLK_AIF1 1
27 #define WM5100_CLKSRC_MCLK2 1
36 #define WM5100_FLL1 1
891 * R0 (0x00) - software reset
893 #define WM5100_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
894 #define WM5100_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
895 #define WM5100_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
898 * R1 (0x01) - Device Revision
[all …]
Dwm9081.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * wm9081.c -- WM9081 ALSA SoC Audio driver
18 #define WM9081_SYSCLK_MCLK 1 /* Use MCLK without FLL */
88 * R0 (0x00) - Software Reset
90 #define WM9081_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
91 #define WM9081_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
92 #define WM9081_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
95 * R2 (0x02) - Analogue Lineout
100 #define WM9081_LINEOUT_MUTE_WIDTH 1 /* LINEOUT_MUTE */
104 #define WM9081_LINEOUTZC_WIDTH 1 /* LINEOUTZC */
[all …]
Drt5660.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5660.h -- RT5660 ALSA SoC audio driver
20 /* I/O - Output */
23 /* I/O - Input */
26 /* I/O - ADC/DAC/DMIC */
30 /* Mixer - D-D */
35 /* Mixer - ADC */
40 /* Mixer - DAC */
61 /* Format - ADC/DAC */
66 /* Function - Analog */
[all …]
Dwm8995.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * wm8995.h -- WM8995 ALSA SoC Audio driver
753 * R0 (0x00) - Software Reset
755 #define WM8995_SW_RESET_MASK 0xFFFF /* SW_RESET - [15:0] */
756 #define WM8995_SW_RESET_SHIFT 0 /* SW_RESET - [15:0] */
757 #define WM8995_SW_RESET_WIDTH 16 /* SW_RESET - [15:0] */
760 * R1 (0x01) - Power Management (1)
765 #define WM8995_MICB2_ENA_WIDTH 1 /* MICB2_ENA */
769 #define WM8995_MICB1_ENA_WIDTH 1 /* MICB1_ENA */
773 #define WM8995_HPOUT2L_ENA_WIDTH 1 /* HPOUT2L_ENA */
[all …]
Dwm2200.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * wm2200.h - WM2200 audio codec interface
12 #define WM2200_CLK_SYSCLK 1
15 #define WM2200_CLKSRC_MCLK2 1
20 #define WM2200_FLL_SRC_MCLK2 1
529 * R0 (0x00) - software reset
531 #define WM2200_SW_RESET_CHIP_ID1_MASK 0xFFFF /* SW_RESET_CHIP_ID1 - [15:0] */
532 #define WM2200_SW_RESET_CHIP_ID1_SHIFT 0 /* SW_RESET_CHIP_ID1 - [15:0] */
533 #define WM2200_SW_RESET_CHIP_ID1_WIDTH 16 /* SW_RESET_CHIP_ID1 - [15:0] */
536 * R1 (0x01) - Device Revision
[all …]
Dwm8962.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * wm8962.h -- WM8962 ASoC driver
17 #define WM8962_SYSCLK_FLL 1
20 #define WM8962_FLL 1
22 #define WM8962_FLL_MCLK 1
1178 * R0 (0x00) - Left Input volume
1183 #define WM8962_IN_VU_WIDTH 1 /* IN_VU */
1187 #define WM8962_INPGAL_MUTE_WIDTH 1 /* INPGAL_MUTE */
1191 #define WM8962_INL_ZC_WIDTH 1 /* INL_ZC */
1192 #define WM8962_INL_VOL_MASK 0x003F /* INL_VOL - [5:0] */
[all …]
/kernel/linux/linux-4.19/sound/soc/codecs/
Dwm5100.h2 * wm5100.h -- WM5100 ALSA SoC Audio driver
22 #define WM5100_CLK_AIF1 1
31 #define WM5100_CLKSRC_MCLK2 1
40 #define WM5100_FLL1 1
895 * R0 (0x00) - software reset
897 #define WM5100_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
898 #define WM5100_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
899 #define WM5100_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
902 * R1 (0x01) - Device Revision
904 #define WM5100_DEVICE_REVISION_MASK 0x000F /* DEVICE_REVISION - [3:0] */
[all …]
Dwm9081.h5 * wm9081.c -- WM9081 ALSA SoC Audio driver
21 #define WM9081_SYSCLK_MCLK 1 /* Use MCLK without FLL */
91 * R0 (0x00) - Software Reset
93 #define WM9081_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
94 #define WM9081_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
95 #define WM9081_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
98 * R2 (0x02) - Analogue Lineout
103 #define WM9081_LINEOUT_MUTE_WIDTH 1 /* LINEOUT_MUTE */
107 #define WM9081_LINEOUTZC_WIDTH 1 /* LINEOUTZC */
108 #define WM9081_LINEOUT_VOL_MASK 0x003F /* LINEOUT_VOL - [5:0] */
[all …]
Drt5660.h2 * rt5660.h -- RT5660 ALSA SoC audio driver
23 /* I/O - Output */
26 /* I/O - Input */
29 /* I/O - ADC/DAC/DMIC */
33 /* Mixer - D-D */
38 /* Mixer - ADC */
43 /* Mixer - DAC */
64 /* Format - ADC/DAC */
69 /* Function - Analog */
92 /* Function - Digital */
[all …]
Dwm8995.h2 * wm8995.h -- WM8995 ALSA SoC Audio driver
756 * R0 (0x00) - Software Reset
758 #define WM8995_SW_RESET_MASK 0xFFFF /* SW_RESET - [15:0] */
759 #define WM8995_SW_RESET_SHIFT 0 /* SW_RESET - [15:0] */
760 #define WM8995_SW_RESET_WIDTH 16 /* SW_RESET - [15:0] */
763 * R1 (0x01) - Power Management (1)
768 #define WM8995_MICB2_ENA_WIDTH 1 /* MICB2_ENA */
772 #define WM8995_MICB1_ENA_WIDTH 1 /* MICB1_ENA */
776 #define WM8995_HPOUT2L_ENA_WIDTH 1 /* HPOUT2L_ENA */
780 #define WM8995_HPOUT2R_ENA_WIDTH 1 /* HPOUT2R_ENA */
[all …]
Dwm2200.h2 * wm2200.h - WM2200 audio codec interface
16 #define WM2200_CLK_SYSCLK 1
19 #define WM2200_CLKSRC_MCLK2 1
24 #define WM2200_FLL_SRC_MCLK2 1
533 * R0 (0x00) - software reset
535 #define WM2200_SW_RESET_CHIP_ID1_MASK 0xFFFF /* SW_RESET_CHIP_ID1 - [15:0] */
536 #define WM2200_SW_RESET_CHIP_ID1_SHIFT 0 /* SW_RESET_CHIP_ID1 - [15:0] */
537 #define WM2200_SW_RESET_CHIP_ID1_WIDTH 16 /* SW_RESET_CHIP_ID1 - [15:0] */
540 * R1 (0x01) - Device Revision
542 #define WM2200_DEVICE_REVISION_MASK 0x000F /* DEVICE_REVISION - [3:0] */
[all …]
Dwm8962.h2 * wm8962.h -- WM8962 ASoC driver
20 #define WM8962_SYSCLK_FLL 1
23 #define WM8962_FLL 1
25 #define WM8962_FLL_MCLK 1
1181 * R0 (0x00) - Left Input volume
1186 #define WM8962_IN_VU_WIDTH 1 /* IN_VU */
1190 #define WM8962_INPGAL_MUTE_WIDTH 1 /* INPGAL_MUTE */
1194 #define WM8962_INL_ZC_WIDTH 1 /* INL_ZC */
1195 #define WM8962_INL_VOL_MASK 0x003F /* INL_VOL - [5:0] */
1196 #define WM8962_INL_VOL_SHIFT 0 /* INL_VOL - [5:0] */
[all …]
/kernel/linux/linux-5.10/tools/accounting/
Dgetdelays.c1 // SPDX-License-Identifier: GPL-2.0
4 * Utility to get per-pid and per-tgid delay accounting statistics
12 * gcc -I/usr/src/linux/include getdelays.c -o getdelays
38 #define GENLMSG_PAYLOAD(glh) (NLMSG_PAYLOAD(glh, 0) - GENL_HDRLEN)
40 #define NLA_PAYLOAD(len) (len - NLA_HDRLEN)
77 fprintf(stderr, "getdelays [-dilv] [-w logfile] [-r bufsize] " in usage()
78 "[-m cpumask] [-t tgid] [-p pid]\n"); in usage()
79 fprintf(stderr, " -d: print delayacct stats\n"); in usage()
80 fprintf(stderr, " -i: print IO accounting (works only with -p)\n"); in usage()
81 fprintf(stderr, " -l: listen forever\n"); in usage()
[all …]
/kernel/linux/linux-4.19/arch/arm64/crypto/
Dsha512-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sha512-ce-core.S - core SHA-384/SHA-512 transform using v8 Crypto Extensions
15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19
37 * The SHA-512 round constants
117 0: ld1 {v8.2d-v11.2d}, [x19]
121 ld1 {v20.2d-v23.2d}, [x3], #64
124 1: ld1 {v12.2d-v15.2d}, [x20], #64
125 ld1 {v16.2d-v19.2d}, [x20], #64
126 sub w21, w21, #1
144 // v0 ab cd -- ef gh ab
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/
Datafb_iplan2p4.c2 * linux/drivers/video/iplan2p4.c -- Low level frame buffer operations for
46 if (!((sx ^ dx) & 15)) { in atafb_iplan2p4_copyarea()
47 /* odd->odd or even->even */ in atafb_iplan2p4_copyarea()
50 src = (u8 *)info->screen_base + sy * next_line + (sx & ~15) / (8 / BPL); in atafb_iplan2p4_copyarea()
51 dst = (u8 *)info->screen_base + dy * next_line + (dx & ~15) / (8 / BPL); in atafb_iplan2p4_copyarea()
52 if (sx & 15) { in atafb_iplan2p4_copyarea()
53 memmove32_col(dst, src, 0xff00ff, height, next_line - BPL * 2); in atafb_iplan2p4_copyarea()
56 width -= 8; in atafb_iplan2p4_copyarea()
63 l = next_line - w * 4; in atafb_iplan2p4_copyarea()
64 for (j = height; j > 0; j--) { in atafb_iplan2p4_copyarea()
[all …]
/kernel/linux/linux-5.10/arch/csky/kernel/probes/
Dsimulate-insn.c1 // SPDX-License-Identifier: GPL-2.0+
7 #include "decode-insn.h"
8 #include "simulate-insn.h"
15 *ptr = *(&regs->a0 + index); in csky_insn_reg_get_val()
17 if (index > 15 && index < 31) in csky_insn_reg_get_val()
18 *ptr = *(&regs->exregs[0] + index - 16); in csky_insn_reg_get_val()
22 *ptr = regs->usp; in csky_insn_reg_get_val()
24 case 15: in csky_insn_reg_get_val()
25 *ptr = regs->lr; in csky_insn_reg_get_val()
28 *ptr = regs->tls; in csky_insn_reg_get_val()
[all …]
/kernel/linux/linux-5.10/arch/arm64/crypto/
Dsha512-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sha512-ce-core.S - core SHA-384/SHA-512 transform using v8 Crypto Extensions
15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19
37 * The SHA-512 round constants
111 ld1 {v8.2d-v11.2d}, [x0]
115 ld1 {v20.2d-v23.2d}, [x3], #64
118 0: ld1 {v12.2d-v15.2d}, [x1], #64
119 ld1 {v16.2d-v19.2d}, [x1], #64
120 sub w2, w2, #1
138 // v0 ab cd -- ef gh ab
[all …]
/kernel/linux/linux-5.10/Documentation/ABI/testing/
Dsysfs-class-rapidio3 On-chip RapidIO controllers and PCIe-to-RapidIO bridges
15 KernelVersion: v3.15
21 0 = small (8-bit destination ID, max. 256 devices),
23 1 = large (16-bit destination ID, max. 65536 devices).
27 KernelVersion: v3.15
46 [rio@rapidio ~]$ ls /sys/class/rapidio_port/rapidio0/ -l
48 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0001
49 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0004
50 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0007
51 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0002
[all …]
/kernel/linux/linux-4.19/Documentation/ABI/testing/
Dsysfs-class-rapidio3 On-chip RapidIO controllers and PCIe-to-RapidIO bridges
14 KernelVersion: v3.15
19 0 = small (8-bit destination ID, max. 256 devices),
20 1 = large (16-bit destination ID, max. 65536 devices).
24 KernelVersion: v3.15
42 [rio@rapidio ~]$ ls /sys/class/rapidio_port/rapidio0/ -l
44 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0001
45 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0004
46 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0007
47 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0002
[all …]

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