| /kernel/linux/linux-4.19/Documentation/i2c/ |
| D | ten-bit-addresses | 1 The I2C protocol knows about two kinds of device addresses: normal 7 bit
2 addresses, and an extended set of 10 bit addresses. The sets of addresses
3 do not intersect: the 7 bit address 0x10 is not the same as the 10 bit
5 To avoid ambiguity, the user sees 10 bit addresses mapped to a different
6 address space, namely 0xa000-0xa3ff. The leading 0xa (= 10) represents the
7 10 bit mode. This is used for creating device names in sysfs. It is also
8 needed when instantiating 10 bit devices via the new_device file in sysfs.
10 I2C messages to and from 10-bit address devices have a different format.
13 The current 10 bit address support is minimal. It should work, however
15 * Not all bus drivers support 10-bit addresses. Some don't because the
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| /kernel/linux/linux-5.10/Documentation/i2c/ |
| D | ten-bit-addresses.rst | 2 I2C Ten-bit Addresses
5 The I2C protocol knows about two kinds of device addresses: normal 7 bit
6 addresses, and an extended set of 10 bit addresses. The sets of addresses
7 do not intersect: the 7 bit address 0x10 is not the same as the 10 bit
9 To avoid ambiguity, the user sees 10 bit addresses mapped to a different
10 address space, namely 0xa000-0xa3ff. The leading 0xa (= 10) represents the
11 10 bit mode. This is used for creating device names in sysfs. It is also
12 needed when instantiating 10 bit devices via the new_device file in sysfs.
14 I2C messages to and from 10-bit address devices have a different format.
17 The current 10 bit address support is minimal. It should work, however
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|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/ |
| D | trivial-devices.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
28 - enum:
29 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
30 - ad,ad7414
31 # ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems
32 - ad,adm9240
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/ |
| D | trivial-devices.txt | 12 abracon,abb5zes3 AB-RTCMC-32.768kHz-B5ZE-S3: Real Time Clock/Calendar Module with I2C Interface
13 ad,ad7414 SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature …
14 ad,adm9240 ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems
15 adi,adt7461 +/-1C TDM Extended Temp Range I.C
16 adt7461 +/-1C TDM Extended Temp Range I.C
17 adi,adt7473 +/-1C TDM Extended Temp Range I.C
18 adi,adt7475 +/-1C TDM Extended Temp Range I.C
19 adi,adt7476 +/-1C TDM Extended Temp Range I.C
20 adi,adt7490 +/-1C TDM Extended Temp Range I.C
21 adi,adxl345 Three-Axis Digital Accelerometer
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|
| /kernel/linux/linux-5.10/Documentation/gpu/ |
| D | afbc.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
8 It provides fine-grained random access and minimizes the amount of
21 AFBC streams can contain several components - where a component
37 reside in the least-significant bits of the corresponding linear
81 Formats which are typically multi-planar in linear layouts (e.g. YUV
111 Cross-device interoperability
115 canonical formats for use between AFBC-enabled devices. Formats which
119 .. flat-table:: AFBC formats
121 * - Fourcc code
122 - Description
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|
| /kernel/linux/linux-4.19/drivers/net/wireless/ath/wil6210/ |
| D | txrx.h | 2 * Copyright (c) 2012-2016 Qualcomm Atheros, Inc.
37 return le32_to_cpu(addr->addr_low) | in wil_desc_addr()
38 ((u64)le16_to_cpu(addr->addr_high) << 32); in wil_desc_addr()
44 addr->addr_low = cpu_to_le32(lower_32_bits(pa)); in wil_desc_addr_set()
45 addr->addr_high = cpu_to_le16((u16)upper_32_bits(pa)); in wil_desc_addr_set()
48 /* Tx descriptor - MAC part
50 * bit 0.. 9 : lifetime_expiry_value:10
51 * bit 10 : interrupt_en:1
52 * bit 11 : status_en:1
53 * bit 12..13 : txss_override:2
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| /kernel/linux/linux-5.10/drivers/staging/comedi/drivers/ |
| D | ni_at_ao.c | 1 // SPDX-License-Identifier: GPL-2.0+
4 * Driver for NI AT-AO-6/10 boards
6 * COMEDI - Linux Control and Measurement Device Interface
12 * Description: National Instruments AT-AO-6/10
13 * Devices: [National Instruments] AT-AO-6 (at-ao-6), AT-AO-10 (at-ao-10)
19 * [0] - I/O port base address
20 * [1] - IRQ (unused)
21 * [2] - DMA (unused)
22 * [3] - analog output range, set by jumpers on hardware
23 * 0 for -10 to 10V bipolar
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| /kernel/linux/linux-4.19/drivers/staging/comedi/drivers/ |
| D | ni_at_ao.c | 1 // SPDX-License-Identifier: GPL-2.0+
4 * Driver for NI AT-AO-6/10 boards
6 * COMEDI - Linux Control and Measurement Device Interface
12 * Description: National Instruments AT-AO-6/10
13 * Devices: [National Instruments] AT-AO-6 (at-ao-6), AT-AO-10 (at-ao-10)
19 * [0] - I/O port base address
20 * [1] - IRQ (unused)
21 * [2] - DMA (unused)
22 * [3] - analog output range, set by jumpers on hardware
23 * 0 for -10 to 10V bipolar
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|
| /kernel/linux/linux-5.10/drivers/net/wireless/ath/wil6210/ |
| D | txrx.h | 1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2012-2016 Qualcomm Atheros, Inc.
4 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
26 return le32_to_cpu(addr->addr_low) | in wil_desc_addr()
27 ((u64)le16_to_cpu(addr->addr_high) << 32); in wil_desc_addr()
33 addr->addr_low = cpu_to_le32(lower_32_bits(pa)); in wil_desc_addr_set()
34 addr->addr_high = cpu_to_le16((u16)upper_32_bits(pa)); in wil_desc_addr_set()
37 /* Tx descriptor - MAC part
39 * bit 0.. 9 : lifetime_expiry_value:10
40 * bit 10 : interrupt_en:1
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|
| /kernel/linux/linux-5.10/drivers/net/ethernet/dec/tulip/ |
| D | pnic2.c | 5 Written/copyright 1994-2001 by Donald Becker.
15 /* Understanding the PNIC_II - everything is this file is based
24 * -----
25 * Bit 24 - SCR
26 * Bit 23 - PCS
27 * Bit 22 - TTM (Trasmit Threshold Mode)
28 * Bit 18 - Port Select
29 * Bit 13 - Start - 1, Stop - 0 Transmissions
30 * Bit 11:10 - Loop Back Operation Mode
31 * Bit 9 - Full Duplex mode (Advertise 10BaseT-FD is CSR14<7> is set)
[all …]
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| /kernel/linux/linux-4.19/drivers/net/ethernet/dec/tulip/ |
| D | pnic2.c | 5 Written/copyright 1994-2001 by Donald Becker.
15 /* Understanding the PNIC_II - everything is this file is based
24 * -----
25 * Bit 24 - SCR
26 * Bit 23 - PCS
27 * Bit 22 - TTM (Trasmit Threshold Mode)
28 * Bit 18 - Port Select
29 * Bit 13 - Start - 1, Stop - 0 Transmissions
30 * Bit 11:10 - Loop Back Operation Mode
31 * Bit 9 - Full Duplex mode (Advertise 10BaseT-FD is CSR14<7> is set)
[all …]
|
| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/ |
| D | css_receiver_2400_common_defs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
28 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8 24 /* 01 1000 YUV420 8-bit …
29 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10 25 /* 01 1001 YUV420 10-bit …
30 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8L 26 /* 01 1010 YUV420 8-bit lega…
31 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV422_8 30 /* 01 1110 YUV422 8-bit …
32 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV422_10 31 /* 01 1111 YUV422 10-bit …
33 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB444 32 /* 10 0000 RGB444 …
34 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB555 33 /* 10 0001 RGB555 …
35 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB565 34 /* 10 0010 RGB565 …
36 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB666 35 /* 10 0011 RGB666 …
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|
| D | isp_acquisition_defs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
19 #define _ISP_ACQUISITION_REG_ALIGN 4 /* assuming 32 bit control bus width */
22 /* --------------------------------------------------*/
26 /* --------------------------------------------------*/
28 /* --------------------------------------------------*/
32 /* --------------------------------------------------*/
34 /* --------------------------------------------------*/
49 #define ACQ_FSM_STATE_INFO_REG_ID 10
80 /* bit definitions */
88 /* --------------------------------------------------*/
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|
| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/css_2401_system/hrt/ |
| D | mipi_backend_common_defs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
28 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8 24 /* 01 1000 YUV420 8-bit …
29 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10 25 /* 01 1001 YUV420 10-bit …
30 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8L 26 /* 01 1010 YUV420 8-bit lega…
31 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV422_8 30 /* 01 1110 YUV422 8-bit …
32 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV422_10 31 /* 01 1111 YUV422 10-bit …
33 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB444 32 /* 10 0000 RGB444 …
34 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB555 33 /* 10 0001 RGB555 …
35 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB565 34 /* 10 0010 RGB565 …
36 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB666 35 /* 10 0011 RGB666 …
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|
| /kernel/linux/linux-4.19/drivers/net/ethernet/marvell/ |
| D | skge.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
137 /* B0_CTST 16 bit Control/Status register */
139 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
140 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
141 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
142 CS_VAUX_AVAIL = 1<<10,/* VAUX available (YUKON only) */
144 CS_BUS_SLOT_SZ = 1<<8, /* Slot Size 0/1 = 32/64 bit slot */
148 CS_STOP_MAST = 1<<4, /* Command Bit to stop the master */
154 /* B0_LED 8 Bit LED register */
155 /* Bit 7.. 2: reserved */
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|
| /kernel/linux/linux-5.10/drivers/net/ethernet/marvell/ |
| D | skge.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
131 /* B0_CTST 16 bit Control/Status register */
133 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
134 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
136 CS_VAUX_AVAIL = 1<<10,/* VAUX available (YUKON only) */
138 CS_BUS_SLOT_SZ = 1<<8, /* Slot Size 0/1 = 32/64 bit slot */
142 CS_STOP_MAST = 1<<4, /* Command Bit to stop the master */
148 /* B0_LED 8 Bit LED register */
149 /* Bit 7.. 2: reserved */
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|
| /kernel/linux/linux-5.10/drivers/gpu/drm/meson/ |
| D | meson_dw_hdmi.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 * Bit 15-10: RW Reserved. Default 1 starting from G12A
13 * Bit 9 RW sw_reset_i2c starting from G12A
14 * Bit 8 RW sw_reset_axiarb starting from G12A
15 * Bit 7 RW Reserved. Default 1, sw_reset_emp starting from G12A
16 * Bit 6 RW Reserved. Default 1, sw_reset_flt starting from G12A
17 * Bit 5 RW Reserved. Default 1, sw_reset_hdcp22 starting from G12A
18 * Bit 4 RW sw_reset_phyif: PHY interface. 1=Apply reset; 0=Release from reset.
20 * Bit 3 RW sw_reset_intr: interrupt module. 1=Apply reset;
23 * Bit 2 RW sw_reset_mem: KSV/REVOC mem. 1=Apply reset; 0=Release from reset.
[all …]
|
| /kernel/linux/linux-5.10/sound/firewire/oxfw/ |
| D | oxfw-command.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * oxfw_command.c - a part of driver for OXFW970/971 based devices
16 buf = kmalloc(len + 10, GFP_KERNEL); in avc_stream_set_format()
18 return -ENOMEM; in avc_stream_set_format()
30 memcpy(buf + 10, format, len); in avc_stream_set_format()
32 /* do transaction and check buf[1-8] are the same against command */ in avc_stream_set_format()
33 err = fcp_avc_transaction(unit, buf, len + 10, buf, len + 10, in avc_stream_set_format()
34 BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | in avc_stream_set_format()
35 BIT(6) | BIT(7) | BIT(8)); in avc_stream_set_format()
38 else if (err < len + 10) in avc_stream_set_format()
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|
| /kernel/linux/linux-5.10/drivers/phy/samsung/ |
| D | phy-exynos4x12-usb2.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 4x12 support
13 #include "phy-samsung-usb2.h"
20 #define EXYNOS_4x12_UPHYPWR_PHY0_SUSPEND BIT(0)
21 #define EXYNOS_4x12_UPHYPWR_PHY0_PWR BIT(3)
22 #define EXYNOS_4x12_UPHYPWR_PHY0_OTG_PWR BIT(4)
23 #define EXYNOS_4x12_UPHYPWR_PHY0_SLEEP BIT(5)
30 #define EXYNOS_4x12_UPHYPWR_PHY1_SUSPEND BIT(6)
31 #define EXYNOS_4x12_UPHYPWR_PHY1_PWR BIT(7)
32 #define EXYNOS_4x12_UPHYPWR_PHY1_SLEEP BIT(8)
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| /kernel/linux/linux-4.19/drivers/phy/samsung/ |
| D | phy-exynos4x12-usb2.c | 2 * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 4x12 support
16 #include "phy-samsung-usb2.h"
23 #define EXYNOS_4x12_UPHYPWR_PHY0_SUSPEND BIT(0)
24 #define EXYNOS_4x12_UPHYPWR_PHY0_PWR BIT(3)
25 #define EXYNOS_4x12_UPHYPWR_PHY0_OTG_PWR BIT(4)
26 #define EXYNOS_4x12_UPHYPWR_PHY0_SLEEP BIT(5)
33 #define EXYNOS_4x12_UPHYPWR_PHY1_SUSPEND BIT(6)
34 #define EXYNOS_4x12_UPHYPWR_PHY1_PWR BIT(7)
35 #define EXYNOS_4x12_UPHYPWR_PHY1_SLEEP BIT(8)
41 #define EXYNOS_4x12_UPHYPWR_HSIC0_SUSPEND BIT(9)
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| /kernel/linux/linux-4.19/sound/firewire/oxfw/ |
| D | oxfw-command.c | 2 * oxfw_command.c - a part of driver for OXFW970/971 based devices
17 buf = kmalloc(len + 10, GFP_KERNEL); in avc_stream_set_format()
19 return -ENOMEM; in avc_stream_set_format()
31 memcpy(buf + 10, format, len); in avc_stream_set_format()
33 /* do transaction and check buf[1-8] are the same against command */ in avc_stream_set_format()
34 err = fcp_avc_transaction(unit, buf, len + 10, buf, len + 10, in avc_stream_set_format()
35 BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | in avc_stream_set_format()
36 BIT(6) | BIT(7) | BIT(8)); in avc_stream_set_format()
39 else if (err < len + 10) in avc_stream_set_format()
40 err = -EIO; in avc_stream_set_format()
[all …]
|
| /kernel/liteos_m/targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Include/ |
| D | gd32vf103_gpio.h | 5 \version 2019-06-5, V1.0.0, firmware for GD32VF103
59 #define GPIO_BOP(gpiox) REG32((gpiox) + 0x10U) /*!< GPIO port bit operation register …
60 #define GPIO_BC(gpiox) REG32((gpiox) + 0x14U) /*!< GPIO bit clear register */
79 #define GPIO_CTL0_CTL2 BITS(10, 11) /*!< pin 2 configuration bits */
96 #define GPIO_CTL1_MD10 BITS(8, 9) /*!< port 10 mode bits */
97 #define GPIO_CTL1_CTL10 BITS(10, 11) /*!< pin 10 configuration bits */
110 #define GPIO_ISTAT_ISTAT0 BIT(0) /*!< pin 0 input status */
111 #define GPIO_ISTAT_ISTAT1 BIT(1) /*!< pin 1 input status */
112 #define GPIO_ISTAT_ISTAT2 BIT(2) /*!< pin 2 input status */
113 #define GPIO_ISTAT_ISTAT3 BIT(3) /*!< pin 3 input status */
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| /kernel/linux/linux-4.19/Documentation/EDID/ |
| D | edid.S | 18 Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
48 ((((v1-'@')&0x1f)<<10)+(((v2-'@')&0x1f)<<5)+((v3-'@')&0x1f))
72 /* Year of manufacture, less 1990. (1990-2245)
74 year: .byte YEAR-1990
79 /* If Bit 7=1 Digital input. If set, the following bit definitions apply:
80 Bits 6-1 Reserved, must be 0
81 Bit 0 Signal is compatible with VESA DFP 1.x TMDS CRGB,
83 If Bit 7=0 Analog input. If clear, the following bit definitions apply:
84 Bits 6-5 Video white and sync levels, relative to blank
85 00=+0.7/-0.3 V; 01=+0.714/-0.286 V;
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| /kernel/linux/linux-5.10/tools/edid/ |
| D | edid.S | 18 Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
48 ((((v1-'@')&0x1f)<<10)+(((v2-'@')&0x1f)<<5)+((v3-'@')&0x1f))
74 /* Year of manufacture, less 1990. (1990-2245)
76 year: .byte YEAR-1990
81 /* If Bit 7=1 Digital input. If set, the following bit definitions apply:
82 Bits 6-1 Reserved, must be 0
83 Bit 0 Signal is compatible with VESA DFP 1.x TMDS CRGB,
85 If Bit 7=0 Analog input. If clear, the following bit definitions apply:
86 Bits 6-5 Video white and sync levels, relative to blank
87 00=+0.7/-0.3 V; 01=+0.714/-0.286 V;
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| /kernel/linux/linux-5.10/arch/mips/include/asm/mach-ath79/ |
| D | ar71xx_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
6 * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
171 #define QCA956X_MAC_CFG1_SOFT_RST BIT(31)
172 #define QCA956X_MAC_CFG1_RX_RST BIT(19)
173 #define QCA956X_MAC_CFG1_TX_RST BIT(18)
174 #define QCA956X_MAC_CFG1_LOOPBACK BIT(8)
175 #define QCA956X_MAC_CFG1_RX_EN BIT(2)
176 #define QCA956X_MAC_CFG1_TX_EN BIT(0)
179 #define QCA956X_MAC_CFG2_IF_1000 BIT(9)
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|