Searched +full:2 +full:- +full:bit (Results 1 – 25 of 1146) sorted by relevance
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| /kernel/linux/linux-4.19/drivers/staging/rtlwifi/halmac/ |
| D | halmac_bit2.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
17 /*-------------------------Modification Log-----------------------------------
19 *-------------------------Modification Log-----------------------------------
22 /*--------------------------Include File--------------------------------------*/
23 /*--------------------------Include File--------------------------------------*/
27 * 1. For all bit define, it should be prefixed by "BIT_"
28 * 2. For all bit mask, it should be prefixed by "BIT_MASK_"
29 * 3. For all bit shift, it should be prefixed by "BIT_SHIFT_"
52 #define BIT_R_IO_TIMEOUT_FLAG_V1 BIT(9)
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| /kernel/linux/linux-5.10/drivers/net/ethernet/freescale/dpaa2/ |
| D | dpkg.h | 1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2015 Freescale Semiconductor Inc.
25 * enum dpkg_extract_from_hdr_type - Selecting extraction by header types
33 DPKG_FULL_FIELD = 2
37 * enum dpkg_extract_type - Enumeration for selecting extraction type
40 * @DPKG_EXTRACT_FROM_PARSE: Extract from parser-result;
51 * struct dpkg_mask - A structure for defining a single extraction mask
63 #define NH_FLD_ETH_DA BIT(0)
64 #define NH_FLD_ETH_SA BIT(1)
65 #define NH_FLD_ETH_LENGTH BIT(2)
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| /kernel/linux/linux-4.19/drivers/staging/fsl-dpaa2/ethernet/ |
| D | dpkg.h | 1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2015 Freescale Semiconductor Inc.
25 * enum dpkg_extract_from_hdr_type - Selecting extraction by header types
33 DPKG_FULL_FIELD = 2
37 * enum dpkg_extract_type - Enumeration for selecting extraction type
40 * @DPKG_EXTRACT_FROM_PARSE: Extract from parser-result;
51 * struct dpkg_mask - A structure for defining a single extraction mask
63 #define NH_FLD_ETH_DA BIT(0)
64 #define NH_FLD_ETH_SA BIT(1)
65 #define NH_FLD_ETH_LENGTH BIT(2)
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| /kernel/linux/linux-5.10/drivers/net/dsa/microchip/ |
| D | ksz9477_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2017-2018 Microchip Technology Inc.
14 /* 0 - Operation */
44 #define PME_ENABLE BIT(1)
45 #define PME_POLARITY BIT(0)
49 #define SW_GIGABIT_ABLE BIT(6)
50 #define SW_REDUNDANCY_ABLE BIT(5)
51 #define SW_AVB_ABLE BIT(4)
69 #define SW_QW_ABLE BIT(5)
75 #define LUE_INT BIT(31)
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| D | ksz8795_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
15 #define KS_PRIO_S 2
34 #define SW_NEW_BACKOFF BIT(7)
35 #define SW_GLOBAL_RESET BIT(6)
36 #define SW_FLUSH_DYN_MAC_TABLE BIT(5)
37 #define SW_FLUSH_STA_MAC_TABLE BIT(4)
38 #define SW_LINK_AUTO_AGING BIT(0)
42 #define SW_HUGE_PACKET BIT(6)
43 #define SW_TX_FLOW_CTRL_DISABLE BIT(5)
44 #define SW_RX_FLOW_CTRL_DISABLE BIT(4)
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| /kernel/linux/linux-4.19/drivers/net/dsa/microchip/ |
| D | ksz_9477_reg.h | 25 /* 0 - Operation */
55 #define PME_ENABLE BIT(1)
56 #define PME_POLARITY BIT(0)
60 #define SW_GIGABIT_ABLE BIT(6)
61 #define SW_REDUNDANCY_ABLE BIT(5)
62 #define SW_AVB_ABLE BIT(4)
80 #define SW_QW_ABLE BIT(5)
86 #define LUE_INT BIT(31)
87 #define TRIG_TS_INT BIT(30)
88 #define APB_TIMEOUT_INT BIT(29)
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| /kernel/linux/linux-5.10/include/linux/mfd/abx500/ |
| D | ab8500-sysctrl.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) ST-Ericsson SA 2010
83 #define AB8500_TURNONSTATUS_PORNVBAT BIT(0)
84 #define AB8500_TURNONSTATUS_PONKEY1DBF BIT(1)
85 #define AB8500_TURNONSTATUS_PONKEY2DBF BIT(2)
86 #define AB8500_TURNONSTATUS_RTCALARM BIT(3)
87 #define AB8500_TURNONSTATUS_MAINCHDET BIT(4)
88 #define AB8500_TURNONSTATUS_VBUSDET BIT(5)
89 #define AB8500_TURNONSTATUS_USBIDDETECT BIT(6)
91 #define AB8500_RESETSTATUS_RESETN4500NSTATUS BIT(0)
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| /kernel/linux/linux-5.10/drivers/staging/rtl8188eu/include/ |
| D | rtl8188e_spec.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
13 #define HAL_92C_NAV_UPPER_UNIT 128 /* micro-second */
56 * Multi-Function GPIO Pin Control.
59 * Multi-Function GPIO Select.
63 * Multi-Function control source.
117 #define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL + 2)
119 #define REG_RXPKTBUF_CTRL (REG_PKTBUF_DBG_CTRL + 2)
175 /* RTL8723 series ------------------------------ */
230 #define REG_TX_RPT_TIME 0x04F0 /* 2 byte */
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| /kernel/linux/linux-4.19/drivers/staging/rtl8188eu/include/ |
| D | rtl8188e_spec.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
13 #define HAL_92C_NAV_UPPER_UNIT 128 /* micro-second */
57 * Multi-Function GPIO Pin Control.
60 * Multi-Function GPIO Select.
64 * Multi-Function control source.
118 #define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL + 2)
120 #define REG_RXPKTBUF_CTRL (REG_PKTBUF_DBG_CTRL + 2)
176 /* RTL8723 series ------------------------------ */
231 #define REG_TX_RPT_TIME 0x04F0 /* 2 byte */
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| /kernel/linux/linux-5.10/include/linux/mfd/ |
| D | lp87565.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
97 #define LP87565_BUCK_CTRL_1_EN BIT(7)
98 #define LP87565_BUCK_CTRL_1_EN_PIN_CTRL BIT(6)
101 #define LP87565_BUCK_CTRL_1_ROOF_FLOOR_EN BIT(3)
102 #define LP87565_BUCK_CTRL_1_RDIS_EN BIT(2)
103 #define LP87565_BUCK_CTRL_1_FPWM BIT(1)
105 #define LP87565_BUCK_CTRL_1_FPWM_MP_0_2 BIT(0)
119 #define LP87565_RESET_SW_RESET BIT(0)
121 #define LP87565_CONFIG_DOUBLE_DELAY BIT(7)
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| D | lp873x.h | 4 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
8 * published by the Free Software Foundation version 2.
76 #define LP873X_BUCK0_CTRL_1_BUCK0_FPWM BIT(3)
77 #define LP873X_BUCK0_CTRL_1_BUCK0_RDIS_EN BIT(2)
78 #define LP873X_BUCK0_CTRL_1_BUCK0_EN_PIN_CTRL BIT(1)
79 #define LP873X_BUCK0_CTRL_1_BUCK0_EN BIT(0)
84 #define LP873X_BUCK1_CTRL_1_BUCK1_FPWM BIT(3)
85 #define LP873X_BUCK1_CTRL_1_BUCK1_RDIS_EN BIT(2)
86 #define LP873X_BUCK1_CTRL_1_BUCK1_EN_PIN_CTRL BIT(1)
87 #define LP873X_BUCK1_CTRL_1_BUCK1_EN BIT(0)
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| /kernel/linux/linux-5.10/drivers/staging/comedi/drivers/ |
| D | ni_tio_internal.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
6 * COMEDI - Linux Control and Measurement Device Interface
17 #define GI_ARM BIT(0)
18 #define GI_SAVE_TRACE BIT(1)
19 #define GI_LOAD BIT(2)
20 #define GI_DISARM BIT(4)
23 #define GI_WRITE_SWITCH BIT(7)
24 #define GI_SYNC_GATE BIT(8)
25 #define GI_LITTLE_BIG_ENDIAN BIT(9)
26 #define GI_BANK_SWITCH_START BIT(10)
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| D | ni_stc.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Register descriptions for NI DAQ-STC chip
5 * COMEDI - Linux Control and Measurement Device Interface
6 * Copyright (C) 1998-9 David A. Schleef <ds@schleef.org>
11 * DAQ-STC Technical Reference Manual
21 * Registers in the National Instruments DAQ-STC chip
24 #define NISTC_INTA_ACK_REG 2
25 #define NISTC_INTA_ACK_G0_GATE BIT(15)
26 #define NISTC_INTA_ACK_G0_TC BIT(14)
27 #define NISTC_INTA_ACK_AI_ERR BIT(13)
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| /kernel/linux/linux-4.19/drivers/staging/comedi/drivers/ |
| D | ni_tio_internal.h | 1 // SPDX-License-Identifier: GPL-2.0+
6 * COMEDI - Linux Control and Measurement Device Interface
17 #define GI_ARM BIT(0)
18 #define GI_SAVE_TRACE BIT(1)
19 #define GI_LOAD BIT(2)
20 #define GI_DISARM BIT(4)
23 #define GI_WRITE_SWITCH BIT(7)
24 #define GI_SYNC_GATE BIT(8)
25 #define GI_LITTLE_BIG_ENDIAN BIT(9)
26 #define GI_BANK_SWITCH_START BIT(10)
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| /kernel/linux/linux-4.19/include/linux/mfd/ |
| D | lp873x.h | 4 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
8 * published by the Free Software Foundation version 2.
76 #define LP873X_BUCK0_CTRL_1_BUCK0_FPWM BIT(3)
77 #define LP873X_BUCK0_CTRL_1_BUCK0_RDIS_EN BIT(2)
78 #define LP873X_BUCK0_CTRL_1_BUCK0_EN_PIN_CTRL BIT(1)
79 #define LP873X_BUCK0_CTRL_1_BUCK0_EN BIT(0)
84 #define LP873X_BUCK1_CTRL_1_BUCK1_FPWM BIT(3)
85 #define LP873X_BUCK1_CTRL_1_BUCK1_RDIS_EN BIT(2)
86 #define LP873X_BUCK1_CTRL_1_BUCK1_EN_PIN_CTRL BIT(1)
87 #define LP873X_BUCK1_CTRL_1_BUCK1_EN BIT(0)
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| D | lp87565.h | 4 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
8 * published by the Free Software Foundation version 2.
98 #define LP87565_BUCK_CTRL_1_EN BIT(7)
99 #define LP87565_BUCK_CTRL_1_EN_PIN_CTRL BIT(6)
102 #define LP87565_BUCK_CTRL_1_ROOF_FLOOR_EN BIT(3)
103 #define LP87565_BUCK_CTRL_1_RDIS_EN BIT(2)
104 #define LP87565_BUCK_CTRL_1_FPWM BIT(1)
106 #define LP87565_BUCK_CTRL_1_FPWM_MP_0_2 BIT(0)
120 #define LP87565_RESET_SW_RESET BIT(0)
122 #define LP87565_CONFIG_DOUBLE_DELAY BIT(7)
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| /kernel/linux/linux-5.10/drivers/media/i2c/ |
| D | tda1997x_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 /* Page 0x00 - General Control */
125 #define DETECT_UTIL BIT(7) /* utility of HDMI level */
126 #define DETECT_HPD BIT(6) /* HPD of HDMI level */
127 #define DETECT_5V_SEL BIT(2) /* 5V present on selected input */
128 #define DETECT_5V_B BIT(1) /* 5V present on input B */
129 #define DETECT_5V_A BIT(0) /* 5V present on input A */
132 #define INPUT_SEL_RST_FMT BIT(7) /* 1=reset format measurement */
133 #define INPUT_SEL_RST_VDP BIT(2) /* 1=reset video data path */
134 #define INPUT_SEL_OUT_MODE BIT(1) /* 0=loop 1=bypass */
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| /kernel/linux/linux-4.19/drivers/media/i2c/ |
| D | tda1997x_regs.h | 1 // SPDX-License-Identifier: GPL-2.0
6 /* Page 0x00 - General Control */
125 #define DETECT_UTIL BIT(7) /* utility of HDMI level */
126 #define DETECT_HPD BIT(6) /* HPD of HDMI level */
127 #define DETECT_5V_SEL BIT(2) /* 5V present on selected input */
128 #define DETECT_5V_B BIT(1) /* 5V present on input B */
129 #define DETECT_5V_A BIT(0) /* 5V present on input A */
132 #define INPUT_SEL_RST_FMT BIT(7) /* 1=reset format measurement */
133 #define INPUT_SEL_RST_VDP BIT(2) /* 1=reset video data path */
134 #define INPUT_SEL_OUT_MODE BIT(1) /* 0=loop 1=bypass */
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| /kernel/linux/linux-4.19/drivers/net/wireless/ath/wil6210/ |
| D | txrx_edma.h | 2 * Copyright (c) 2012-2016,2018, The Linux Foundation. All rights reserved.
43 #define WIL_RX_EDMA_ERROR_KEY (2) /* Key missing */
48 #define WIL_RX_EDMA_ERROR_L3_ERR (BIT(0) | BIT(1))
49 #define WIL_RX_EDMA_ERROR_L4_ERR (BIT(0) | BIT(1))
51 #define WIL_RX_EDMA_DLPF_LU_MISS_BIT BIT(11)
55 #define WIL_RX_EDMA_DLPF_LU_MISS_CID_POS 2
60 #define WIL_RX_EDMA_MID_VALID_BIT BIT(22)
69 #define WIL_EDMA_DESC_TX_CFG_TSO_DESC_TYPE_LEN 2
86 /* Enhanced Rx descriptor - MAC part
89 * [dword 2] : Reserved
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| D | txrx.h | 2 * Copyright (c) 2012-2016 Qualcomm Atheros, Inc.
37 return le32_to_cpu(addr->addr_low) | in wil_desc_addr()
38 ((u64)le16_to_cpu(addr->addr_high) << 32); in wil_desc_addr()
44 addr->addr_low = cpu_to_le32(lower_32_bits(pa)); in wil_desc_addr_set()
45 addr->addr_high = cpu_to_le16((u16)upper_32_bits(pa)); in wil_desc_addr_set()
48 /* Tx descriptor - MAC part
50 * bit 0.. 9 : lifetime_expiry_value:10
51 * bit 10 : interrupt_en:1
52 * bit 11 : status_en:1
53 * bit 12..13 : txss_override:2
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| /kernel/linux/linux-5.10/drivers/net/wireless/ath/wil6210/ |
| D | txrx.h | 1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2012-2016 Qualcomm Atheros, Inc.
4 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
26 return le32_to_cpu(addr->addr_low) | in wil_desc_addr()
27 ((u64)le16_to_cpu(addr->addr_high) << 32); in wil_desc_addr()
33 addr->addr_low = cpu_to_le32(lower_32_bits(pa)); in wil_desc_addr_set()
34 addr->addr_high = cpu_to_le16((u16)upper_32_bits(pa)); in wil_desc_addr_set()
37 /* Tx descriptor - MAC part
39 * bit 0.. 9 : lifetime_expiry_value:10
40 * bit 10 : interrupt_en:1
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| D | txrx_edma.h | 1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2012-2016,2018-2019, The Linux Foundation. All rights reserved.
32 #define WIL_RX_EDMA_ERROR_KEY (2) /* Key missing */
37 #define WIL_RX_EDMA_ERROR_L3_ERR (BIT(0) | BIT(1))
38 #define WIL_RX_EDMA_ERROR_L4_ERR (BIT(0) | BIT(1))
40 #define WIL_RX_EDMA_DLPF_LU_MISS_BIT BIT(11)
44 #define WIL_RX_EDMA_DLPF_LU_MISS_CID_POS 2
49 #define WIL_RX_EDMA_MID_VALID_BIT BIT(20)
58 #define WIL_EDMA_DESC_TX_CFG_TSO_DESC_TYPE_LEN 2
75 /* Enhanced Rx descriptor - MAC part
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| /kernel/linux/linux-5.10/drivers/clk/sunxi-ng/ |
| D | ccu-sun50i-a64.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
24 #include "ccu-sun50i-a64.h"
27 .enable = BIT(31),
28 .lock = BIT(28),
30 .k = _SUNXI_CCU_MULT(4, 2),
31 .m = _SUNXI_CCU_DIV(0, 2),
32 .p = _SUNXI_CCU_DIV_MAX(16, 2, 4),
35 .hw.init = CLK_HW_INIT("pll-cpux",
44 * the base (2x, 4x and 8x), and one variable divider (the one true
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| /kernel/linux/linux-4.19/drivers/clk/sunxi-ng/ |
| D | ccu-sun50i-a64.c | 5 * License version 2, as published by the Free Software Foundation, and
14 #include <linux/clk-provider.h>
31 #include "ccu-sun50i-a64.h"
34 .enable = BIT(31),
35 .lock = BIT(28),
37 .k = _SUNXI_CCU_MULT(4, 2),
38 .m = _SUNXI_CCU_DIV(0, 2),
39 .p = _SUNXI_CCU_DIV_MAX(16, 2, 4),
42 .hw.init = CLK_HW_INIT("pll-cpux",
51 * the base (2x, 4x and 8x), and one variable divider (the one true
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| /kernel/linux/linux-5.10/drivers/staging/vt6656/ |
| D | mac.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
15 * 07-01-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.
16 * 08-25-2003 Kyle Hsu: Porting MAC functions from sim53.
17 * 09-03-2003 Bryan YC Fan: Add MACvDisableProtectMD & MACvEnableProtectMD
146 #define I2MCFG_BOUNDCTL BIT(7)
147 #define I2MCFG_WAITCTL BIT(5)
148 #define I2MCFG_SCLOECTL BIT(4)
149 #define I2MCFG_WBUSYCTL BIT(3)
150 #define I2MCFG_NORETRY BIT(2)
151 #define I2MCFG_I2MLDSEQ BIT(1)
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