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/kernel/linux/linux-4.19/arch/sparc/include/asm/
Dpcic.h1 /* SPDX-License-Identifier: GPL-2.0 */
50 #define PCI_DIAGNOSTIC_0 0x40 /* 32 bits */
51 #define PCI_SIZE_0 0x44 /* 32 bits */
52 #define PCI_SIZE_1 0x48 /* 32 bits */
53 #define PCI_SIZE_2 0x4c /* 32 bits */
54 #define PCI_SIZE_3 0x50 /* 32 bits */
55 #define PCI_SIZE_4 0x54 /* 32 bits */
56 #define PCI_SIZE_5 0x58 /* 32 bits */
57 #define PCI_PIO_CONTROL 0x60 /* 8 bits */
58 #define PCI_DVMA_CONTROL 0x62 /* 8 bits */
[all …]
/kernel/linux/linux-5.10/arch/sparc/include/asm/
Dpcic.h1 /* SPDX-License-Identifier: GPL-2.0 */
50 #define PCI_DIAGNOSTIC_0 0x40 /* 32 bits */
51 #define PCI_SIZE_0 0x44 /* 32 bits */
52 #define PCI_SIZE_1 0x48 /* 32 bits */
53 #define PCI_SIZE_2 0x4c /* 32 bits */
54 #define PCI_SIZE_3 0x50 /* 32 bits */
55 #define PCI_SIZE_4 0x54 /* 32 bits */
56 #define PCI_SIZE_5 0x58 /* 32 bits */
57 #define PCI_PIO_CONTROL 0x60 /* 8 bits */
58 #define PCI_DVMA_CONTROL 0x62 /* 8 bits */
[all …]
/kernel/linux/linux-4.19/Documentation/filesystems/ext4/ondisk/
Dgroup_descr.rst1 .. SPDX-License-Identifier: GPL-2.0
4 -----------------------
30 block group descriptor was only 32 bytes long and therefore ends at
38 checksum is the lower 16 bits of the checksum of the FS UUID, the group
45 .. list-table::
47 :header-rows: 1
49 * - Offset
50 - Size
51 - Name
52 - Description
[all …]
/kernel/linux/linux-4.19/fs/hfs/
Dbitmap.c4 * Copyright (C) 1996-1997 Paul H. Hargrove
11 * search/set/clear bits.
20 * Given a block of memory, its length in bits, and a starting bit number,
21 * determine the number of the first zero bits (in left-to-right ordering)
24 * Returns >= 'size' if no zero bits are found in the range.
26 * Accesses memory in 32-bit aligned chunks of 32-bits and thus
40 curr = bitmap + (offset / 32); in hfs_find_set_zero_bits()
41 end = bitmap + ((size + 31) / 32); in hfs_find_set_zero_bits()
43 /* scan the first partial u32 for zero bits */ in hfs_find_set_zero_bits()
47 i = offset % 32; in hfs_find_set_zero_bits()
[all …]
/kernel/linux/linux-5.10/fs/hfs/
Dbitmap.c4 * Copyright (C) 1996-1997 Paul H. Hargrove
11 * search/set/clear bits.
20 * Given a block of memory, its length in bits, and a starting bit number,
21 * determine the number of the first zero bits (in left-to-right ordering)
24 * Returns >= 'size' if no zero bits are found in the range.
26 * Accesses memory in 32-bit aligned chunks of 32-bits and thus
40 curr = bitmap + (offset / 32); in hfs_find_set_zero_bits()
41 end = bitmap + ((size + 31) / 32); in hfs_find_set_zero_bits()
43 /* scan the first partial u32 for zero bits */ in hfs_find_set_zero_bits()
47 i = offset % 32; in hfs_find_set_zero_bits()
[all …]
/kernel/linux/linux-4.19/drivers/net/ethernet/neterion/vxge/
Dvxge-reg.h10 * vxge-reg.h: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O Virtualized
12 * Copyright(c) 2002-2010 Exar Corp.
18 * vxge_mBIT(loc) - set bit at offset
23 * vxge_vBIT(val, loc, sz) - set bits at offset
25 #define vxge_vBIT(val, loc, sz) (((u64)(val)) << (64-(loc)-(sz)))
26 #define vxge_vBIT32(val, loc, sz) (((u32)(val)) << (32-(loc)-(sz)))
29 * vxge_bVALn(bits, loc, n) - Get the value of n bits at location
31 #define vxge_bVALn(bits, loc, n) \ argument
32 ((((u64)bits) >> (64-(loc+n))) & ((0x1ULL << n) - 1))
34 #define VXGE_HW_TITAN_ASIC_ID_GET_INITIAL_DEVICE_ID(bits) \ argument
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/neterion/vxge/
Dvxge-reg.h10 * vxge-reg.h: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O Virtualized
12 * Copyright(c) 2002-2010 Exar Corp.
18 * vxge_mBIT(loc) - set bit at offset
23 * vxge_vBIT(val, loc, sz) - set bits at offset
25 #define vxge_vBIT(val, loc, sz) (((u64)(val)) << (64-(loc)-(sz)))
26 #define vxge_vBIT32(val, loc, sz) (((u32)(val)) << (32-(loc)-(sz)))
29 * vxge_bVALn(bits, loc, n) - Get the value of n bits at location
31 #define vxge_bVALn(bits, loc, n) \ argument
32 ((((u64)bits) >> (64-(loc+n))) & ((0x1ULL << n) - 1))
34 #define VXGE_HW_TITAN_ASIC_ID_GET_INITIAL_DEVICE_ID(bits) \ argument
[all …]
/kernel/linux/linux-5.10/Documentation/filesystems/ext4/
Dgroup_descr.rst1 .. SPDX-License-Identifier: GPL-2.0
4 -----------------------
30 block group descriptor was only 32 bytes long and therefore ends at
38 checksum is the lower 16 bits of the checksum of the FS UUID, the group
45 .. list-table::
47 :header-rows: 1
49 * - Offset
50 - Size
51 - Name
52 - Description
[all …]
/kernel/linux/linux-5.10/Documentation/staging/
Dcrc32.rst5 A CRC is a long-division remainder. You add the CRC to the message,
11 protocols put the end-of-frame flag after the CRC.
15 - We're working in binary, so the digits are only 0 and 1, and
16 - When dividing polynomials, there are no carries. Rather than add and
21 To produce a 32-bit CRC, the divisor is actually a 33-bit CRC polynomial.
22 Since it's 33 bits long, bit 32 is always going to be set, so usually the
24 familiar with the IEEE 754 floating-point format, it's the same idea.)
26 Note that a CRC is computed over a string of *bits*, so you have
27 to decide on the endianness of the bits within each byte. To get
28 the best error-detecting properties, this should correspond to the
[all …]
/kernel/linux/linux-4.19/Documentation/
Dcrc32.txt5 A CRC is a long-division remainder. You add the CRC to the message,
11 protocols put the end-of-frame flag after the CRC.
15 - We're working in binary, so the digits are only 0 and 1, and
16 - When dividing polynomials, there are no carries. Rather than add and
21 To produce a 32-bit CRC, the divisor is actually a 33-bit CRC polynomial.
22 Since it's 33 bits long, bit 32 is always going to be set, so usually the
24 familiar with the IEEE 754 floating-point format, it's the same idea.)
26 Note that a CRC is computed over a string of *bits*, so you have
27 to decide on the endianness of the bits within each byte. To get
28 the best error-detecting properties, this should correspond to the
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/allwinner/
Dsun50i-h5-cpu-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
5 cpu_opp_table: cpu-opp-table {
6 compatible = "operating-points-v2";
7 opp-shared;
9 opp-408000000 {
10 opp-hz = /bits/ 64 <408000000>;
11 opp-microvolt = <1000000 1000000 1310000>;
12 clock-latency-ns = <244144>; /* 8 32k periods */
15 opp-648000000 {
[all …]
Dsun50i-a64-cpu-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 compatible = "operating-points-v2";
9 opp-shared;
11 opp-648000000 {
12 opp-hz = /bits/ 64 <648000000>;
13 opp-microvolt = <1040000>;
14 clock-latency-ns = <244144>; /* 8 32k periods */
17 opp-816000000 {
18 opp-hz = /bits/ 64 <816000000>;
19 opp-microvolt = <1100000>;
[all …]
Dsun50i-h6-cpu-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 cpu_opp_table: cpu-opp-table {
7 compatible = "allwinner,sun50i-h6-operating-points";
8 nvmem-cells = <&cpu_speed_grade>;
9 opp-shared;
12 clock-latency-ns = <244144>; /* 8 32k periods */
13 opp-hz = /bits/ 64 <480000000>;
15 opp-microvolt-speed0 = <880000 880000 1200000>;
16 opp-microvolt-speed1 = <820000 820000 1200000>;
17 opp-microvolt-speed2 = <820000 820000 1200000>;
[all …]
/kernel/linux/linux-5.10/drivers/clocksource/
Dtimer-stm32.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Inspired by time-efm32.c from Uwe Kleine-Koenig
23 #include "timer-of.h"
50 int bits; member
54 * stm32_timer_of_bits_set - set accessor helper
56 * @bits: the number of bits (16 or 32)
58 * Accessor helper to set the number of bits in the timer-of private
62 static void stm32_timer_of_bits_set(struct timer_of *to, int bits) in stm32_timer_of_bits_set() argument
64 struct stm32_timer_private *pd = to->private_data; in stm32_timer_of_bits_set()
66 pd->bits = bits; in stm32_timer_of_bits_set()
[all …]
/kernel/linux/linux-4.19/drivers/clocksource/
Dtimer-stm32.c6 * Inspired by time-efm32.c from Uwe Kleine-Koenig
23 #include "timer-of.h"
50 int bits; member
54 * stm32_timer_of_bits_set - set accessor helper
56 * @bits: the number of bits (16 or 32)
58 * Accessor helper to set the number of bits in the timer-of private
62 static void stm32_timer_of_bits_set(struct timer_of *to, int bits) in stm32_timer_of_bits_set() argument
64 struct stm32_timer_private *pd = to->private_data; in stm32_timer_of_bits_set()
66 pd->bits = bits; in stm32_timer_of_bits_set()
70 * stm32_timer_of_bits_get - get accessor helper
[all …]
/kernel/linux/linux-4.19/arch/parisc/include/asm/
Delf.h1 /* SPDX-License-Identifier: GPL-2.0 */
28 #define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
29 #define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
30 #define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
60 #define R_PARISC_DIR32 1 /* Direct 32-bit reference. */
61 #define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */
62 #define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */
63 #define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */
64 #define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */
65 #define R_PARISC_PCREL32 9 /* 32-bit rel. address. */
[all …]
/kernel/linux/linux-5.10/arch/parisc/include/asm/
Delf.h1 /* SPDX-License-Identifier: GPL-2.0 */
28 #define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
29 #define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
30 #define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
60 #define R_PARISC_DIR32 1 /* Direct 32-bit reference. */
61 #define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */
62 #define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */
63 #define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */
64 #define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */
65 #define R_PARISC_PCREL32 9 /* 32-bit rel. address. */
[all …]
/kernel/linux/linux-5.10/include/linux/
Dhash.h14 #if BITS_PER_LONG == 32
16 #define hash_long(val, bits) hash_32(val, bits) argument
18 #define hash_long(val, bits) hash_64(val, bits) argument
21 #error Wordsize not 32 or 64
26 * high bits. Since multiplication propagates changes to the most
27 * significant end only, it is essential that the high bits of the
31 * http://www.citi.umich.edu/techreports/reports/citi-tr-00-1.pdf
34 * ratio phi = (sqrt(5)-1)/2, or its negative, has particularly nice
37 * These are the negative, (1 - phi) = phi**2 = (3 - sqrt(5))/2,
51 * the arch-optimized versions with the generic.
[all …]
/kernel/linux/linux-5.10/tools/include/linux/
Dhash.h14 #if BITS_PER_LONG == 32
16 #define hash_long(val, bits) hash_32(val, bits) argument
18 #define hash_long(val, bits) hash_64(val, bits) argument
21 #error Wordsize not 32 or 64
26 * high bits. Since multiplication propagates changes to the most
27 * significant end only, it is essential that the high bits of the
31 * http://www.citi.umich.edu/techreports/reports/citi-tr-00-1.pdf
34 * ratio phi = (sqrt(5)-1)/2, or its negative, has particularly nice
37 * These are the negative, (1 - phi) = phi**2 = (3 - sqrt(5))/2,
51 * the arch-optimized versions with the generic.
[all …]
/kernel/linux/linux-4.19/tools/include/linux/
Dhash.h14 #if BITS_PER_LONG == 32
16 #define hash_long(val, bits) hash_32(val, bits) argument
18 #define hash_long(val, bits) hash_64(val, bits) argument
21 #error Wordsize not 32 or 64
26 * high bits. Since multiplication propagates changes to the most
27 * significant end only, it is essential that the high bits of the
31 * http://www.citi.umich.edu/techreports/reports/citi-tr-00-1.pdf
34 * ratio phi = (sqrt(5)-1)/2, or its negative, has particularly nice
37 * These are the negative, (1 - phi) = phi**2 = (3 - sqrt(5))/2,
51 * the arch-optimized versions with the generic.
[all …]
/kernel/linux/linux-4.19/include/linux/
Dhash.h14 #if BITS_PER_LONG == 32
16 #define hash_long(val, bits) hash_32(val, bits) argument
18 #define hash_long(val, bits) hash_64(val, bits) argument
21 #error Wordsize not 32 or 64
26 * high bits. Since multiplication propagates changes to the most
27 * significant end only, it is essential that the high bits of the
31 * http://www.citi.umich.edu/techreports/reports/citi-tr-00-1.pdf
34 * ratio phi = (sqrt(5)-1)/2, or its negative, has particularly nice
37 * These are the negative, (1 - phi) = phi**2 = (3 - sqrt(5))/2,
51 * the arch-optimized versions with the generic.
[all …]
/kernel/linux/linux-4.19/arch/ia64/include/asm/sn/
Dtioca.h9 * Copyright (c) 2003-2005 Silicon Graphics, Inc. All rights reserved.
74 * macro declaration to mask the bit. Fields consisting of multiple bits
75 * have two declarations: one to mask the proper bits in a register, and
94 /* bits 15:14 unused */
98 /* bits 23:20 unused */
101 /* bits 35:32 unused */
108 /* bits 63:52 unused */
117 /* bits 27:26 unused */
122 #define CA_GART_MEM_PARAM (0x3ull << 32)
123 #define CA_GART_MEM_PARAM_SHFT 32
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/amd/amdgpu/
Dpsp_gfx_if.h43 GFX_CTRL_CMD_ID_ENABLE_INT = 0x00050000, /* enable PSP-to-Gfx interrupt */
44 GFX_CTRL_CMD_ID_DISABLE_INT = 0x00060000, /* disable PSP-to-Gfx interrupt */
51 /*-----------------------------------------------------------------------------
58 * SRBM-to-PSP mailbox registers (total 8 registers).
67 … volatile uint32_t ring_addr_lo; /* +20 bits [31:0] of GPU Virtual of ring buffer (VMID=0)*/
68 …volatile uint32_t ring_addr_hi; /* +24 bits [63:32] of GPU Virtual of ring buffer (VMID=0) …
99 …uint32_t app_phy_addr_lo; /* bits [31:0] of the GPU Virtual address of the TA binary…
100 …uint32_t app_phy_addr_hi; /* bits [63:32] of the GPU Virtual address of the TA binar…
102 …uint32_t cmd_buf_phy_addr_lo; /* bits [31:0] of the GPU Virtual address of CMD buffer (m…
103 …uint32_t cmd_buf_phy_addr_hi; /* bits [63:32] of the GPU Virtual address of CMD buffer */
[all …]
/kernel/linux/linux-4.19/arch/mips/cavium-octeon/executive/
Dcvmx-helper-jtag.c8 * Copyright (c) 2003-2008 Cavium Networks
15 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
36 #include <asm/octeon/cvmx-helper-jtag.h>
50 uint32_t divisor = cvmx_sysinfo_get()->cpu_clock_hz / (25 * 1000000); in cvmx_helper_qlm_jtag_init()
51 divisor = (divisor - 1) >> 2; in cvmx_helper_qlm_jtag_init()
74 * Write up to 32bits into the QLM jtag chain. Bits are shifted
76 * order bits followed by the high order bits. The JTAG chain is
77 * 4 * 268 bits long, or 1072.
80 * @bits: Number of bits to shift in (1-32).
[all …]
/kernel/linux/linux-5.10/arch/mips/cavium-octeon/executive/
Dcvmx-helper-jtag.c8 * Copyright (c) 2003-2008 Cavium Networks
15 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
36 #include <asm/octeon/cvmx-helper-jtag.h>
50 uint32_t divisor = cvmx_sysinfo_get()->cpu_clock_hz / (25 * 1000000); in cvmx_helper_qlm_jtag_init()
51 divisor = (divisor - 1) >> 2; in cvmx_helper_qlm_jtag_init()
74 * Write up to 32bits into the QLM jtag chain. Bits are shifted
76 * order bits followed by the high order bits. The JTAG chain is
77 * 4 * 268 bits long, or 1072.
80 * @bits: Number of bits to shift in (1-32).
[all …]

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