| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/hisilicon/ |
| D | hisi-ade.txt | 23 The rate of "clk_ade_core" could be "360000000" or "180000000";
56 assigned-clock-rates = <360000000>, <288000000>;
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/hisilicon/ |
| D | hisi-ade.txt | 23 The rate of "clk_ade_core" could be "360000000" or "180000000";
56 assigned-clock-rates = <360000000>, <288000000>;
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/i2c/ |
| D | ov8856.yaml | 84 Allowed data bus frequencies. 360000000, 180000000 Hz or both
136 link-frequencies = /bits/ 64 <360000000>;
|
| /kernel/linux/linux-5.10/arch/mips/lantiq/ |
| D | clk.h | 35 #define CLOCK_360M 360000000
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| /kernel/linux/linux-4.19/arch/mips/lantiq/ |
| D | clk.h | 37 #define CLOCK_360M 360000000
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| /kernel/linux/linux-4.19/arch/arm/mach-s3c24xx/ |
| D | pll-s3c2440-12000000.c | 43 { .frequency = 360000000, .driver_data = PLLVAL(0x70, 2, 1), }, /* FVco 720.000000 */
|
| /kernel/linux/linux-5.10/arch/arm/mach-s3c/ |
| D | pll-s3c2440-12000000.c | 43 { .frequency = 360000000, .driver_data = PLLVAL(0x70, 2, 1), }, /* FVco 720.000000 */
|
| /kernel/linux/linux-5.10/arch/mips/ralink/ |
| D | rt305x.c | 167 cpu_rate = 360000000; in ralink_clk_init()
|
| /kernel/linux/linux-4.19/arch/mips/ralink/ |
| D | rt305x.c | 164 cpu_rate = 360000000; in ralink_clk_init()
|
| /kernel/linux/linux-5.10/drivers/media/tuners/ |
| D | mxl5005s.c | 2138 Fref = 360000000UL ; in MXL_IFSynthInit()
2191 Fref = 360000000UL ; in MXL_IFSynthInit()
2211 Fref = 360000000UL ; in MXL_IFSynthInit()
2216 Fref = 360000000UL ; in MXL_IFSynthInit()
2226 Fref = 360000000UL ; in MXL_IFSynthInit()
2261 Fref = 360000000UL ; in MXL_IFSynthInit()
2824 if (state->RF_IN >= 280000000 && state->RF_IN < 360000000) { in MXL_TuneRF()
2831 if (state->RF_IN >= 360000000 && state->RF_IN < 560000000) { in MXL_TuneRF()
2892 if (state->RF_IN >= 280000000 && state->RF_IN < 360000000) { in MXL_TuneRF()
2898 if (state->RF_IN >= 360000000 && state->RF_IN < 560000000) { in MXL_TuneRF()
[all …]
|
| /kernel/linux/linux-4.19/drivers/media/tuners/ |
| D | mxl5005s.c | 2138 Fref = 360000000UL ; in MXL_IFSynthInit()
2191 Fref = 360000000UL ; in MXL_IFSynthInit()
2211 Fref = 360000000UL ; in MXL_IFSynthInit()
2216 Fref = 360000000UL ; in MXL_IFSynthInit()
2226 Fref = 360000000UL ; in MXL_IFSynthInit()
2261 Fref = 360000000UL ; in MXL_IFSynthInit()
2824 if (state->RF_IN >= 280000000 && state->RF_IN < 360000000) { in MXL_TuneRF()
2831 if (state->RF_IN >= 360000000 && state->RF_IN < 560000000) { in MXL_TuneRF()
2892 if (state->RF_IN >= 280000000 && state->RF_IN < 360000000) { in MXL_TuneRF()
2898 if (state->RF_IN >= 360000000 && state->RF_IN < 560000000) { in MXL_TuneRF()
[all …]
|
| /kernel/linux/linux-4.19/drivers/clk/hisilicon/ |
| D | clk-hi3620.c | 284 case 360000000: in mmc_clk_recalc_rate()
308 req->best_parent_rate = 360000000; in mmc_clk_determine_rate()
|
| /kernel/linux/linux-5.10/drivers/clk/hisilicon/ |
| D | clk-hi3620.c | 270 case 360000000: in mmc_clk_recalc_rate()
294 req->best_parent_rate = 360000000; in mmc_clk_determine_rate()
|
| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| D | clk-s3c2410.c | 194 PLL_S3C2440_MPLL_RATE(12 * MHZ, 360000000, 0x70, 2, 1),
|
| /kernel/linux/linux-4.19/drivers/clk/samsung/ |
| D | clk-s3c2410.c | 236 PLL_S3C2440_MPLL_RATE(12 * MHZ, 360000000, 0x70, 2, 1),
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/ |
| D | sdm845-db845c.dts | 1146 <360000000 180000000>;
|
| /kernel/linux/linux-5.10/drivers/media/i2c/ |
| D | ov2740.c | 16 #define OV2740_LINK_FREQ_360MHZ 360000000ULL
|
| D | mt9p031.c | 220 .out_clock_max = 360000000, in mt9p031_clk_setup()
|
| /kernel/linux/linux-4.19/arch/arm64/boot/dts/hisilicon/ |
| D | hi6220.dtsi | 913 assigned-clock-rates = <360000000>, <288000000>;
|
| /kernel/linux/linux-4.19/drivers/media/i2c/ |
| D | mt9p031.c | 223 .out_clock_max = 360000000, in mt9p031_clk_setup()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5_cfg.c | 717 .max_clk = 360000000,
|
| /kernel/linux/linux-4.19/drivers/clk/meson/ |
| D | meson8b.c | 35 PLL_RATE(360000000, 60, 1, 2),
|
| D | axg.c | 123 PLL_RATE(360000000, 60, 1, 2),
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/ |
| D | hi6220.dtsi | 931 assigned-clock-rates = <360000000>, <288000000>;
|
| /kernel/linux/linux-5.10/drivers/clk/rockchip/ |
| D | clk-rk3188.c | 86 RK3066_PLL_RATE( 360000000, 1, 60, 4),
|