| /kernel/linux/linux-4.19/drivers/scsi/qla2xxx/ |
| D | qla_devtbl.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
8 "QLA2340", "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x100 */
9 "QLA2342", "133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x101 */
10 "QLA2344", "133MHz PCI-X to 2Gb FC, Quad Channel", /* 0x102 */
11 "QCP2342", "cPCI to 2Gb FC, Dual Channel", /* 0x103 */
12 "QSB2340", "SBUS to 2Gb FC, Single Channel", /* 0x104 */
13 "QSB2342", "SBUS to 2Gb FC, Dual Channel", /* 0x105 */
14 "QLA2310", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x106 */
15 "QLA2332", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x107 */
16 "QCP2332", "Sun cPCI to 2Gb FC, Dual Channel", /* 0x108 */
[all …]
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| /kernel/linux/linux-5.10/drivers/scsi/qla2xxx/ |
| D | qla_devtbl.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
8 "QLA2340", "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x100 */
9 "QLA2342", "133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x101 */
10 "QLA2344", "133MHz PCI-X to 2Gb FC, Quad Channel", /* 0x102 */
11 "QCP2342", "cPCI to 2Gb FC, Dual Channel", /* 0x103 */
12 "QSB2340", "SBUS to 2Gb FC, Single Channel", /* 0x104 */
13 "QSB2342", "SBUS to 2Gb FC, Dual Channel", /* 0x105 */
14 "QLA2310", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x106 */
15 "QLA2332", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x107 */
16 "QCP2332", "Sun cPCI to 2Gb FC, Dual Channel", /* 0x108 */
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| /kernel/liteos_m/targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Source/Drivers/ |
| D | gd32vf103_timer.c | 5 \version 2019-6-5, V1.0.0, firmware for GD32VF103
100 initpara->prescaler = 0U; in timer_struct_para_init()
101 initpara->alignedmode = TIMER_COUNTER_EDGE; in timer_struct_para_init()
102 initpara->counterdirection = TIMER_COUNTER_UP; in timer_struct_para_init()
103 initpara->period = 65535U; in timer_struct_para_init()
104 initpara->clockdivision = TIMER_CKDIV_DIV1; in timer_struct_para_init()
105 initpara->repetitioncounter = 0U; in timer_struct_para_init()
125 TIMER_PSC(timer_periph) = (uint16_t)initpara->prescaler; in timer_init()
131 TIMER_CTL0(timer_periph) |= (uint32_t)(initpara->alignedmode & ALIGNEDMODE_MASK); in timer_init()
132 …TIMER_CTL0(timer_periph) |= (uint32_t)(initpara->counterdirection & COUNTERDIRECTION_MASK); … in timer_init()
[all …]
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| D | gd32vf103_dma.c | 5 \version 2019-6-5, V1.0.0, firmware for GD32VF103
43 \brief deinitialize DMA a channel registers
46 \param[in] channelx: specify which DMA channel is deinitialized
48 \arg DMA0: DMA_CHx(x=0..6), DMA1: DMA_CHx(x=0..4)
58 /* disable DMA a channel */ in dma_deinit()
60 /* reset DMA channel registers */ in dma_deinit()
70 \param[in] init_struct: the initialization data needed to initialize DMA channel
77 init_struct->periph_addr = 0U; in dma_struct_para_init()
78 init_struct->periph_width = 0U; in dma_struct_para_init()
79 init_struct->periph_inc = DMA_PERIPH_INCREASE_DISABLE; in dma_struct_para_init()
[all …]
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| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | tas5086.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * - implement DAPM and input muxing
9 * - implement modulation limit
10 * - implement non-default PWM start
13 * because the registers are of unequal size, and multi-byte registers
18 * it doesn't matter because the entire map can be accessed as 8-bit
21 * routines have to be open-coded.
71 #define TAS5086_CHANNEL_VOL(X) (0x08 + (X)) /* Channel 1-6 volume */
89 * Default TAS5086 power-up configuration
130 return 4; in tas5086_register_size()
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| /kernel/linux/linux-4.19/sound/soc/codecs/ |
| D | tas5086.c | 17 * - implement DAPM and input muxing
18 * - implement modulation limit
19 * - implement non-default PWM start
22 * because the registers are of unequal size, and multi-byte registers
27 * it doesn't matter because the entire map can be accessed as 8-bit
30 * routines have to be open-coded.
80 #define TAS5086_CHANNEL_VOL(X) (0x08 + (X)) /* Channel 1-6 volume */
98 * Default TAS5086 power-up configuration
139 return 4; in tas5086_register_size()
182 size = tas5086_register_size(&client->dev, reg); in tas5086_reg_write()
[all …]
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| /kernel/linux/linux-5.10/sound/soc/sprd/ |
| D | sprd-mcdt.c | 1 // SPDX-License-Identifier: GPL-2.0
14 #include "sprd-mcdt.h"
57 /* Channel water mark definition */
62 /* DMA channel select definition */
65 #define MCDT_DMA_CH1_SEL_MASK GENMASK(7, 4)
66 #define MCDT_DMA_CH1_SEL_SHIFT 4
75 /* DMA channel ACK select definition */
78 /* Channel FIFO definition */
121 u32 orig = readl_relaxed(mcdt->base + reg); in sprd_mcdt_update()
125 writel_relaxed(tmp, mcdt->base + reg); in sprd_mcdt_update()
[all …]
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| /kernel/linux/linux-4.19/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac4_dma.c | 2 * This is the driver for the GMAC on-chip Ethernet controller for ST SoCs.
3 * DWC Ether MAC version 4.xx has been used for developing this code.
28 if (axi->axi_lpi_en) in dwmac4_dma_axi()
30 if (axi->axi_xit_frm) in dwmac4_dma_axi()
34 value |= (axi->axi_wr_osr_lmt & DMA_AXI_OSR_MAX) << in dwmac4_dma_axi()
38 value |= (axi->axi_rd_osr_lmt & DMA_AXI_OSR_MAX) << in dwmac4_dma_axi()
46 switch (axi->axi_blen[i]) { in dwmac4_dma_axi()
65 case 4: in dwmac4_dma_axi()
79 u32 rxpbl = dma_cfg->rxpbl ?: dma_cfg->pbl; in dwmac4_dma_init_rx_chan()
93 u32 txpbl = dma_cfg->txpbl ?: dma_cfg->pbl; in dwmac4_dma_init_tx_chan()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | dma.txt | 4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
9 - compatible : must include "fsl,elo-dma"
10 - reg : DMA General Status Register, i.e. DGSR which contains
11 status for all the 4 DMA channels
12 - ranges : describes the mapping between the address space of the
14 - cell-index : controller index. 0 for controller @ 0x8100
15 - interrupts : interrupt specifier for DMA IRQ
17 - DMA channel nodes:
18 - compatible : must include "fsl,elo-dma-channel"
20 - reg : DMA channel specific registers
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | dma.txt | 4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
9 - compatible : must include "fsl,elo-dma"
10 - reg : DMA General Status Register, i.e. DGSR which contains
11 status for all the 4 DMA channels
12 - ranges : describes the mapping between the address space of the
14 - cell-index : controller index. 0 for controller @ 0x8100
15 - interrupts : interrupt specifier for DMA IRQ
17 - DMA channel nodes:
18 - compatible : must include "fsl,elo-dma-channel"
20 - reg : DMA channel specific registers
[all …]
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| /kernel/linux/linux-5.10/drivers/media/platform/rcar-vin/ |
| D | rcar-core.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Renesas R-Car VIN
6 * Copyright (C) 2011-2013 Renesas Solutions Corp.
10 * Based on the soc-camera rcar_vin driver
22 #include <media/v4l2-async.h>
23 #include <media/v4l2-fwnode.h>
24 #include <media/v4l2-mc.h>
26 #include "rcar-vin.h"
29 * The companion CSI-2 receiver driver (rcar-csi2) is known
31 * pads (pad 1-4). So to translate a pad on the remote
[all …]
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| /kernel/linux/linux-5.10/drivers/hsi/controllers/ |
| D | omap_ssi_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
23 # define SSI_SIDLEMODE_SMART (1 << 4)
33 # define SSI_DATAACCEPT(channel) (1 << (channel)) argument
34 # define SSI_DATAAVAILABLE(channel) (1 << ((channel) + 8)) argument
35 # define SSI_DATAOVERRUN(channel) (1 << ((channel) + 16)) argument
40 # define SSI_GDD_LCH(channel) (1 << (channel)) argument
44 # define SSI_WAKE(channel) (1 << (channel)) argument
51 #define SSI_SST_MODE_REG 4
62 # define SSI_FULL(channel) (1 << (channel)) argument
67 # define SSI_CHANNELS_DEFAULT 4
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| /kernel/linux/linux-4.19/drivers/media/platform/rcar-vin/ |
| D | rcar-core.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Renesas R-Car VIN
6 * Copyright (C) 2011-2013 Renesas Solutions Corp.
10 * Based on the soc-camera rcar_vin driver
22 #include <media/v4l2-async.h>
23 #include <media/v4l2-fwnode.h>
24 #include <media/v4l2-mc.h>
26 #include "rcar-vin.h"
29 * The companion CSI-2 receiver driver (rcar-csi2) is known
31 * pads (pad 1-4). So to translate a pad on the remote
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/dac/ |
| D | ad5755.txt | 1 * Analog Devices AD5755 IIO Multi-Channel DAC Linux Driver
4 - compatible: Has to contain one of the following:
6 adi,ad5755-1
11 - reg: spi chip select number for the device
12 - spi-cpha or spi-cpol: is the only modes that is supported
15 - spi-max-frequency: Definition as per
16 Documentation/devicetree/bindings/spi/spi-bus.txt
19 See include/dt-bindings/iio/ad5755.h
20 - adi,ext-dc-dc-compenstation-resistor: boolean set if the hardware have an
23 - adi,dc-dc-phase:
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/iio/dac/ |
| D | ad5755.txt | 1 * Analog Device AD5755 IIO Multi-Channel DAC Linux Driver
4 - compatible: Has to contain one of the following:
6 adi,ad5755-1
11 - reg: spi chip select number for the device
12 - spi-cpha or spi-cpol: is the only modes that is supported
15 - spi-max-frequency: Definition as per
16 Documentation/devicetree/bindings/spi/spi-bus.txt
19 See include/dt-bindings/iio/ad5755.h
20 - adi,ext-dc-dc-compenstation-resistor: boolean set if the hardware have an
23 - adi,dc-dc-phase:
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | tlv320adcx140.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Dan Murphy <dmurphy@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - const: ti,tlv320adc3140
29 - const: ti,tlv320adc5140
30 - const: ti,tlv320adc6140
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| /kernel/linux/linux-5.10/drivers/media/pci/tw5864/ |
| D | tw5864-reg.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * TW5864 driver - registers description
8 /* According to TW5864_datasheet_0.6d.pdf, tw5864b1-ds.pdf */
10 /* Register Description - Direct Map Space */
11 /* 0x0000 ~ 0x1ffc - H264 Register Map */
26 #define TW5864_EMU_EN_LPF BIT(4)
47 #define TW5864_MAS_SLICE_END BIT(4)
52 * [15:0] Two bit for each channel (channel 0 ~ 7). Each two bits are the buffer
53 * pointer for the last encoded frame of the corresponding channel.
76 * 0->3 4 VLC data buffer in DDR (1M each)
[all …]
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| /kernel/linux/linux-4.19/drivers/media/pci/tw5864/ |
| D | tw5864-reg.h | 2 * TW5864 driver - registers description
17 /* According to TW5864_datasheet_0.6d.pdf, tw5864b1-ds.pdf */
19 /* Register Description - Direct Map Space */
20 /* 0x0000 ~ 0x1ffc - H264 Register Map */
35 #define TW5864_EMU_EN_LPF BIT(4)
56 #define TW5864_MAS_SLICE_END BIT(4)
61 * [15:0] Two bit for each channel (channel 0 ~ 7). Each two bits are the buffer
62 * pointer for the last encoded frame of the corresponding channel.
85 * 0->3 4 VLC data buffer in DDR (1M each)
86 * 0->7 8 VLC data buffer in DDR (512k each)
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac4_dma.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * This is the driver for the GMAC on-chip Ethernet controller for ST SoCs.
4 * DWC Ether MAC version 4.xx has been used for developing this code.
25 if (axi->axi_lpi_en) in dwmac4_dma_axi()
27 if (axi->axi_xit_frm) in dwmac4_dma_axi()
31 value |= (axi->axi_wr_osr_lmt & DMA_AXI_OSR_MAX) << in dwmac4_dma_axi()
35 value |= (axi->axi_rd_osr_lmt & DMA_AXI_OSR_MAX) << in dwmac4_dma_axi()
43 switch (axi->axi_blen[i]) { in dwmac4_dma_axi()
62 case 4: in dwmac4_dma_axi()
76 u32 rxpbl = dma_cfg->rxpbl ?: dma_cfg->pbl; in dwmac4_dma_init_rx_chan()
[all …]
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| /kernel/liteos_m/targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Include/ |
| D | gd32vf103_timer.h | 5 \version 2019-6-5, V1.0.0, firmware for GD32VF103
58 #define TIMER_CHCTL0(timerx) REG32((timerx) + 0x18U) /*!< TIMER channel contr…
59 #define TIMER_CHCTL1(timerx) REG32((timerx) + 0x1CU) /*!< TIMER channel contr…
60 #define TIMER_CHCTL2(timerx) REG32((timerx) + 0x20U) /*!< TIMER channel contr…
65 #define TIMER_CH0CV(timerx) REG32((timerx) + 0x34U) /*!< TIMER channel 0 cap…
66 #define TIMER_CH1CV(timerx) REG32((timerx) + 0x38U) /*!< TIMER channel 1 cap…
67 #define TIMER_CH2CV(timerx) REG32((timerx) + 0x3CU) /*!< TIMER channel 2 cap…
68 #define TIMER_CH3CV(timerx) REG32((timerx) + 0x40U) /*!< TIMER channel 3 cap…
69 #define TIMER_CCHP(timerx) REG32((timerx) + 0x44U) /*!< TIMER channel compl…
79 #define TIMER_CTL0_DIR BIT(4) /*!< timer counter direction */
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| /kernel/linux/linux-4.19/drivers/isdn/hisax/ |
| D | st5481_b.c | 22 struct hisax_if *ifc = (struct hisax_if *) &bcs->b_if; in B_L1L2()
24 ifc->l1l2(ifc, pr, arg); in B_L1L2()
32 struct st5481_b_out *b_out = &bcs->b_out; in usb_b_out()
33 struct st5481_adapter *adapter = bcs->adapter; in usb_b_out()
40 if (test_and_set_bit(buf_nr, &b_out->busy)) { in usb_b_out()
41 DBG(4, "ep %d urb %d busy", (bcs->channel + 1) * 2, buf_nr); in usb_b_out()
44 urb = b_out->urb[buf_nr]; in usb_b_out()
47 if (b_out->flow_event & (OUT_DOWN | OUT_UNDERRUN)) { in usb_b_out()
50 DBG(4, "B%d,adjust flow,add %d bytes", bcs->channel + 1, B_FLOW_ADJUST); in usb_b_out()
51 } else if (b_out->flow_event & OUT_UP) { in usb_b_out()
[all …]
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| /kernel/linux/linux-4.19/drivers/hsi/controllers/ |
| D | omap_ssi_regs.h | 19 * 02110-1301 USA
36 # define SSI_SIDLEMODE_SMART (1 << 4)
46 # define SSI_DATAACCEPT(channel) (1 << (channel)) argument
47 # define SSI_DATAAVAILABLE(channel) (1 << ((channel) + 8)) argument
48 # define SSI_DATAOVERRUN(channel) (1 << ((channel) + 16)) argument
53 # define SSI_GDD_LCH(channel) (1 << (channel)) argument
57 # define SSI_WAKE(channel) (1 << (channel)) argument
64 #define SSI_SST_MODE_REG 4
75 # define SSI_FULL(channel) (1 << (channel)) argument
80 # define SSI_CHANNELS_DEFAULT 4
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| /kernel/linux/linux-5.10/sound/pci/ca0106/ |
| D | ca0106.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
12 * Removed noise from Center/LFE channel when in Analog mode.
50 * Implement support for Line-in capture on SB Live 24bit.
73 #define IPR_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
74 #define IPR_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
87 #define IPR_MIDI_RX_A 0x00000004 /* MIDI UART-A Receive buffer non-empty */
88 #define IPR_MIDI_TX_A 0x00000002 /* MIDI UART-A Transmit buffer empty */
93 #define INTE_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
94 #define INTE_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
[all …]
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| /kernel/linux/linux-4.19/sound/pci/ca0106/ |
| D | ca0106.h | 2 * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
11 * Removed noise from Center/LFE channel when in Analog mode.
49 * Implement support for Line-in capture on SB Live 24bit.
69 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
88 #define IPR_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
89 #define IPR_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
102 #define IPR_MIDI_RX_A 0x00000004 /* MIDI UART-A Receive buffer non-empty */
103 #define IPR_MIDI_TX_A 0x00000002 /* MIDI UART-A Transmit buffer empty */
108 #define INTE_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
109 #define INTE_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | ste-dma40.txt | 4 - compatible: "stericsson,dma40"
5 - reg: Address range of the DMAC registers
6 - reg-names: Names of the above areas to use during resource look-up
7 - interrupt: Should contain the DMAC interrupt number
8 - #dma-cells: must be <3>
9 - memcpy-channels: Channels to be used for memcpy
12 - dma-channels: Number of channels supported by hardware - if not present
14 - disabled-channels: Channels which can not be used
18 dma: dma-controller@801c0000 {
19 compatible = "stericsson,db8500-dma40", "stericsson,dma40";
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