Searched +full:4 +full:- +full:bit (Results 1 – 25 of 1145) sorted by relevance
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| /kernel/linux/linux-5.10/include/soc/mscc/ |
| D | ocelot_dev.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
11 #define DEV_CLOCK_CFG_MAC_TX_RST BIT(7)
12 #define DEV_CLOCK_CFG_MAC_RX_RST BIT(6)
13 #define DEV_CLOCK_CFG_PCS_TX_RST BIT(5)
14 #define DEV_CLOCK_CFG_PCS_RX_RST BIT(4)
15 #define DEV_CLOCK_CFG_PORT_RST BIT(3)
16 #define DEV_CLOCK_CFG_PHY_RST BIT(2)
20 #define DEV_PORT_MISC_FWD_ERROR_ENA BIT(4)
21 #define DEV_PORT_MISC_FWD_PAUSE_ENA BIT(3)
22 #define DEV_PORT_MISC_FWD_CTRL_ENA BIT(2)
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| /kernel/linux/linux-5.10/include/linux/mfd/abx500/ |
| D | ab8500-sysctrl.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) ST-Ericsson SA 2010
83 #define AB8500_TURNONSTATUS_PORNVBAT BIT(0)
84 #define AB8500_TURNONSTATUS_PONKEY1DBF BIT(1)
85 #define AB8500_TURNONSTATUS_PONKEY2DBF BIT(2)
86 #define AB8500_TURNONSTATUS_RTCALARM BIT(3)
87 #define AB8500_TURNONSTATUS_MAINCHDET BIT(4)
88 #define AB8500_TURNONSTATUS_VBUSDET BIT(5)
89 #define AB8500_TURNONSTATUS_USBIDDETECT BIT(6)
91 #define AB8500_RESETSTATUS_RESETN4500NSTATUS BIT(0)
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| /kernel/linux/linux-5.10/include/linux/mfd/da9062/ |
| D | registers.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2015-2017 Dialog Semiconductor
151 * Bit fields
158 #define DA9062AA_WRITE_MODE_MASK BIT(6)
160 #define DA9062AA_REVERT_MASK BIT(7)
166 #define DA9062AA_DVC_BUSY_MASK BIT(2)
172 #define DA9062AA_GPI1_MASK BIT(1)
174 #define DA9062AA_GPI2_MASK BIT(2)
176 #define DA9062AA_GPI3_MASK BIT(3)
177 #define DA9062AA_GPI4_SHIFT 4
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| /kernel/linux/linux-4.19/drivers/net/ethernet/mscc/ |
| D | ocelot_dev.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
13 #define DEV_CLOCK_CFG_MAC_TX_RST BIT(7)
14 #define DEV_CLOCK_CFG_MAC_RX_RST BIT(6)
15 #define DEV_CLOCK_CFG_PCS_TX_RST BIT(5)
16 #define DEV_CLOCK_CFG_PCS_RX_RST BIT(4)
17 #define DEV_CLOCK_CFG_PORT_RST BIT(3)
18 #define DEV_CLOCK_CFG_PHY_RST BIT(2)
24 #define DEV_PORT_MISC_FWD_ERROR_ENA BIT(4)
25 #define DEV_PORT_MISC_FWD_PAUSE_ENA BIT(3)
26 #define DEV_PORT_MISC_FWD_CTRL_ENA BIT(2)
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| D | ocelot_dev_gmii.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
13 #define DEV_GMII_PORT_MODE_CLOCK_CFG_MAC_TX_RST BIT(5)
14 #define DEV_GMII_PORT_MODE_CLOCK_CFG_MAC_RX_RST BIT(4)
15 #define DEV_GMII_PORT_MODE_CLOCK_CFG_PORT_RST BIT(3)
16 #define DEV_GMII_PORT_MODE_CLOCK_CFG_PHY_RST BIT(2)
22 #define DEV_GMII_PORT_MODE_PORT_MISC_MPLS_RX_ENA BIT(5)
23 #define DEV_GMII_PORT_MODE_PORT_MISC_FWD_ERROR_ENA BIT(4)
24 #define DEV_GMII_PORT_MODE_PORT_MISC_FWD_PAUSE_ENA BIT(3)
25 #define DEV_GMII_PORT_MODE_PORT_MISC_FWD_CTRL_ENA BIT(2)
26 #define DEV_GMII_PORT_MODE_PORT_MISC_GMII_LOOP_ENA BIT(1)
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| /kernel/linux/linux-5.10/drivers/net/ethernet/freescale/dpaa2/ |
| D | dpkg.h | 1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2015 Freescale Semiconductor Inc.
18 #define DPKG_NUM_OF_MASKS 4
25 * enum dpkg_extract_from_hdr_type - Selecting extraction by header types
37 * enum dpkg_extract_type - Enumeration for selecting extraction type
40 * @DPKG_EXTRACT_FROM_PARSE: Extract from parser-result;
51 * struct dpkg_mask - A structure for defining a single extraction mask
63 #define NH_FLD_ETH_DA BIT(0)
64 #define NH_FLD_ETH_SA BIT(1)
65 #define NH_FLD_ETH_LENGTH BIT(2)
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| /kernel/linux/linux-4.19/drivers/staging/fsl-dpaa2/ethernet/ |
| D | dpkg.h | 1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2015 Freescale Semiconductor Inc.
18 #define DPKG_NUM_OF_MASKS 4
25 * enum dpkg_extract_from_hdr_type - Selecting extraction by header types
37 * enum dpkg_extract_type - Enumeration for selecting extraction type
40 * @DPKG_EXTRACT_FROM_PARSE: Extract from parser-result;
51 * struct dpkg_mask - A structure for defining a single extraction mask
63 #define NH_FLD_ETH_DA BIT(0)
64 #define NH_FLD_ETH_SA BIT(1)
65 #define NH_FLD_ETH_LENGTH BIT(2)
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| /kernel/linux/linux-5.10/drivers/net/dsa/microchip/ |
| D | ksz8795_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
24 #define SW_CHIP_ID_S 4
34 #define SW_NEW_BACKOFF BIT(7)
35 #define SW_GLOBAL_RESET BIT(6)
36 #define SW_FLUSH_DYN_MAC_TABLE BIT(5)
37 #define SW_FLUSH_STA_MAC_TABLE BIT(4)
38 #define SW_LINK_AUTO_AGING BIT(0)
42 #define SW_HUGE_PACKET BIT(6)
43 #define SW_TX_FLOW_CTRL_DISABLE BIT(5)
44 #define SW_RX_FLOW_CTRL_DISABLE BIT(4)
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| D | ksz9477_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2017-2018 Microchip Technology Inc.
12 #define KS_PRIO_S 4
14 /* 0 - Operation */
39 #define SWITCH_REVISION_S 4
44 #define PME_ENABLE BIT(1)
45 #define PME_POLARITY BIT(0)
49 #define SW_GIGABIT_ABLE BIT(6)
50 #define SW_REDUNDANCY_ABLE BIT(5)
51 #define SW_AVB_ABLE BIT(4)
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| /kernel/linux/linux-5.10/include/linux/mfd/ |
| D | lp87565.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
97 #define LP87565_BUCK_CTRL_1_EN BIT(7)
98 #define LP87565_BUCK_CTRL_1_EN_PIN_CTRL BIT(6)
101 #define LP87565_BUCK_CTRL_1_ROOF_FLOOR_EN BIT(3)
102 #define LP87565_BUCK_CTRL_1_RDIS_EN BIT(2)
103 #define LP87565_BUCK_CTRL_1_FPWM BIT(1)
105 #define LP87565_BUCK_CTRL_1_FPWM_MP_0_2 BIT(0)
119 #define LP87565_RESET_SW_RESET BIT(0)
121 #define LP87565_CONFIG_DOUBLE_DELAY BIT(7)
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| /kernel/linux/linux-5.10/drivers/gpu/drm/mediatek/ |
| D | mtk_mt8173_mipi_tx.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #define RG_DSI_LDOCORE_EN BIT(0)
11 #define RG_DSI_CKG_LDOOUT_EN BIT(1)
13 #define RG_DSI_LD_IDX_SEL (7 << 4)
15 #define RG_DSI_DSICLK_FREQ_SEL BIT(10)
16 #define RG_DSI_LPTX_CLMP_EN BIT(11)
23 #define RG_DSI_LNTx_LDOOUT_EN BIT(0)
24 #define RG_DSI_LNTx_CKLANE_EN BIT(1)
25 #define RG_DSI_LNTx_LPTX_IPLUS1 BIT(2)
26 #define RG_DSI_LNTx_LPTX_IPLUS2 BIT(3)
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| /kernel/linux/linux-4.19/drivers/usb/typec/fusb302/ |
| D | fusb302_reg.h | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2016-2017 Google, Inc
5 * Fairchild FUSB302 Type-C Chip Driver
13 #define FUSB_REG_SWITCHES0_CC2_PU_EN BIT(7)
14 #define FUSB_REG_SWITCHES0_CC1_PU_EN BIT(6)
15 #define FUSB_REG_SWITCHES0_VCONN_CC2 BIT(5)
16 #define FUSB_REG_SWITCHES0_VCONN_CC1 BIT(4)
17 #define FUSB_REG_SWITCHES0_MEAS_CC2 BIT(3)
18 #define FUSB_REG_SWITCHES0_MEAS_CC1 BIT(2)
19 #define FUSB_REG_SWITCHES0_CC2_PD_EN BIT(1)
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| /kernel/linux/linux-5.10/drivers/usb/typec/tcpm/ |
| D | fusb302_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2016-2017 Google, Inc
5 * Fairchild FUSB302 Type-C Chip Driver
13 #define FUSB_REG_SWITCHES0_CC2_PU_EN BIT(7)
14 #define FUSB_REG_SWITCHES0_CC1_PU_EN BIT(6)
15 #define FUSB_REG_SWITCHES0_VCONN_CC2 BIT(5)
16 #define FUSB_REG_SWITCHES0_VCONN_CC1 BIT(4)
17 #define FUSB_REG_SWITCHES0_MEAS_CC2 BIT(3)
18 #define FUSB_REG_SWITCHES0_MEAS_CC1 BIT(2)
19 #define FUSB_REG_SWITCHES0_CC2_PD_EN BIT(1)
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| /kernel/linux/linux-4.19/include/linux/mfd/abx500/ |
| D | ab8500-sysctrl.h | 2 * Copyright (C) ST-Ericsson SA 2010
83 #define AB8500_TURNONSTATUS_PORNVBAT BIT(0)
84 #define AB8500_TURNONSTATUS_PONKEY1DBF BIT(1)
85 #define AB8500_TURNONSTATUS_PONKEY2DBF BIT(2)
86 #define AB8500_TURNONSTATUS_RTCALARM BIT(3)
87 #define AB8500_TURNONSTATUS_MAINCHDET BIT(4)
88 #define AB8500_TURNONSTATUS_VBUSDET BIT(5)
89 #define AB8500_TURNONSTATUS_USBIDDETECT BIT(6)
91 #define AB8500_RESETSTATUS_RESETN4500NSTATUS BIT(0)
92 #define AB8500_RESETSTATUS_SWRESETN4500NSTATUS BIT(2)
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| /kernel/linux/linux-4.19/drivers/net/dsa/microchip/ |
| D | ksz_9477_reg.h | 23 #define KS_PRIO_S 4
25 /* 0 - Operation */
50 #define SWITCH_REVISION_S 4
55 #define PME_ENABLE BIT(1)
56 #define PME_POLARITY BIT(0)
60 #define SW_GIGABIT_ABLE BIT(6)
61 #define SW_REDUNDANCY_ABLE BIT(5)
62 #define SW_AVB_ABLE BIT(4)
80 #define SW_QW_ABLE BIT(5)
86 #define LUE_INT BIT(31)
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| /kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/ |
| D | pwrseq.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2009-2013 Realtek Corporation.*/
8 /* Check document WM-20110607-Paul-RTL8188EE_Power_Architecture-R02.vsd
10 * 0: POFF--Power Off
11 * 1: PDN--Power Down
12 * 2: CARDEMU--Card Emulation
13 * 3: ACT--Active Mode
14 * 4: LPS--Low Power State
15 * 5: SUS--Suspend
46 PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(1), BIT(1) \
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| /kernel/linux/linux-4.19/Documentation/input/devices/ |
| D | elantech.rst | 4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
18 4. Hardware version 1
20 4.2 Native relative mode 4 byte packet format
21 4.3 Native absolute mode 4 byte packet format
25 5.2.1 Parity checking and packet re-synchronization
33 7. Hardware version 4
39 8. Trackpoint (for Hardware version 3 and 4)
51 and version 4. Version 1 is found in "older" laptops and uses 4 bytes per
56 of up to 3 fingers. Hardware version 4 uses 6 bytes per packet, and can
58 4 allows tracking up to 5 fingers.
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| /kernel/linux/linux-5.10/Documentation/input/devices/ |
| D | elantech.rst | 4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
18 4. Hardware version 1
20 4.2 Native relative mode 4 byte packet format
21 4.3 Native absolute mode 4 byte packet format
25 5.2.1 Parity checking and packet re-synchronization
33 7. Hardware version 4
39 8. Trackpoint (for Hardware version 3 and 4)
51 and version 4. Version 1 is found in "older" laptops and uses 4 bytes per
56 of up to 3 fingers. Hardware version 4 uses 6 bytes per packet, and can
58 4 allows tracking up to 5 fingers.
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| /kernel/linux/linux-5.10/drivers/gpu/drm/mcde/ |
| D | mcde_dsi_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
8 #define DSI_MCTL_MAIN_DATA_CTL_LINK_EN BIT(0)
9 #define DSI_MCTL_MAIN_DATA_CTL_IF1_MODE BIT(1)
10 #define DSI_MCTL_MAIN_DATA_CTL_VID_EN BIT(2)
11 #define DSI_MCTL_MAIN_DATA_CTL_TVG_SEL BIT(3)
12 #define DSI_MCTL_MAIN_DATA_CTL_TBG_SEL BIT(4)
13 #define DSI_MCTL_MAIN_DATA_CTL_IF1_TE_EN BIT(5)
14 #define DSI_MCTL_MAIN_DATA_CTL_IF2_TE_EN BIT(6)
15 #define DSI_MCTL_MAIN_DATA_CTL_REG_TE_EN BIT(7)
16 #define DSI_MCTL_MAIN_DATA_CTL_READ_EN BIT(8)
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| /kernel/linux/linux-5.10/drivers/clk/sunxi-ng/ |
| D | ccu-sun9i-a80.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016 Chen-Yu Tsai. All rights reserved.
6 #include <linux/clk-provider.h>
21 #include "ccu-sun9i-a80.h"
26 * The CPU PLLs are actually NP clocks, with P being /1 or /4. However
28 * Neither mainline Linux, U-boot, nor the vendor BSPs use these.
36 .enable = BIT(31),
37 .lock = BIT(0),
43 .hw.init = CLK_HW_INIT("pll-c0cpux", "osc24M",
50 .enable = BIT(31),
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| /kernel/linux/linux-4.19/drivers/clk/sunxi-ng/ |
| D | ccu-sun9i-a80.c | 2 * Copyright (c) 2016 Chen-Yu Tsai. All rights reserved.
14 #include <linux/clk-provider.h>
28 #include "ccu-sun9i-a80.h"
33 * The CPU PLLs are actually NP clocks, with P being /1 or /4. However
35 * Neither mainline Linux, U-boot, nor the vendor BSPs use these.
43 .enable = BIT(31),
44 .lock = BIT(0),
50 .hw.init = CLK_HW_INIT("pll-c0cpux", "osc24M",
57 .enable = BIT(31),
58 .lock = BIT(1),
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| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | rk3328_codec.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
37 #define PIN_DIRECTION_MASK BIT(5)
40 #define DAC_I2S_MODE_MASK BIT(4)
41 #define DAC_I2S_MODE_SLAVE (0x0 << 4)
42 #define DAC_I2S_MODE_MASTER (0x1 << 4)
45 #define DAC_I2S_LRP_MASK BIT(7)
53 #define DAC_MODE_MASK GENMASK(4, 3)
58 #define DAC_LR_SWAP_MASK BIT(2)
68 #define DAC_RST_MASK BIT(1)
71 #define DAC_BCP_MASK BIT(0)
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| /kernel/linux/linux-5.10/drivers/media/pci/tw5864/ |
| D | tw5864-reg.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * TW5864 driver - registers description
8 /* According to TW5864_datasheet_0.6d.pdf, tw5864b1-ds.pdf */
10 /* Register Description - Direct Map Space */
11 /* 0x0000 ~ 0x1ffc - H264 Register Map */
18 #define TW5864_EMU_EN_DDR BIT(0)
19 /* Enable bit for Inter module */
20 #define TW5864_EMU_EN_ME BIT(1)
21 /* Enable bit for Sensor Interface module */
22 #define TW5864_EMU_EN_SEN BIT(2)
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| /kernel/linux/linux-5.10/include/linux/mfd/da9150/ |
| D | registers.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * DA9150 MFD Driver - Registers
160 #define DA9150_WRITE_MODE_MASK BIT(6)
162 #define DA9150_REVERT_MASK BIT(7)
172 #define DA9150_VFAULT_STAT_MASK BIT(0)
174 #define DA9150_TFAULT_STAT_MASK BIT(1)
178 #define DA9150_VDD33_STAT_MASK BIT(0)
180 #define DA9150_VDD33_SLEEP_MASK BIT(1)
182 #define DA9150_LFOSC_STAT_MASK BIT(7)
186 #define DA9150_GPIOA_STAT_MASK BIT(0)
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| /kernel/linux/linux-4.19/drivers/media/pci/tw5864/ |
| D | tw5864-reg.h | 2 * TW5864 driver - registers description
17 /* According to TW5864_datasheet_0.6d.pdf, tw5864b1-ds.pdf */
19 /* Register Description - Direct Map Space */
20 /* 0x0000 ~ 0x1ffc - H264 Register Map */
27 #define TW5864_EMU_EN_DDR BIT(0)
28 /* Enable bit for Inter module */
29 #define TW5864_EMU_EN_ME BIT(1)
30 /* Enable bit for Sensor Interface module */
31 #define TW5864_EMU_EN_SEN BIT(2)
32 /* Enable bit for Host Burst Access */
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