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/kernel/linux/linux-5.10/include/linux/mfd/
Dmotorola-cpcap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright (C) 2007-2009 Motorola, Inc.
46 #define CPCAP_REG_ASSIGN6 0x0044 /* Resource Assignment 6 */
90 #define CPCAP_REG_S6C 0x062c /* Switcher 6 Control */
151 #define CPCAP_REG_ADCD6 0x0c20 /* A/D Converter Data 6 */
186 #define CPCAP_REG_OWDC 0x0eb0 /* One Wire Device Control */
199 #define CPCAP_REG_GPIO6 0x0ee4 /* GPIO 6 Control */
212 #define CPCAP_REG_OW1C 0x1200 /* One Wire 1 Command */
213 #define CPCAP_REG_OW1D 0x1204 /* One Wire 1 Data */
214 #define CPCAP_REG_OW1I 0x1208 /* One Wire 1 Interrupt */
[all …]
/kernel/linux/linux-4.19/include/linux/mfd/
Dmotorola-cpcap.h5 * Copyright (C) 2007-2009 Motorola, Inc.
49 #define CPCAP_REG_ASSIGN6 0x0044 /* Resource Assignment 6 */
93 #define CPCAP_REG_S6C 0x062c /* Switcher 6 Control */
154 #define CPCAP_REG_ADCD6 0x0c20 /* A/D Converter Data 6 */
189 #define CPCAP_REG_OWDC 0x0eb0 /* One Wire Device Control */
202 #define CPCAP_REG_GPIO6 0x0ee4 /* GPIO 6 Control */
215 #define CPCAP_REG_OW1C 0x1200 /* One Wire 1 Command */
216 #define CPCAP_REG_OW1D 0x1204 /* One Wire 1 Data */
217 #define CPCAP_REG_OW1I 0x1208 /* One Wire 1 Interrupt */
218 #define CPCAP_REG_OW1IE 0x120c /* One Wire 1 Interrupt Enable */
[all …]
/kernel/linux/linux-5.10/include/linux/platform_data/
Dusb-omap1.h15 * - "A" connector (rectagular)
17 * - "B" connector (squarish) or "Mini-B"
19 * - "Mini-AB" connector (very similar to Mini-B)
24 u8 otg; /* port number, 1-based: usb1 == 2 */
35 * 2 == usb0-only, using internal transceiver
36 * 3 == 3 wire bidirectional
37 * 4 == 4 wire bidirectional
38 * 6 == 6 wire unidirectional (or TLL)
/kernel/linux/linux-4.19/include/linux/platform_data/
Dusb-omap1.h15 * - "A" connector (rectagular)
17 * - "B" connector (squarish) or "Mini-B"
19 * - "Mini-AB" connector (very similar to Mini-B)
24 u8 otg; /* port number, 1-based: usb1 == 2 */
35 * 2 == usb0-only, using internal transceiver
36 * 3 == 3 wire bidirectional
37 * 4 == 4 wire bidirectional
38 * 6 == 6 wire unidirectional (or TLL)
/kernel/linux/linux-4.19/Documentation/hwmon/
Dasc762115 Andigilog has both the PECI and pre-PECI versions of the Heceta-6, as
16 Intel calls them. Heceta-6e has high frequency PWM and Heceta-6p has
18 Heceta-6e part and aSC7621 is the Heceta-6p part. They are both in
23 have used registers below 20h for vendor-specific functions in addition
24 to those in the Intel-specified vendor range.
27 The fan speed control uses this finer value to produce a "step-less" fan
28 PWM output. These two bytes are "read-locked" to guarantee that once a
29 high or low byte is read, the other byte is locked-in until after the
32 sheet says 10-bits of resolution, although you may find the lower bits
42 We offer GPIO features on the former VID pins. These are open-drain
[all …]
Dmax317907 Addresses scanned: -
14 -----------
20 through the I2C interface. The outputs drive "4-wire" fans directly,
24 Tachometer inputs monitor fan tachometer logic outputs for precise (+/-1%)
31 -------------
33 fan[1-12]_input RO fan tachometer speed in RPM
34 fan[1-12]_fault RO fan experienced fault
35 fan[1-6]_target RW desired fan speed in RPM
36 pwm[1-6]_enable RW regulator mode, 0=disabled, 1=manual mode, 2=rpm mode
37 pwm[1-6] RW fan target duty cycle (0-255)
Dlm8524 Datasheet: http://www.smsc.com/media/Downloads_Public/discontinued/6d100.pdf
42 Margit Schubert-While <margitsw@t-online.de>,
46 -----------
52 The LM85 uses the 2-wire interface compatible with the SMBUS 2.0
54 temperatures and five (5) voltages. It has four (4) 16-bit counters for
87 ----------------
92 speed of a two wire fan, but the input conditioning circuitry is different
93 for 3-wire and 2-wire mode. For this reason, the 2-wire fan modes are not
102 The ADM1027, ADT7463 and ADT7468 have a 10-bit ADC and can therefore
112 The ADT7468 has a high-frequency PWM mode, where all PWM outputs are
[all …]
/kernel/linux/linux-5.10/drivers/w1/masters/
Dsgi_w1.c1 // SPDX-License-Identifier: GPL-2.0
3 * sgi_w1.c - w1 master driver for one wire support in SGI ASICs
13 #include <linux/platform_data/sgi-w1.h>
41 * reset the device on the One Wire interface
49 writel(MCR_PACK(520, 65), dev->mcr); in sgi_w1_reset_bus()
50 ret = sgi_w1_wait(dev->mcr); in sgi_w1_reset_bus()
56 * this is the low level routine to read/write a bit on the One Wire
66 writel(MCR_PACK(6, 13), dev->mcr); in sgi_w1_touch_bit()
68 writel(MCR_PACK(80, 30), dev->mcr); in sgi_w1_touch_bit()
70 ret = sgi_w1_wait(dev->mcr); in sgi_w1_touch_bit()
[all …]
Dmxc_w1.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.
22 # define MXC_W1_CONTROL_WR(x) BIT(5 - (x))
23 # define MXC_W1_CONTROL_PST BIT(6)
37 * reset the device on the One Wire interface
45 writeb(MXC_W1_CONTROL_RPP, dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
53 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
55 /* PST bit is valid after the RPP bit is self-cleared */ in mxc_w1_ds2_reset_bus()
64 * this is the low level routine to read/write a bit on the One Wire
73 writeb(MXC_W1_CONTROL_WR(bit), dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_touch_bit()
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/power/supply/
Dbq24190.txt1 TI BQ24190 Li-Ion Battery Charger
4 - compatible: contains one of the following:
7 - reg: integer, I2C address of the charger.
8 - interrupts[-extended]: configuration for charger INT pin.
11 - monitored-battery: phandle of battery characteristics devicetree node
13 + precharge-current-microamp: maximum charge current during precharge
15 + charge-term-current-microamp: a charge cycle terminates when the
19 - ti,system-minimum-microvolt: when power is connected and the battery is below
23 - Some circuit boards wire the chip's "OTG" pin high (enabling 500mA default
25 boards that wire the pin to a GPIO, set a gpio-hog.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/supply/
Dbq24190.txt1 TI BQ24190 Li-Ion Battery Charger
4 - compatible: contains one of the following:
9 - reg: integer, I2C address of the charger.
10 - interrupts[-extended]: configuration for charger INT pin.
13 - monitored-battery: phandle of battery characteristics devicetree node
15 + precharge-current-microamp: maximum charge current during precharge
17 + charge-term-current-microamp: a charge cycle terminates when the
21 - ti,system-minimum-microvolt: when power is connected and the battery is below
25 - usb-otg-vbus:
31 - Some circuit boards wire the chip's "OTG" pin high (enabling 500mA default
[all …]
/kernel/linux/linux-4.19/arch/sh/include/mach-common/mach/
Dhighlander.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #define PA_SDPOW (-1)
62 #define PA_SMCR (PA_BCR+0x0600) /* 2-wire Serial control */
63 #define PA_SMSMADR (PA_BCR+0x0602) /* 2-wire Serial Slave control */
64 #define PA_SMMR (PA_BCR+0x0604) /* 2-wire Serial Mode control */
65 #define PA_SMSADR1 (PA_BCR+0x0606) /* 2-wire Serial Address1 control */
66 #define PA_SMTRDR1 (PA_BCR+0x0646) /* 2-wire Serial Data1 control */
75 #define PA_POFF (-1)
114 #define PA_SMCR (PA_BCR+0x0500) /* 2-wire Serial control */
115 #define PA_SMSMADR (PA_BCR+0x0502) /* 2-wire Serial Slave control */
[all …]
/kernel/linux/linux-5.10/arch/sh/include/mach-common/mach/
Dhighlander.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #define PA_SDPOW (-1)
62 #define PA_SMCR (PA_BCR+0x0600) /* 2-wire Serial control */
63 #define PA_SMSMADR (PA_BCR+0x0602) /* 2-wire Serial Slave control */
64 #define PA_SMMR (PA_BCR+0x0604) /* 2-wire Serial Mode control */
65 #define PA_SMSADR1 (PA_BCR+0x0606) /* 2-wire Serial Address1 control */
66 #define PA_SMTRDR1 (PA_BCR+0x0646) /* 2-wire Serial Data1 control */
75 #define PA_POFF (-1)
114 #define PA_SMCR (PA_BCR+0x0500) /* 2-wire Serial control */
115 #define PA_SMSMADR (PA_BCR+0x0502) /* 2-wire Serial Slave control */
[all …]
/kernel/linux/linux-4.19/drivers/w1/masters/
Dmxc_w1.c2 * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.
30 # define MXC_W1_CONTROL_WR(x) BIT(5 - (x))
31 # define MXC_W1_CONTROL_PST BIT(6)
45 * reset the device on the One Wire interface
53 writeb(MXC_W1_CONTROL_RPP, dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
61 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
63 /* PST bit is valid after the RPP bit is self-cleared */ in mxc_w1_ds2_reset_bus()
72 * this is the low level routine to read/write a bit on the One Wire
81 writeb(MXC_W1_CONTROL_WR(bit), dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_touch_bit()
89 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_touch_bit()
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/input/touchscreen/
Dti-tsc-adc.txt1 * TI - TSC ADC (Touschscreen and analog digital converter)
5 - child "tsc"
6 ti,wires: Wires refer to application modes i.e. 4/5/8 wire touchscreen
8 ti,x-plate-resistance: X plate resistance
9 ti,coordinate-readouts: The sequencer supports a total of 16
18 ti,wire-config: Different boards could have a different order for
27 - child "adc"
28 ti,adc-channels: List of analog inputs available for ADC.
32 - child "tsc"
33 ti,charge-delay: Length of touch screen charge delay step in terms of
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/input/touchscreen/
Dti-tsc-adc.txt1 * TI - TSC ADC (Touschscreen and analog digital converter)
5 - mfd
7 "ti,am3359-tscadc" for AM335x/AM437x SoCs
8 "ti,am654-tscadc", "ti,am3359-tscadc" for AM654 SoCs
9 - child "tsc"
10 compatible: Should be "ti,am3359-tsc".
11 ti,wires: Wires refer to application modes i.e. 4/5/8 wire touchscreen
13 ti,x-plate-resistance: X plate resistance
14 ti,coordinate-readouts: The sequencer supports a total of 16
23 ti,wire-config: Different boards could have a different order for
[all …]
/kernel/linux/linux-5.10/Documentation/hwmon/
Dasc7621.rst20 Andigilog has both the PECI and pre-PECI versions of the Heceta-6, as
21 Intel calls them. Heceta-6e has high frequency PWM and Heceta-6p has
23 Heceta-6e part and aSC7621 is the Heceta-6p part. They are both in
28 have used registers below 20h for vendor-specific functions in addition
29 to those in the Intel-specified vendor range.
32 The fan speed control uses this finer value to produce a "step-less" fan
33 PWM output. These two bytes are "read-locked" to guarantee that once a
34 high or low byte is read, the other byte is locked-in until after the
37 sheet says 10-bits of resolution, although you may find the lower bits
47 We offer GPIO features on the former VID pins. These are open-drain
[all …]
/kernel/linux/linux-4.19/drivers/staging/rtlwifi/phydm/
Dphydm_psd.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright(c) 2007 - 2016 Realtek Corporation.
25 struct psd_info *dm_psd_table = &dm->dm_psd_table; in phydm_get_psd_data()
28 odm_set_bb_reg(dm, dm_psd_table->psd_reg, 0x3ff, psd_tone_idx); in phydm_get_psd_data()
30 odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(22), in phydm_get_psd_data()
33 odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(22), in phydm_get_psd_data()
36 psd_report = odm_get_bb_reg(dm, dm_psd_table->psd_report_reg, 0xffff); in phydm_get_psd_data()
49 /*[Stop TRX]----------------------------------------------------------*/ in phydm_psd_stop_trx()
70 if (dm->support_ic_type & ODM_IC_11AC_SERIES) { in phydm_psd_stop_trx()
98 struct psd_info *dm_psd_table = &dm->dm_psd_table; in phydm_psd()
[all …]
/kernel/linux/linux-5.10/net/rxrpc/
Dprotocol.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
13 typedef __be32 rxrpc_seq_net_t; /* on-the-wire Rx message sequence number */
14 typedef __be32 rxrpc_serial_net_t; /* on-the-wire Rx message serial number */
18 * on-the-wire Rx packet header
19 * - all multibyte fields should be in network byte order
23 #define RXRPC_RANDOM_EPOCH 0x80000000 /* Random if set, date-based if not */
27 #define RXRPC_CHANNELMASK (RXRPC_MAXCALLS-1) /* mask for channel ID */
32 __be32 callNumber; /* call ID (0 for connection-level packets) */
42 #define RXRPC_PACKET_TYPE_CHALLENGE 6 /* connection security challenge (SRVR->CLNT) */
43 #define RXRPC_PACKET_TYPE_RESPONSE 7 /* connection secutity response (CLNT->SRVR) */
[all …]
/kernel/linux/linux-4.19/net/rxrpc/
Dprotocol.h17 typedef __be32 rxrpc_seq_net_t; /* on-the-wire Rx message sequence number */
18 typedef __be32 rxrpc_serial_net_t; /* on-the-wire Rx message serial number */
22 * on-the-wire Rx packet header
23 * - all multibyte fields should be in network byte order
27 #define RXRPC_RANDOM_EPOCH 0x80000000 /* Random if set, date-based if not */
31 #define RXRPC_CHANNELMASK (RXRPC_MAXCALLS-1) /* mask for channel ID */
36 __be32 callNumber; /* call ID (0 for connection-level packets) */
46 #define RXRPC_PACKET_TYPE_CHALLENGE 6 /* connection security challenge (SRVR->CLNT) */
47 #define RXRPC_PACKET_TYPE_RESPONSE 7 /* connection secutity response (CLNT->SRVR) */
62 uint8_t userStatus; /* app-layer defined status */
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/
Dtrivial-devices.txt12 abracon,abb5zes3 AB-RTCMC-32.768kHz-B5ZE-S3: Real Time Clock/Calendar Module with I2C Interface
13 ad,ad7414 SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature …
14 ad,adm9240 ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems
15 adi,adt7461 +/-1C TDM Extended Temp Range I.C
16 adt7461 +/-1C TDM Extended Temp Range I.C
17 adi,adt7473 +/-1C TDM Extended Temp Range I.C
18 adi,adt7475 +/-1C TDM Extended Temp Range I.C
19 adi,adt7476 +/-1C TDM Extended Temp Range I.C
20 adi,adt7490 +/-1C TDM Extended Temp Range I.C
21 adi,adxl345 Three-Axis Digital Accelerometer
[all …]
/kernel/linux/linux-4.19/drivers/infiniband/core/
Dud_header.c15 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
44 .struct_size_bytes = sizeof ((struct ib_unpacked_ ## header *) 0)->field, \
216 .offset_words = 6,
289 iph.tos = header->ip4.tos; in ib_ud_ip4_csum()
290 iph.tot_len = header->ip4.tot_len; in ib_ud_ip4_csum()
291 iph.id = header->ip4.id; in ib_ud_ip4_csum()
292 iph.frag_off = header->ip4.frag_off; in ib_ud_ip4_csum()
293 iph.ttl = header->ip4.ttl; in ib_ud_ip4_csum()
294 iph.protocol = header->ip4.protocol; in ib_ud_ip4_csum()
[all …]
/kernel/linux/linux-5.10/drivers/infiniband/core/
Dud_header.c15 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
216 .offset_words = 6,
289 iph.tos = header->ip4.tos; in ib_ud_ip4_csum()
290 iph.tot_len = header->ip4.tot_len; in ib_ud_ip4_csum()
291 iph.id = header->ip4.id; in ib_ud_ip4_csum()
292 iph.frag_off = header->ip4.frag_off; in ib_ud_ip4_csum()
293 iph.ttl = header->ip4.ttl; in ib_ud_ip4_csum()
294 iph.protocol = header->ip4.protocol; in ib_ud_ip4_csum()
296 iph.saddr = header->ip4.saddr; in ib_ud_ip4_csum()
[all …]
/kernel/linux/linux-4.19/sound/ppc/
Dsnd_ps3_reg.h18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
51 * three wire serial
85 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
87 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
93 #define PS3_AUDIO_INTR_0_CHAN6 PS3_AUDIO_INTR_0_CHAN(6)
108 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
110 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
118 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
120 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
137 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
[all …]
/kernel/linux/linux-5.10/sound/ppc/
Dsnd_ps3_reg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
39 * three wire serial
73 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
75 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
81 #define PS3_AUDIO_INTR_0_CHAN6 PS3_AUDIO_INTR_0_CHAN(6)
96 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
98 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
106 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
108 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
125 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
[all …]

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