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/kernel/linux/linux-5.10/include/linux/
Dmath64.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 #if BITS_PER_LONG == 64
15 * div_u64_rem - unsigned 64bit divide with 32bit divisor with remainder
16 * @dividend: unsigned 64bit dividend
17 * @divisor: unsigned 32bit divisor
18 * @remainder: pointer to unsigned 32bit remainder
22 * This is commonly provided by 32bit archs to provide an optimized 64bit
32 * div_s64_rem - signed 64bit divide with 32bit divisor with remainder
33 * @dividend: signed 64bit dividend
34 * @divisor: signed 32bit divisor
[all …]
Dexportfs.h1 /* SPDX-License-Identifier: GPL-2.0 */
33 * 32bit inode number, 32 bit generation number.
38 * 32bit inode number, 32 bit generation number,
39 * 32 bit parent directory inode number.
44 * 64 bit object ID, 64 bit root object ID,
45 * 32 bit generation number.
50 * 64 bit object ID, 64 bit root object ID,
51 * 32 bit generation number,
52 * 64 bit parent object ID, 32 bit parent generation.
57 * 64 bit object ID, 64 bit root object ID,
[all …]
/kernel/linux/linux-5.10/drivers/mtd/nand/raw/
Dnand_ids.c1 // SPDX-License-Identifier: GPL-2.0-only
29 {"TC58NVG0S3E 1G 3.3V 8-bit",
31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
41 {"TC58NVG5D2 32G 3.3V 8-bit",
44 {"TC58NVG6D2 64G 3.3V 8-bit",
47 {"SDTNRGAMA 64G 3.3V 8-bit",
50 {"H27UCG8T2ATR-BC 64G 3.3V 8-bit",
[all …]
/kernel/linux/linux-4.19/drivers/mtd/nand/raw/
Dnand_ids.c31 {"TC58NVG0S3E 1G 3.3V 8-bit",
33 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512),
35 {"TC58NVG2S0F 4G 3.3V 8-bit",
38 {"TC58NVG2S0H 4G 3.3V 8-bit",
41 {"TC58NVG3S0F 8G 3.3V 8-bit",
44 {"TC58NVG5D2 32G 3.3V 8-bit",
47 {"TC58NVG6D2 64G 3.3V 8-bit",
50 {"SDTNRGAMA 64G 3.3V 8-bit",
53 {"H27UCG8T2ATR-BC 64G 3.3V 8-bit",
58 LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS),
[all …]
/kernel/linux/linux-4.19/include/linux/
Dmath64.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 #if BITS_PER_LONG == 64
14 * div_u64_rem - unsigned 64bit divide with 32bit divisor with remainder
15 * @dividend: unsigned 64bit dividend
16 * @divisor: unsigned 32bit divisor
17 * @remainder: pointer to unsigned 32bit remainder
21 * This is commonly provided by 32bit archs to provide an optimized 64bit
31 * div_s64_rem - signed 64bit divide with 32bit divisor with remainder
32 * @dividend: signed 64bit dividend
33 * @divisor: signed 32bit divisor
[all …]
Dexportfs.h1 /* SPDX-License-Identifier: GPL-2.0 */
33 * 32bit inode number, 32 bit generation number.
38 * 32bit inode number, 32 bit generation number,
39 * 32 bit parent directory inode number.
44 * 64 bit object ID, 64 bit root object ID,
45 * 32 bit generation number.
50 * 64 bit object ID, 64 bit root object ID,
51 * 32 bit generation number,
52 * 64 bit parent object ID, 32 bit parent generation.
57 * 64 bit object ID, 64 bit root object ID,
[all …]
/kernel/linux/linux-5.10/arch/riscv/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 # see Documentation/kbuild/kconfig-language.rst.
7 config 64BIT config
10 config 32BIT
33 select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
39 select GENERIC_ATOMIC64 if !64BIT
52 select GENERIC_TIME_VSYSCALL if MMU && 64BIT
57 select HAVE_ARCH_KASAN if MMU && 64BIT
70 select HAVE_GENERIC_VDSO if MMU && 64BIT
93 default 18 if 64BIT
[all …]
/kernel/linux/linux-4.19/lib/
Ddiv64.c1 // SPDX-License-Identifier: GPL-2.0
5 * Based on former do_div() implementation from asm-parisc/div64.h:
6 * Copyright (C) 1999 Hewlett-Packard Co
7 * Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
10 * Generic C version of 64bit/32bit division and modulo, with
11 * 64bit result and 32bit remainder.
16 * for some CPUs. __div64_32() can be overridden by linking arch-specific
25 /* Not needed on 64bit architectures */
36 /* Reduce the thing a bit first */ in __div64_32()
41 rem -= (uint64_t) (high*base) << 32; in __div64_32()
[all …]
Datomic64_test.c24 #define TEST(bit, op, c_op, val) \ argument
26 atomic##bit##_set(&v, v0); \
28 atomic##bit##_##op(val, &v); \
30 WARN(atomic##bit##_read(&v) != r, "%Lx != %Lx\n", \
31 (unsigned long long)atomic##bit##_read(&v), \
37 * @test should be a macro accepting parameters (bit, op, ...)
40 #define FAMILY_TEST(test, bit, op, args...) \ argument
42 test(bit, op, ##args); \
43 test(bit, op##_acquire, ##args); \
44 test(bit, op##_release, ##args); \
[all …]
/kernel/linux/linux-5.10/lib/math/
Ddiv64.c1 // SPDX-License-Identifier: GPL-2.0
5 * Based on former do_div() implementation from asm-parisc/div64.h:
6 * Copyright (C) 1999 Hewlett-Packard Co
7 * Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
10 * Generic C version of 64bit/32bit division and modulo, with
11 * 64bit result and 32bit remainder.
16 * for some CPUs. __div64_32() can be overridden by linking arch-specific
25 /* Not needed on 64bit architectures */
36 /* Reduce the thing a bit first */ in __div64_32()
41 rem -= (uint64_t) (high*base) << 32; in __div64_32()
[all …]
/kernel/linux/linux-5.10/lib/
Datomic64_test.c1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #define TEST(bit, op, c_op, val) \ argument
22 atomic##bit##_set(&v, v0); \
24 atomic##bit##_##op(val, &v); \
26 WARN(atomic##bit##_read(&v) != r, "%Lx != %Lx\n", \
27 (unsigned long long)atomic##bit##_read(&v), \
33 * @test should be a macro accepting parameters (bit, op, ...)
36 #define FAMILY_TEST(test, bit, op, args...) \ argument
38 test(bit, op, ##args); \
39 test(bit, op##_acquire, ##args); \
[all …]
/kernel/linux/linux-4.19/drivers/net/ethernet/cavium/liquidio/
Dcn23xx_pf_regs.h7 * Copyright (c) 2003-2016 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
74 /* 2 scatch registers (64-bit) */
80 /* 1 registers (64-bit) - SLI_CTL_STATUS */
83 /* SLI Packet Input Jabber Register (64 bit register)
117 /* 4 registers (64-bit) for mapping IOQs to MACs(PEMs)-
122 /*1 register (64-bit) to determine whether IOQs are in reset. */
125 /* Each Input Queue register is at a 16-byte Offset in BAR0 */
141 /* Starting bit of the TRS field in CN23XX_SLI_PKT_MAC_RINFO64 register */
143 /* Starting bit of SRN field in CN23XX_SLI_PKT_MAC_RINFO64 register */
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/cavium/liquidio/
Dcn23xx_pf_regs.h7 * Copyright (c) 2003-2016 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
74 /* 2 scatch registers (64-bit) */
80 /* 1 registers (64-bit) - SLI_CTL_STATUS */
83 /* SLI Packet Input Jabber Register (64 bit register)
117 /* 4 registers (64-bit) for mapping IOQs to MACs(PEMs)-
122 /*1 register (64-bit) to determine whether IOQs are in reset. */
125 /* Each Input Queue register is at a 16-byte Offset in BAR0 */
141 /* Starting bit of the TRS field in CN23XX_SLI_PKT_MAC_RINFO64 register */
143 /* Starting bit of SRN field in CN23XX_SLI_PKT_MAC_RINFO64 register */
[all …]
/kernel/linux/linux-4.19/arch/x86/um/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
13 config 64BIT config
14 bool "64-bit kernel" if "$(SUBARCH)" = "x86"
18 def_bool !64BIT
26 def_bool 64BIT
35 def_bool 64BIT
41 bool "Three-level pagetables" if !64BIT
42 default 64BIT
44 Three-level pagetables will let UML have more than 4G of physical
48 However, this it experimental on 32-bit architectures, so if unsure say
[all …]
/kernel/linux/linux-4.19/arch/riscv/
DKconfig3 # see Documentation/kbuild/kconfig-language.txt.
6 config 64BIT config
9 config 32BIT
14 # even on 32-bit, physical (and DMA) addresses are > 32-bits
30 select GENERIC_ATOMIC64 if !64BIT || !RISCV_ISA_A
53 default y if 64BIT
57 default 0xC0000000 if 32BIT && MAXPHYSMEM_2GB
58 default 0xffffffff80000000 if 64BIT && MAXPHYSMEM_2GB
59 default 0xffffffe000000000 if 64BIT && MAXPHYSMEM_128GB
73 select GENERIC_BUG_RELATIVE_POINTERS if 64BIT
[all …]
/kernel/linux/linux-5.10/arch/x86/um/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
13 config 64BIT config
14 bool "64-bit kernel" if "$(SUBARCH)" = "x86"
18 def_bool !64BIT
27 def_bool 64BIT
31 bool "Three-level pagetables" if !64BIT
32 default 64BIT
34 Three-level pagetables will let UML have more than 4G of physical
38 However, this it experimental on 32-bit architectures, so if unsure say
39 N (on x86-64 it's automatically enabled, instead, as it's safe there).
[all …]
/kernel/liteos_m/arch/risc-v/nuclei/gcc/nmsis/Core/Include/
Dcore_feature_base.h4 * SPDX-License-Identifier: Apache-2.0
10 * www.apache.org/licenses/LICENSE-2.0
39 /** \brief Refer to the width of an integer register in bits(either 32 or 64) */
47 /** \brief Type of Control and Status Register(CSR), depends on the XLEN defined in RISC-V */
50 #elif __RISCV_XLEN == 64
68 rv_csr_t a:1; /*!< bit: 0 Atomic extension */
69 …rv_csr_t b:1; /*!< bit: 1 Tentatively reserved for Bit-Manipulation…
70 rv_csr_t c:1; /*!< bit: 2 Compressed extension */
71 …rv_csr_t d:1; /*!< bit: 3 Double-precision floating-point extension…
72 rv_csr_t e:1; /*!< bit: 4 RV32E base ISA */
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/broadcom/
Dtg3.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Copyright (C) 2007-2016 Broadcom Corporation.
9 * Copyright (C) 2016-2017 Broadcom Limited.
21 #define TG3_BDINFO_HOST_ADDR 0x0UL /* 64-bit */
22 #define TG3_BDINFO_MAXLEN_FLAGS 0x8UL /* 32-bit */
27 #define TG3_BDINFO_NIC_ADDR 0xcUL /* 32-bit */
78 /* 0x04 --> 0x2c unused */
115 /* 0x30 --> 0x64 unused */
117 /* 0x66 --> 0x68 unused */
284 /* 0x94 --> 0x98 unused */
[all …]
/kernel/linux/linux-4.19/drivers/net/ethernet/broadcom/
Dtg3.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Copyright (C) 2007-2016 Broadcom Corporation.
9 * Copyright (C) 2016-2017 Broadcom Limited.
21 #define TG3_BDINFO_HOST_ADDR 0x0UL /* 64-bit */
22 #define TG3_BDINFO_MAXLEN_FLAGS 0x8UL /* 32-bit */
27 #define TG3_BDINFO_NIC_ADDR 0xcUL /* 32-bit */
78 /* 0x04 --> 0x2c unused */
115 /* 0x30 --> 0x64 unused */
117 /* 0x66 --> 0x68 unused */
284 /* 0x94 --> 0x98 unused */
[all …]
/kernel/linux/linux-5.10/arch/parisc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 select ARCH_32BIT_OFF_T if !64BIT
31 select GENERIC_ATOMIC64 if !64BIT
62 select HAVE_DYNAMIC_FTRACE if $(cc-option,-fpatchable-function-entry=1,1)
69 The PA-RISC microprocessor is designed by Hewlett-Packard and used
71 and later HP3000 series). The PA-RISC Linux project home page is
85 default "arch/parisc/configs/generic-32bit_defconfig" if !64BIT
86 default "arch/parisc/configs/generic-64bit_defconfig" if 64BIT
119 # unless you want to implement ACPI on PA-RISC ... ;-)
136 default 3 if 64BIT && PARISC_PAGE_SIZE_4KB
[all …]
/kernel/linux/linux-4.19/arch/s390/include/asm/
Delf.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Derived from "include/asm-i386/elf.h"
13 #define R_390_8 1 /* Direct 8 bit. */
14 #define R_390_12 2 /* Direct 12 bit. */
15 #define R_390_16 3 /* Direct 16 bit. */
16 #define R_390_32 4 /* Direct 32 bit. */
17 #define R_390_PC32 5 /* PC relative 32 bit. */
18 #define R_390_GOT12 6 /* 12 bit GOT offset. */
19 #define R_390_GOT32 7 /* 32 bit GOT offset. */
20 #define R_390_PLT32 8 /* 32 bit PC relative PLT address. */
[all …]
/kernel/linux/linux-5.10/arch/s390/include/asm/
Delf.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Derived from "include/asm-i386/elf.h"
13 #define R_390_8 1 /* Direct 8 bit. */
14 #define R_390_12 2 /* Direct 12 bit. */
15 #define R_390_16 3 /* Direct 16 bit. */
16 #define R_390_32 4 /* Direct 32 bit. */
17 #define R_390_PC32 5 /* PC relative 32 bit. */
18 #define R_390_GOT12 6 /* 12 bit GOT offset. */
19 #define R_390_GOT32 7 /* 32 bit GOT offset. */
20 #define R_390_PLT32 8 /* 32 bit PC relative PLT address. */
[all …]
/kernel/linux/linux-5.10/drivers/acpi/acpica/
Dtbfadt.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: tbfadt - FADT table utilities
6 * Copyright (C) 2000 - 2020, Intel Corp.
143 * PARAMETERS: generic_address - GAS struct to be initialized
144 * space_id - ACPI Space ID for this register
145 * byte_width - Width of this register
146 * address - Address of the register
147 * register_name - ASCII name of the ACPI register
166 * Bit width field in the GAS is only one byte long, 255 max. in acpi_tb_init_generic_address()
178 "%s - 32-bit FADT register is too long (%u bytes, %u bits) " in acpi_tb_init_generic_address()
[all …]
/kernel/linux/linux-4.19/drivers/acpi/acpica/
Dtbfadt.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: tbfadt - FADT table utilities
6 * Copyright (C) 2000 - 2018, Intel Corp.
143 * PARAMETERS: generic_address - GAS struct to be initialized
144 * space_id - ACPI Space ID for this register
145 * byte_width - Width of this register
146 * address - Address of the register
147 * register_name - ASCII name of the ACPI register
166 * Bit width field in the GAS is only one byte long, 255 max. in acpi_tb_init_generic_address()
178 "%s - 32-bit FADT register is too long (%u bytes, %u bits) " in acpi_tb_init_generic_address()
[all …]
/kernel/linux/linux-4.19/arch/parisc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
29 select GENERIC_ATOMIC64 if !64BIT
58 The PA-RISC microprocessor is designed by Hewlett-Packard and used
60 and later HP3000 series). The PA-RISC Linux project home page is
61 at <http://www.parisc-linux.org/>.
109 # unless you want to implement ACPI on PA-RISC ... ;-)
126 default 3 if 64BIT && PARISC_PAGE_SIZE_4KB
141 ---help---
144 that can run on all 32-bit PA CPUs (albeit not optimally fast),
147 Specifying "PA8000" here will allow you to select a 64-bit kernel
[all …]

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