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/kernel/linux/linux-5.10/drivers/clk/mmp/
Dclk-apmu.c31 struct clk_apmu *apmu = to_clk_apmu(hw); in clk_apmu_enable() local
35 if (apmu->lock) in clk_apmu_enable()
36 spin_lock_irqsave(apmu->lock, flags); in clk_apmu_enable()
38 data = readl_relaxed(apmu->base) | apmu->enable_mask; in clk_apmu_enable()
39 writel_relaxed(data, apmu->base); in clk_apmu_enable()
41 if (apmu->lock) in clk_apmu_enable()
42 spin_unlock_irqrestore(apmu->lock, flags); in clk_apmu_enable()
49 struct clk_apmu *apmu = to_clk_apmu(hw); in clk_apmu_disable() local
53 if (apmu->lock) in clk_apmu_disable()
54 spin_lock_irqsave(apmu->lock, flags); in clk_apmu_disable()
[all …]
DMakefile6 obj-y += clk-apbc.o clk-apmu.o clk-frac.o clk-mix.o clk-gate.o clk.o
Dclk-of-pxa1928.c236 pr_err("failed to map apmu registers\n"); in pxa1928_apmu_clk_init()
245 CLK_OF_DECLARE(pxa1928_apmu_clk, "marvell,pxa1928-apmu", pxa1928_apmu_clk_init);
/kernel/linux/linux-4.19/drivers/clk/mmp/
Dclk-apmu.c31 struct clk_apmu *apmu = to_clk_apmu(hw); in clk_apmu_enable() local
35 if (apmu->lock) in clk_apmu_enable()
36 spin_lock_irqsave(apmu->lock, flags); in clk_apmu_enable()
38 data = readl_relaxed(apmu->base) | apmu->enable_mask; in clk_apmu_enable()
39 writel_relaxed(data, apmu->base); in clk_apmu_enable()
41 if (apmu->lock) in clk_apmu_enable()
42 spin_unlock_irqrestore(apmu->lock, flags); in clk_apmu_enable()
49 struct clk_apmu *apmu = to_clk_apmu(hw); in clk_apmu_disable() local
53 if (apmu->lock) in clk_apmu_disable()
54 spin_lock_irqsave(apmu->lock, flags); in clk_apmu_disable()
[all …]
DMakefile6 obj-y += clk-apbc.o clk-apmu.o clk-frac.o clk-mix.o clk-gate.o clk.o
Dclk-of-pxa1928.c237 pr_err("failed to map apmu registers\n"); in pxa1928_apmu_clk_init()
246 CLK_OF_DECLARE(pxa1928_apmu_clk, "marvell,pxa1928-apmu", pxa1928_apmu_clk_init);
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/power/
Drenesas,apmu.txt3 Renesas R-Car and RZ/G1 SoCs utilize one or more APMU hardware units
8 - compatible: Should be "renesas,<soctype>-apmu", "renesas,apmu" as fallback.
10 - "renesas,r8a7743-apmu" (RZ/G1M)
11 - "renesas,r8a7745-apmu" (RZ/G1E)
12 - "renesas,r8a7790-apmu" (R-Car H2)
13 - "renesas,r8a7791-apmu" (R-Car M2-W)
14 - "renesas,r8a7792-apmu" (R-Car V2H)
15 - "renesas,r8a7793-apmu" (R-Car M2-N)
16 - "renesas,r8a7794-apmu" (R-Car E2)
18 - reg: Base address and length of the I/O registers used by the APMU.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/
Drenesas,apmu.yaml4 $id: "http://devicetree.org/schemas/power/renesas,apmu.yaml#"
14 Renesas R-Car Gen2 and RZ/G1 SoCs utilize one or more APMU hardware units for
21 - renesas,r8a7742-apmu # RZ/G1H
22 - renesas,r8a7743-apmu # RZ/G1M
23 - renesas,r8a7744-apmu # RZ/G1N
24 - renesas,r8a7745-apmu # RZ/G1E
25 - renesas,r8a77470-apmu # RZ/G1C
26 - renesas,r8a7790-apmu # R-Car H2
27 - renesas,r8a7791-apmu # R-Car M2-W
28 - renesas,r8a7792-apmu # R-Car V2H
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dmarvell,pxa1928.txt5 blocks called APMU, MPMU, and APBC roughly corresponding to internal buses.
10 - "marvell,pxa1928-apmu" - APMU controller compatible
Dmarvell,mmp2-clock.yaml30 - description: APMU register region
36 - const: apmu
65 reg-names = "mpmu", "apmu", "apbc";
Dmarvell,pxa168.txt13 "mpmu", "apmu", "apbc". So three reg spaces need to be defined.
Dmarvell,pxa910.txt13 "mpmu", "apmu", "apbc", "apbcp". So four reg spaces need to be defined.
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/clock/
Dmarvell,pxa1928.txt5 blocks called APMU, MPMU, and APBC roughly corresponding to internal buses.
10 - "marvell,pxa1928-apmu" - APMU controller compatible
Dmarvell,mmp2.txt13 "mpmu", "apmu", "apbc". So three reg spaces need to be defined.
Dmarvell,pxa168.txt13 "mpmu", "apmu", "apbc". So three reg spaces need to be defined.
Dmarvell,pxa910.txt13 "mpmu", "apmu", "apbc", "apbcp". So four reg spaces need to be defined.
/kernel/linux/linux-5.10/arch/arm/mach-shmobile/
Dplatsmp-apmu.c3 * SMP support for SoCs with APMU
51 /* wait for APMU to finish */ in apmu_power_on()
120 /* Select next sleep mode using the APMU */ in shmobile_smp_apmu_cpu_shutdown()
195 pr_debug("apmu ioremap %d %d %pr\n", cpu, bit, res); in apmu_init_cpu()
204 { .compatible = "renesas,apmu" },
285 CPU_METHOD_OF_DECLARE(shmobile_smp_apmu, "renesas,apmu", &apmu_smp_ops);
DMakefile23 obj-$(CONFIG_ARCH_RCAR_GEN2) += setup-rcar-gen2.o platsmp-apmu.o $(cpu-y)
31 smp-$(CONFIG_ARCH_RCAR_GEN2) += headsmp-apmu.o
Dheadsmp-apmu.S3 * SMP support for APMU based systems with Cortex A7/A15
/kernel/linux/linux-4.19/arch/arm/mach-shmobile/
Dplatsmp-apmu.c3 * SMP support for SoCs with APMU
51 /* wait for APMU to finish */ in apmu_power_on()
120 /* Select next sleep mode using the APMU */ in shmobile_smp_apmu_cpu_shutdown()
195 pr_debug("apmu ioremap %d %d %pr\n", cpu, bit, res); in apmu_init_cpu()
204 { .compatible = "renesas,apmu" },
285 CPU_METHOD_OF_DECLARE(shmobile_smp_apmu, "renesas,apmu", &apmu_smp_ops);
DMakefile22 obj-$(CONFIG_ARCH_RCAR_GEN2) += setup-rcar-gen2.o platsmp-apmu.o $(cpu-y)
30 smp-$(CONFIG_ARCH_RCAR_GEN2) += headsmp-apmu.o
Dheadsmp-apmu.S3 * SMP support for APMU based systems with Cortex A7/A15
/kernel/linux/linux-4.19/arch/arm/mach-mmp/
Dclock.h21 uint32_t enable_val; /* value for clock enable (APMU) */
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dr8a7792.dtsi47 enable-method = "renesas,apmu";
313 apmu@e6152000 {
314 compatible = "renesas,r8a7792-apmu", "renesas,apmu";
Dpxa168.dtsi153 reg-names = "mpmu", "apmu", "apbc";

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