Searched +full:address +full:- +full:aligned (Results 1 – 25 of 1060) sorted by relevance
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| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/ |
| D | ia_css_env.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
26 * CSS-API host-code by the environment in which the CSS-API code runs.
52 /** Store an 8 bit value into an address in the CSS HW address space.
53 The address must be an 8 bit aligned address. */
55 /** Store a 16 bit value into an address in the CSS HW address space.
56 The address must be a 16 bit aligned address. */
58 /** Store a 32 bit value into an address in the CSS HW address space.
59 The address must be a 32 bit aligned address. */
61 /** Load an 8 bit value from an address in the CSS HW address
62 space. The address must be an 8 bit aligned address. */
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| /kernel/linux/linux-4.19/arch/sparc/include/asm/ |
| D | hypervisor.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
16 * -----------------------------------------------
23 * -----------------------------------------------
25 * The second type are "hyper-fast traps" which encode the function
27 * numbers > 0x80. The register usage for hyper-fast traps is as
30 * -----------------------------------------------
36 * -----------------------------------------------
44 * defined below. So, for example, if a hyper-fast trap takes
49 * is invalid, HV_EBADTRAP will be returned in %o0. Also, all 64-bits
63 #define HV_ENORADDR 2 /* Invalid real address */
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| /kernel/linux/linux-5.10/arch/sparc/include/asm/ |
| D | hypervisor.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
16 * -----------------------------------------------
23 * -----------------------------------------------
25 * The second type are "hyper-fast traps" which encode the function
27 * numbers > 0x80. The register usage for hyper-fast traps is as
30 * -----------------------------------------------
36 * -----------------------------------------------
44 * defined below. So, for example, if a hyper-fast trap takes
49 * is invalid, HV_EBADTRAP will be returned in %o0. Also, all 64-bits
63 #define HV_ENORADDR 2 /* Invalid real address */
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| /kernel/linux/linux-4.19/arch/unicore32/mm/ |
| D | tlb-ucv2.S | 2 * linux/arch/unicore32/mm/tlb-ucv2.S
6 * Copyright (C) 2001-2010 GUAN Xue-tao
17 #include "proc-macros.S"
22 * Invalidate a range of TLB entries in the specified address space.
24 * - start - start address (may not be aligned)
25 * - end - end address (exclusive, may not be aligned)
26 * - vma - vma_struct describing address range
30 mov r0, r0 >> #PAGE_SHIFT @ align address
32 vma_vm_flags r2, r2 @ get vma->vm_flags
64 * - start - start address (may not be aligned)
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| /kernel/linux/linux-5.10/arch/arm/mm/ |
| D | tlb-v7.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/tlb-v7.S
5 * Copyright (C) 1997-2002 Russell King
14 #include <asm/asm-offsets.h>
17 #include "proc-macros.S"
22 * Invalidate a range of TLB entries in the specified address space.
24 * - start - start address (may not be aligned)
25 * - end - end address (exclusive, may not be aligned)
26 * - vma - vma_struct describing address range
29 * - the "Invalidate single entry" instruction will invalidate
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| D | tlb-v6.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/tlb-v6.S
5 * Copyright (C) 1997-2002 Russell King
12 #include <asm/asm-offsets.h>
16 #include "proc-macros.S"
23 * Invalidate a range of TLB entries in the specified address space.
25 * - start - start address (may not be aligned)
26 * - end - end address (exclusive, may not be aligned)
27 * - vma - vma_struct describing address range
30 * - the "Invalidate single entry" instruction will invalidate
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| /kernel/linux/linux-4.19/arch/alpha/lib/ |
| D | ev6-memset.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memset.S
8 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
13 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
15 * E - either cluster
16 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
17 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
48 * undertake a major re-write to interleave the constant materialization
49 * with other parts of the fall-through code. This is important, even
58 addq $18,$16,$6 # E : max address to write to
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| /kernel/linux/linux-5.10/arch/alpha/lib/ |
| D | ev6-memset.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memset.S
8 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
13 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
15 * E - either cluster
16 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
17 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
48 * undertake a major re-write to interleave the constant materialization
49 * with other parts of the fall-through code. This is important, even
58 addq $18,$16,$6 # E : max address to write to
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| /kernel/linux/linux-5.10/arch/xtensa/lib/ |
| D | checksum.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
29 * This function assumes 2- or 4-byte alignment. Other alignments will fail!
32 /* ONES_ADD converts twos-complement math to ones-complement. */
44 * is aligned on either a 2-byte or 4-byte boundary.
48 bnez a5, 8f /* branch if 2-byte aligned */
49 /* Fall-through on common case, 4-byte alignment */
51 srli a5, a3, 5 /* 32-byte chunks */
57 add a5, a5, a2 /* a5 = end of last 32-byte chunk */
81 extui a5, a3, 2, 3 /* remaining 4-byte chunks */
87 add a5, a5, a2 /* a5 = end of last 4-byte chunk */
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| /kernel/linux/linux-4.19/arch/arm/mm/ |
| D | tlb-v6.S | 2 * linux/arch/arm/mm/tlb-v6.S
4 * Copyright (C) 1997-2002 Russell King
15 #include <asm/asm-offsets.h>
19 #include "proc-macros.S"
26 * Invalidate a range of TLB entries in the specified address space.
28 * - start - start address (may not be aligned)
29 * - end - end address (exclusive, may not be aligned)
30 * - vma - vma_struct describing address range
33 * - the "Invalidate single entry" instruction will invalidate
34 * both the I and the D TLBs on Harvard-style TLBs
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| D | tlb-v7.S | 2 * linux/arch/arm/mm/tlb-v7.S
4 * Copyright (C) 1997-2002 Russell King
17 #include <asm/asm-offsets.h>
20 #include "proc-macros.S"
25 * Invalidate a range of TLB entries in the specified address space.
27 * - start - start address (may not be aligned)
28 * - end - end address (exclusive, may not be aligned)
29 * - vma - vma_struct describing address range
32 * - the "Invalidate single entry" instruction will invalidate
33 * both the I and the D TLBs on Harvard-style TLBs
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| /kernel/linux/linux-4.19/drivers/gpu/drm/amd/amdgpu/ |
| D | psp_gfx_if.h | 43 GFX_CTRL_CMD_ID_ENABLE_INT = 0x00050000, /* enable PSP-to-Gfx interrupt */
44 GFX_CTRL_CMD_ID_DISABLE_INT = 0x00060000, /* disable PSP-to-Gfx interrupt */
51 /*-----------------------------------------------------------------------------
58 * SRBM-to-PSP mailbox registers (total 8 registers).
99 …hy_addr_lo; /* bits [31:0] of the GPU Virtual address of the TA binary (must be 4 KB aligne…
100 …uint32_t app_phy_addr_hi; /* bits [63:32] of the GPU Virtual address of the TA binar…
102 …_buf_phy_addr_lo; /* bits [31:0] of the GPU Virtual address of CMD buffer (must be 4 KB aligned…
103 …uint32_t cmd_buf_phy_addr_hi; /* bits [63:32] of the GPU Virtual address of CMD buffer */
125 … buf_phy_addr_lo; /* bits [31:0] of GPU Virtual address of the buffer (must be 4 KB aligned…
126 uint32_t buf_phy_addr_hi; /* bits [63:32] of GPU Virtual address of the buffer */
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| /kernel/linux/linux-4.19/arch/xtensa/lib/ |
| D | checksum.S | 33 * This function assumes 2- or 4-byte alignment. Other alignments will fail!
36 /* ONES_ADD converts twos-complement math to ones-complement. */
48 * is aligned on either a 2-byte or 4-byte boundary.
52 bnez a5, 8f /* branch if 2-byte aligned */
53 /* Fall-through on common case, 4-byte alignment */
55 srli a5, a3, 5 /* 32-byte chunks */
61 add a5, a5, a2 /* a5 = end of last 32-byte chunk */
85 extui a5, a3, 2, 3 /* remaining 4-byte chunks */
91 add a5, a5, a2 /* a5 = end of last 4-byte chunk */
101 _bbci.l a3, 1, 5f /* remaining 2-byte chunk */
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| /kernel/linux/linux-5.10/sound/soc/fsl/ |
| D | fsl_dma.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * mpc8610-pcm.h - ALSA PCM interface for the Freescale MPC8610 SoC
15 __be32 clndar; /* Current link descriptor address register */
17 __be32 sar; /* Source address register */
19 __be32 dar; /* Destination address register */
21 __be32 enlndar; /* Next link descriptor extended address reg */
22 __be32 nlndar; /* Next link descriptor address register */
25 __be32 clsdar; /* Current list descriptor address register */
26 __be32 enlsdar; /* Next list descriptor extended address reg */
27 __be32 nlsdar; /* Next list descriptor address register */
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| /kernel/linux/linux-4.19/sound/soc/fsl/ |
| D | fsl_dma.h | 2 * mpc8610-pcm.h - ALSA PCM interface for the Freescale MPC8610 SoC
18 __be32 clndar; /* Current link descriptor address register */
20 __be32 sar; /* Source address register */
22 __be32 dar; /* Destination address register */
24 __be32 enlndar; /* Next link descriptor extended address reg */
25 __be32 nlndar; /* Next link descriptor address register */
28 __be32 clsdar; /* Current list descriptor address register */
29 __be32 enlsdar; /* Next list descriptor extended address reg */
30 __be32 nlsdar; /* Next list descriptor address register */
77 /* ECLNDAR takes bits 32-36 of the CLNDAR register */
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| /kernel/linux/linux-5.10/arch/riscv/lib/ |
| D | uaccess.S | 2 #include <asm-generic/export.h>
23 /* Use word-oriented copy only if low-order bits match */
24 andi t0, a0, SZREG-1
25 andi t1, a1, SZREG-1
28 addi t0, a1, SZREG-1
29 andi t1, a3, ~(SZREG-1)
30 andi t0, t0, ~(SZREG-1)
32 * a3: terminal address of source region
33 * t0: lowest XLEN-aligned address in source
34 * t1: highest XLEN-aligned address in source
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| /kernel/linux/linux-4.19/arch/riscv/lib/ |
| D | uaccess.S | 24 /* Use word-oriented copy only if low-order bits match */
25 andi t0, a0, SZREG-1
26 andi t1, a1, SZREG-1
29 addi t0, a1, SZREG-1
30 andi t1, a3, ~(SZREG-1)
31 andi t0, t0, ~(SZREG-1)
33 * a3: terminal address of source region
34 * t0: lowest XLEN-aligned address in source
35 * t1: highest XLEN-aligned address in source
78 addi t0, a0, SZREG-1
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| /kernel/liteos_m/arch/risc-v/nuclei/gcc/nmsis/Core/Include/ |
| D | core_feature_base.h | 4 * SPDX-License-Identifier: Apache-2.0
10 * www.apache.org/licenses/LICENSE-2.0
47 /** \brief Type of Control and Status Register(CSR), depends on the XLEN defined in RISC-V */
69 …rv_csr_t b:1; /*!< bit: 1 Tentatively reserved for Bit-Manipulation…
71 …rv_csr_t d:1; /*!< bit: 3 Double-precision floating-point extension…
73 …rv_csr_t f:1; /*!< bit: 5 Single-precision floating-point extension…
79 … /*!< bit: 11 Tentatively reserved for Decimal Floating-Point extension */
81 rv_csr_t n:1; /*!< bit: 13 User-level interrupts supported */
83 …rv_csr_t p:1; /*!< bit: 15 Tentatively reserved for Packed-SIMD exte…
84 …rv_csr_t q:1; /*!< bit: 16 Quad-precision floating-point extension …
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| /kernel/linux/linux-4.19/arch/unicore32/include/asm/ |
| D | tlbflush.h | 6 * Copyright (C) 2001-2010 GUAN Xue-tao
27 * The arch/unicore/mm/tlb-*.S files implement these methods.
40 * Invalidate all TLB entries in a particular address
42 * - mm - mm_struct describing address space
47 * address space.
48 * - mm - mm_struct describing address space
49 * - start - start address (may not be aligned)
50 * - end - end address (exclusive, may not be aligned)
54 * Invalidate the specified page in the specified address range.
55 * - vaddr - virtual address (may not be aligned)
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| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | vhost_types.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 /* Userspace interface for in-kernel virtio accelerators. */
26 int fd; /* Pass -1 to unbind from file. */
35 /* Whether log address is valid. If set enables logging. */
40 /* Used structure address. Must be 32 bit aligned */
42 /* Available structure address. Must be 16 bit aligned */
46 * address. Address must be 32 bit aligned. */
104 /* All region addresses and sizes must be 4K aligned. */
116 * Used by QEMU userspace to ensure a consistent vhost-scsi ABI.
118 * ABI Rev 0: July 2012 version starting point for v3.6-rc merge candidate +
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| /kernel/linux/linux-4.19/arch/s390/include/asm/ |
| D | qdio.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
18 #define QDIO_MAX_BUFFERS_MASK (QDIO_MAX_BUFFERS_PER_Q - 1)
27 * struct qdesfmt0 - queue descriptor, format 0
28 * @sliba: storage list information block address
29 * @sla: storage list address
30 * @slsba: storage list state block address
51 * struct qdr - queue description record (QDR)
59 * @qiba: queue information block address
91 * struct qib - queue information block (QIB)
96 * @isliba: absolute address of first input SLIB
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| /kernel/linux/linux-4.19/Documentation/sparc/oradax/ |
| D | dax-hv-api.txt | 3 Publication date 2017-09-25 08:21
5 Extracted via "pdftotext -f 547 -l 572 -layout sun4v_20170925.pdf"
16 live-migration and other system management activities.
20 …high speed processoring of database-centric operations. The coprocessors may support one or more of
28 …e Completion Area and, unless execution order is specifically restricted through the use of serial-
45 …device node in the guest MD (Section 8.24.17, “Database Analytics Accelerators (DAX) virtual-device
51 36.1.1.1. "ORCL,sun4v-dax" Device Compatibility
54 • No-op/Sync
81 36.1.1.2. "ORCL,sun4v-dax-fc" Device Compatibility
82 … "ORCL,sun4v-dax-fc" is compatible with the "ORCL,sun4v-dax" interface, and includes additional CCB
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| /kernel/linux/linux-5.10/Documentation/sparc/oradax/ |
| D | dax-hv-api.txt | 3 Publication date 2017-09-25 08:21
5 Extracted via "pdftotext -f 547 -l 572 -layout sun4v_20170925.pdf"
16 live-migration and other system management activities.
20 …high speed processoring of database-centric operations. The coprocessors may support one or more of
28 …e Completion Area and, unless execution order is specifically restricted through the use of serial-
45 …device node in the guest MD (Section 8.24.17, “Database Analytics Accelerators (DAX) virtual-device
51 36.1.1.1. "ORCL,sun4v-dax" Device Compatibility
54 • No-op/Sync
81 36.1.1.2. "ORCL,sun4v-dax-fc" Device Compatibility
82 … "ORCL,sun4v-dax-fc" is compatible with the "ORCL,sun4v-dax" interface, and includes additional CCB
[all …]
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| /kernel/linux/linux-5.10/arch/s390/include/asm/ |
| D | qdio.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
18 #define QDIO_MAX_BUFFERS_MASK (QDIO_MAX_BUFFERS_PER_Q - 1)
28 * struct qdesfmt0 - queue descriptor, format 0
29 * @sliba: absolute address of storage list information block
30 * @sla: absolute address of storage list
31 * @slsba: absolute address of storage list state block
52 * struct qdr - queue description record (QDR)
59 * @qiba: absolute address of queue information block
90 * struct qib - queue information block (QIB)
95 * @isliba: absolute address of first input SLIB
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| /kernel/linux/linux-4.19/Documentation/virtual/kvm/devices/ |
| D | arm-vgic.txt | 9 controller, requiring emulated user-space devices to inject interrupts to the
14 device and guest ITS devices, see arm-vgic-v3.txt. It is not possible to
21 KVM_VGIC_V2_ADDR_TYPE_DIST (rw, 64-bit)
22 Base address in the guest physical address space of the GIC distributor
24 This address needs to be 4K aligned and the region covers 4 KByte.
26 KVM_VGIC_V2_ADDR_TYPE_CPU (rw, 64-bit)
27 Base address in the guest physical address space of the GIC virtual cpu
29 This address needs to be 4K aligned and the region covers 4 KByte.
31 -E2BIG: Address outside of addressable IPA range
32 -EINVAL: Incorrectly aligned address
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