| /kernel/linux/linux-5.10/drivers/media/platform/exynos-gsc/ |
| D | gsc-regs.c | 22 u32 cfg; in gsc_wait_reset() local
25 cfg = readl(dev->regs + GSC_SW_RESET); in gsc_wait_reset()
26 if (!cfg) in gsc_wait_reset()
36 u32 cfg; in gsc_hw_set_frm_done_irq_mask() local
38 cfg = readl(dev->regs + GSC_IRQ); in gsc_hw_set_frm_done_irq_mask()
40 cfg |= GSC_IRQ_FRMDONE_MASK; in gsc_hw_set_frm_done_irq_mask()
42 cfg &= ~GSC_IRQ_FRMDONE_MASK; in gsc_hw_set_frm_done_irq_mask()
43 writel(cfg, dev->regs + GSC_IRQ); in gsc_hw_set_frm_done_irq_mask()
48 u32 cfg; in gsc_hw_set_gsc_irq_enable() local
50 cfg = readl(dev->regs + GSC_IRQ); in gsc_hw_set_gsc_irq_enable()
[all …]
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| /kernel/linux/linux-4.19/drivers/media/platform/exynos-gsc/ |
| D | gsc-regs.c | 26 u32 cfg; in gsc_wait_reset() local
29 cfg = readl(dev->regs + GSC_SW_RESET); in gsc_wait_reset()
30 if (!cfg) in gsc_wait_reset()
40 u32 cfg; in gsc_hw_set_frm_done_irq_mask() local
42 cfg = readl(dev->regs + GSC_IRQ); in gsc_hw_set_frm_done_irq_mask()
44 cfg |= GSC_IRQ_FRMDONE_MASK; in gsc_hw_set_frm_done_irq_mask()
46 cfg &= ~GSC_IRQ_FRMDONE_MASK; in gsc_hw_set_frm_done_irq_mask()
47 writel(cfg, dev->regs + GSC_IRQ); in gsc_hw_set_frm_done_irq_mask()
52 u32 cfg; in gsc_hw_set_gsc_irq_enable() local
54 cfg = readl(dev->regs + GSC_IRQ); in gsc_hw_set_gsc_irq_enable()
[all …]
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| /kernel/linux/linux-5.10/drivers/media/platform/exynos4-is/ |
| D | fimc-reg.c | 21 u32 cfg; in fimc_hw_reset() local
23 cfg = readl(dev->regs + FIMC_REG_CISRCFMT); in fimc_hw_reset()
24 cfg |= FIMC_REG_CISRCFMT_ITU601_8BIT; in fimc_hw_reset()
25 writel(cfg, dev->regs + FIMC_REG_CISRCFMT); in fimc_hw_reset()
28 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); in fimc_hw_reset()
29 cfg |= (FIMC_REG_CIGCTRL_SWRST | FIMC_REG_CIGCTRL_IRQ_LEVEL); in fimc_hw_reset()
30 writel(cfg, dev->regs + FIMC_REG_CIGCTRL); in fimc_hw_reset()
33 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); in fimc_hw_reset()
34 cfg &= ~FIMC_REG_CIGCTRL_SWRST; in fimc_hw_reset()
35 writel(cfg, dev->regs + FIMC_REG_CIGCTRL); in fimc_hw_reset()
[all …]
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| D | fimc-lite-reg.c | 23 u32 cfg; in flite_hw_reset() local
25 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
26 cfg |= FLITE_REG_CIGCTRL_SWRST_REQ; in flite_hw_reset()
27 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
30 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
31 if (cfg & FLITE_REG_CIGCTRL_SWRST_RDY) in flite_hw_reset()
36 cfg |= FLITE_REG_CIGCTRL_SWRST; in flite_hw_reset()
37 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
42 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS); in flite_hw_clear_pending_irq() local
43 cfg &= ~FLITE_REG_CISTATUS_IRQ_CAM; in flite_hw_clear_pending_irq()
[all …]
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| /kernel/linux/linux-4.19/drivers/media/platform/exynos4-is/ |
| D | fimc-reg.c | 24 u32 cfg; in fimc_hw_reset() local
26 cfg = readl(dev->regs + FIMC_REG_CISRCFMT); in fimc_hw_reset()
27 cfg |= FIMC_REG_CISRCFMT_ITU601_8BIT; in fimc_hw_reset()
28 writel(cfg, dev->regs + FIMC_REG_CISRCFMT); in fimc_hw_reset()
31 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); in fimc_hw_reset()
32 cfg |= (FIMC_REG_CIGCTRL_SWRST | FIMC_REG_CIGCTRL_IRQ_LEVEL); in fimc_hw_reset()
33 writel(cfg, dev->regs + FIMC_REG_CIGCTRL); in fimc_hw_reset()
36 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); in fimc_hw_reset()
37 cfg &= ~FIMC_REG_CIGCTRL_SWRST; in fimc_hw_reset()
38 writel(cfg, dev->regs + FIMC_REG_CIGCTRL); in fimc_hw_reset()
[all …]
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| D | fimc-lite-reg.c | 26 u32 cfg; in flite_hw_reset() local
28 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
29 cfg |= FLITE_REG_CIGCTRL_SWRST_REQ; in flite_hw_reset()
30 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
33 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
34 if (cfg & FLITE_REG_CIGCTRL_SWRST_RDY) in flite_hw_reset()
39 cfg |= FLITE_REG_CIGCTRL_SWRST; in flite_hw_reset()
40 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
45 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS); in flite_hw_clear_pending_irq() local
46 cfg &= ~FLITE_REG_CISTATUS_IRQ_CAM; in flite_hw_clear_pending_irq()
[all …]
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| /kernel/linux/linux-5.10/drivers/phy/ |
| D | phy-core-mipi-dphy.c | 25 struct phy_configure_opts_mipi_dphy *cfg) in phy_mipi_dphy_get_default_config() argument
30 if (!cfg) in phy_mipi_dphy_get_default_config()
39 cfg->clk_miss = 0; in phy_mipi_dphy_get_default_config()
40 cfg->clk_post = 60000 + 52 * ui; in phy_mipi_dphy_get_default_config()
41 cfg->clk_pre = 8000; in phy_mipi_dphy_get_default_config()
42 cfg->clk_prepare = 38000; in phy_mipi_dphy_get_default_config()
43 cfg->clk_settle = 95000; in phy_mipi_dphy_get_default_config()
44 cfg->clk_term_en = 0; in phy_mipi_dphy_get_default_config()
45 cfg->clk_trail = 60000; in phy_mipi_dphy_get_default_config()
46 cfg->clk_zero = 262000; in phy_mipi_dphy_get_default_config()
[all …]
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| /kernel/linux/linux-4.19/drivers/media/platform/s3c-camif/ |
| D | camif-regs.c | 21 u32 cfg; in camif_hw_reset() local
23 cfg = camif_read(camif, S3C_CAMIF_REG_CISRCFMT); in camif_hw_reset()
24 cfg |= CISRCFMT_ITU601_8BIT; in camif_hw_reset()
25 camif_write(camif, S3C_CAMIF_REG_CISRCFMT, cfg); in camif_hw_reset()
28 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); in camif_hw_reset()
29 cfg |= CIGCTRL_SWRST; in camif_hw_reset()
31 cfg |= CIGCTRL_IRQ_LEVEL; in camif_hw_reset()
32 camif_write(camif, S3C_CAMIF_REG_CIGCTRL, cfg); in camif_hw_reset()
35 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); in camif_hw_reset()
36 cfg &= ~CIGCTRL_SWRST; in camif_hw_reset()
[all …]
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| /kernel/linux/linux-5.10/drivers/media/platform/s3c-camif/ |
| D | camif-regs.c | 18 u32 cfg; in camif_hw_reset() local
20 cfg = camif_read(camif, S3C_CAMIF_REG_CISRCFMT); in camif_hw_reset()
21 cfg |= CISRCFMT_ITU601_8BIT; in camif_hw_reset()
22 camif_write(camif, S3C_CAMIF_REG_CISRCFMT, cfg); in camif_hw_reset()
25 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); in camif_hw_reset()
26 cfg |= CIGCTRL_SWRST; in camif_hw_reset()
28 cfg |= CIGCTRL_IRQ_LEVEL; in camif_hw_reset()
29 camif_write(camif, S3C_CAMIF_REG_CIGCTRL, cfg); in camif_hw_reset()
32 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); in camif_hw_reset()
33 cfg &= ~CIGCTRL_SWRST; in camif_hw_reset()
[all …]
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| /kernel/linux/linux-5.10/tools/testing/selftests/bpf/prog_tests/ |
| D | core_extern.c | 21 #define CFG "CONFIG_BPF_SYSCALL=n\n" macro
25 const char *cfg; member
32 .cfg = "CONFIG_BPF_SYSCALL=n\n"
53 { .name = "tristate (y)", .cfg = CFG"CONFIG_TRISTATE=y\n",
55 { .name = "tristate (n)", .cfg = CFG"CONFIG_TRISTATE=n\n",
57 { .name = "tristate (m)", .cfg = CFG"CONFIG_TRISTATE=m\n",
59 { .name = "tristate (int)", .fails = 1, .cfg = CFG"CONFIG_TRISTATE=1" },
60 { .name = "tristate (bad)", .fails = 1, .cfg = CFG"CONFIG_TRISTATE=M" },
62 { .name = "bool (y)", .cfg = CFG"CONFIG_BOOL=y\n",
64 { .name = "bool (n)", .cfg = CFG"CONFIG_BOOL=n\n",
[all …]
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| /kernel/linux/linux-4.19/drivers/pci/ |
| D | ecam.c | 31 struct pci_config_window *cfg; in pci_ecam_create() local
39 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL); in pci_ecam_create()
40 if (!cfg) in pci_ecam_create()
43 cfg->parent = dev; in pci_ecam_create()
44 cfg->ops = ops; in pci_ecam_create()
45 cfg->busr.start = busr->start; in pci_ecam_create()
46 cfg->busr.end = busr->end; in pci_ecam_create()
47 cfg->busr.flags = IORESOURCE_BUS; in pci_ecam_create()
48 bus_range = resource_size(&cfg->busr); in pci_ecam_create()
52 cfg->busr.end = busr->start + bus_range - 1; in pci_ecam_create()
[all …]
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| /kernel/linux/linux-5.10/drivers/pci/ |
| D | ecam.c | 31 struct pci_config_window *cfg; in pci_ecam_create() local
39 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL); in pci_ecam_create()
40 if (!cfg) in pci_ecam_create()
43 cfg->parent = dev; in pci_ecam_create()
44 cfg->ops = ops; in pci_ecam_create()
45 cfg->busr.start = busr->start; in pci_ecam_create()
46 cfg->busr.end = busr->end; in pci_ecam_create()
47 cfg->busr.flags = IORESOURCE_BUS; in pci_ecam_create()
48 bus_range = resource_size(&cfg->busr); in pci_ecam_create()
52 cfg->busr.end = busr->start + bus_range - 1; in pci_ecam_create()
[all …]
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| /kernel/linux/linux-4.19/sound/pci/hda/ |
| D | hda_auto_parser.c | 59 /* add the found input-pin to the cfg->inputs[] table */
60 static void add_auto_cfg_input_pin(struct hda_codec *codec, struct auto_pin_cfg *cfg, in add_auto_cfg_input_pin() argument
63 if (cfg->num_inputs < AUTO_CFG_MAX_INS) { in add_auto_cfg_input_pin()
64 cfg->inputs[cfg->num_inputs].pin = nid; in add_auto_cfg_input_pin()
65 cfg->inputs[cfg->num_inputs].type = type; in add_auto_cfg_input_pin()
66 cfg->inputs[cfg->num_inputs].has_boost_on_pin = in add_auto_cfg_input_pin()
68 cfg->num_inputs++; in add_auto_cfg_input_pin()
160 * Parse all pin widgets and store the useful pin nids to cfg
177 struct auto_pin_cfg *cfg, in snd_hda_parse_pin_defcfg() argument
183 struct auto_out_pin line_out[ARRAY_SIZE(cfg->line_out_pins)]; in snd_hda_parse_pin_defcfg()
[all …]
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| /kernel/linux/linux-5.10/sound/pci/hda/ |
| D | hda_auto_parser.c | 55 /* add the found input-pin to the cfg->inputs[] table */
56 static void add_auto_cfg_input_pin(struct hda_codec *codec, struct auto_pin_cfg *cfg, in add_auto_cfg_input_pin() argument
59 if (cfg->num_inputs < AUTO_CFG_MAX_INS) { in add_auto_cfg_input_pin()
60 cfg->inputs[cfg->num_inputs].pin = nid; in add_auto_cfg_input_pin()
61 cfg->inputs[cfg->num_inputs].type = type; in add_auto_cfg_input_pin()
62 cfg->inputs[cfg->num_inputs].has_boost_on_pin = in add_auto_cfg_input_pin()
64 cfg->num_inputs++; in add_auto_cfg_input_pin()
156 * Parse all pin widgets and store the useful pin nids to cfg
173 struct auto_pin_cfg *cfg, in snd_hda_parse_pin_defcfg() argument
179 struct auto_out_pin line_out[ARRAY_SIZE(cfg->line_out_pins)]; in snd_hda_parse_pin_defcfg()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/exynos/ |
| D | exynos_drm_fimc.c | 141 u32 cfg; in fimc_sw_reset() local
144 cfg = fimc_read(ctx, EXYNOS_CISTATUS); in fimc_sw_reset()
145 if (EXYNOS_CISTATUS_GET_ENVID_STATUS(cfg)) in fimc_sw_reset()
166 u32 cfg; in fimc_set_type_ctrl() local
168 cfg = fimc_read(ctx, EXYNOS_CIGCTRL); in fimc_set_type_ctrl()
169 cfg &= ~(EXYNOS_CIGCTRL_TESTPATTERN_MASK | in fimc_set_type_ctrl()
176 cfg |= (EXYNOS_CIGCTRL_SELCAM_ITU_A | in fimc_set_type_ctrl()
181 fimc_write(ctx, cfg, EXYNOS_CIGCTRL); in fimc_set_type_ctrl()
186 u32 cfg; in fimc_handle_jpeg() local
190 cfg = fimc_read(ctx, EXYNOS_CIGCTRL); in fimc_handle_jpeg()
[all …]
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| /kernel/linux/linux-4.19/drivers/gpu/drm/exynos/ |
| D | exynos_drm_fimc.c | 143 u32 cfg; in fimc_sw_reset() local
146 cfg = fimc_read(ctx, EXYNOS_CISTATUS); in fimc_sw_reset()
147 if (EXYNOS_CISTATUS_GET_ENVID_STATUS(cfg)) in fimc_sw_reset()
168 u32 cfg; in fimc_set_type_ctrl() local
170 cfg = fimc_read(ctx, EXYNOS_CIGCTRL); in fimc_set_type_ctrl()
171 cfg &= ~(EXYNOS_CIGCTRL_TESTPATTERN_MASK | in fimc_set_type_ctrl()
178 cfg |= (EXYNOS_CIGCTRL_SELCAM_ITU_A | in fimc_set_type_ctrl()
183 fimc_write(ctx, cfg, EXYNOS_CIGCTRL); in fimc_set_type_ctrl()
188 u32 cfg; in fimc_handle_jpeg() local
192 cfg = fimc_read(ctx, EXYNOS_CIGCTRL); in fimc_handle_jpeg()
[all …]
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| /kernel/linux/linux-4.19/drivers/gpu/drm/msm/hdmi/ |
| D | hdmi_phy_8996.c | 226 struct hdmi_8996_phy_pll_reg_cfg *cfg) in pll_calculate() argument
293 cfg->com_svs_mode_clk_sel = 1; in pll_calculate()
295 cfg->com_svs_mode_clk_sel = 2; in pll_calculate()
297 cfg->com_hsclk_sel = (0x20 | pd.hsclk_divsel); in pll_calculate()
298 cfg->com_pll_cctrl_mode0 = cctrl; in pll_calculate()
299 cfg->com_pll_rctrl_mode0 = rctrl; in pll_calculate()
300 cfg->com_cp_ctrl_mode0 = cpctrl; in pll_calculate()
301 cfg->com_dec_start_mode0 = dec_start; in pll_calculate()
302 cfg->com_div_frac_start1_mode0 = (frac_start & 0xff); in pll_calculate()
303 cfg->com_div_frac_start2_mode0 = ((frac_start & 0xff00) >> 8); in pll_calculate()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/hdmi/ |
| D | hdmi_phy_8996.c | 219 struct hdmi_8996_phy_pll_reg_cfg *cfg) in pll_calculate() argument
286 cfg->com_svs_mode_clk_sel = 1; in pll_calculate()
288 cfg->com_svs_mode_clk_sel = 2; in pll_calculate()
290 cfg->com_hsclk_sel = (0x20 | pd.hsclk_divsel); in pll_calculate()
291 cfg->com_pll_cctrl_mode0 = cctrl; in pll_calculate()
292 cfg->com_pll_rctrl_mode0 = rctrl; in pll_calculate()
293 cfg->com_cp_ctrl_mode0 = cpctrl; in pll_calculate()
294 cfg->com_dec_start_mode0 = dec_start; in pll_calculate()
295 cfg->com_div_frac_start1_mode0 = (frac_start & 0xff); in pll_calculate()
296 cfg->com_div_frac_start2_mode0 = ((frac_start & 0xff00) >> 8); in pll_calculate()
[all …]
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| /kernel/linux/linux-4.19/arch/x86/pci/ |
| D | mmconfig-shared.c | 35 static void __init pci_mmconfig_remove(struct pci_mmcfg_region *cfg) in pci_mmconfig_remove() argument
37 if (cfg->res.parent) in pci_mmconfig_remove()
38 release_resource(&cfg->res); in pci_mmconfig_remove()
39 list_del(&cfg->list); in pci_mmconfig_remove()
40 kfree(cfg); in pci_mmconfig_remove()
45 struct pci_mmcfg_region *cfg, *tmp; in free_all_mmcfg() local
48 list_for_each_entry_safe(cfg, tmp, &pci_mmcfg_list, list) in free_all_mmcfg()
49 pci_mmconfig_remove(cfg); in free_all_mmcfg()
54 struct pci_mmcfg_region *cfg; in list_add_sorted() local
57 list_for_each_entry_rcu(cfg, &pci_mmcfg_list, list) { in list_add_sorted()
[all …]
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| /kernel/linux/linux-5.10/arch/x86/pci/ |
| D | mmconfig-shared.c | 36 static void __init pci_mmconfig_remove(struct pci_mmcfg_region *cfg) in pci_mmconfig_remove() argument
38 if (cfg->res.parent) in pci_mmconfig_remove()
39 release_resource(&cfg->res); in pci_mmconfig_remove()
40 list_del(&cfg->list); in pci_mmconfig_remove()
41 kfree(cfg); in pci_mmconfig_remove()
46 struct pci_mmcfg_region *cfg, *tmp; in free_all_mmcfg() local
49 list_for_each_entry_safe(cfg, tmp, &pci_mmcfg_list, list) in free_all_mmcfg()
50 pci_mmconfig_remove(cfg); in free_all_mmcfg()
55 struct pci_mmcfg_region *cfg; in list_add_sorted() local
58 list_for_each_entry_rcu(cfg, &pci_mmcfg_list, list, pci_mmcfg_lock_held()) { in list_add_sorted()
[all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/microchip/wilc1000/ |
| D | wlan_cfg.c | 140 struct wilc_cfg *cfg = &wl->cfg; in wilc_wlan_parse_response_frame() local
148 while (cfg->b[i].id != WID_NIL && cfg->b[i].id != wid) in wilc_wlan_parse_response_frame()
151 if (cfg->b[i].id == wid) in wilc_wlan_parse_response_frame()
152 cfg->b[i].val = info[4]; in wilc_wlan_parse_response_frame()
158 while (cfg->hw[i].id != WID_NIL && cfg->hw[i].id != wid) in wilc_wlan_parse_response_frame()
161 if (cfg->hw[i].id == wid) in wilc_wlan_parse_response_frame()
162 cfg->hw[i].val = get_unaligned_le16(&info[4]); in wilc_wlan_parse_response_frame()
168 while (cfg->w[i].id != WID_NIL && cfg->w[i].id != wid) in wilc_wlan_parse_response_frame()
171 if (cfg->w[i].id == wid) in wilc_wlan_parse_response_frame()
172 cfg->w[i].val = get_unaligned_le32(&info[4]); in wilc_wlan_parse_response_frame()
[all …]
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| /kernel/linux/linux-4.19/drivers/net/ethernet/cavium/liquidio/ |
| D | octeon_config.h | 121 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq) argument
122 #define CFG_GET_IQ_MAX_Q(cfg) ((cfg)->iq.max_iqs) argument
123 #define CFG_GET_IQ_PENDING_LIST_SIZE(cfg) ((cfg)->iq.pending_list_size) argument
124 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type) argument
125 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min) argument
126 #define CFG_GET_IQ_DB_TIMEOUT(cfg) ((cfg)->iq.db_timeout) argument
128 #define CFG_GET_IQ_INTR_PKT(cfg) ((cfg)->iq.iq_intr_pkt) argument
129 #define CFG_SET_IQ_INTR_PKT(cfg, val) (cfg)->iq.iq_intr_pkt = val argument
131 #define CFG_GET_OQ_MAX_Q(cfg) ((cfg)->oq.max_oqs) argument
132 #define CFG_GET_OQ_PKTS_PER_INTR(cfg) ((cfg)->oq.pkts_per_intr) argument
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/cavium/liquidio/ |
| D | octeon_config.h | 121 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq) argument
122 #define CFG_GET_IQ_MAX_Q(cfg) ((cfg)->iq.max_iqs) argument
123 #define CFG_GET_IQ_PENDING_LIST_SIZE(cfg) ((cfg)->iq.pending_list_size) argument
124 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type) argument
125 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min) argument
126 #define CFG_GET_IQ_DB_TIMEOUT(cfg) ((cfg)->iq.db_timeout) argument
128 #define CFG_GET_IQ_INTR_PKT(cfg) ((cfg)->iq.iq_intr_pkt) argument
129 #define CFG_SET_IQ_INTR_PKT(cfg, val) (cfg)->iq.iq_intr_pkt = val argument
131 #define CFG_GET_OQ_MAX_Q(cfg) ((cfg)->oq.max_oqs) argument
132 #define CFG_GET_OQ_PKTS_PER_INTR(cfg) ((cfg)->oq.pkts_per_intr) argument
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/marvell/octeontx2/af/ |
| D | cgx.c | 178 u64 cfg; in cgx_lmac_addr_set() local
181 /* memcpy(&cfg, mac_addr, 6); */ in cgx_lmac_addr_set()
183 cfg = mac2u64 (mac_addr); in cgx_lmac_addr_set()
186 cfg | CGX_DMAC_CAM_ADDR_ENABLE | ((u64)lmac_id << 49)); in cgx_lmac_addr_set()
188 cfg = cgx_read(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0); in cgx_lmac_addr_set()
189 cfg |= CGX_DMAC_CTL0_CAM_ENABLE; in cgx_lmac_addr_set()
190 cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg); in cgx_lmac_addr_set()
198 u64 cfg; in cgx_lmac_addr_get() local
200 cfg = cgx_read(cgx_dev, 0, CGXX_CMRX_RX_DMAC_CAM0 + lmac_id * 0x8); in cgx_lmac_addr_get()
201 return cfg & CGX_RX_DMAC_ADR_MASK; in cgx_lmac_addr_get()
[all …]
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| /kernel/linux/linux-4.19/drivers/scsi/cxlflash/ |
| D | main.c | 49 struct cxlflash_cfg *cfg = afu->parent; in process_cmd_err() local
50 struct device *dev = &cfg->dev->dev; in process_cmd_err()
166 struct cxlflash_cfg *cfg = afu->parent; in cmd_complete() local
167 struct device *dev = &cfg->dev->dev; in cmd_complete()
185 spin_lock_irqsave(&cfg->tmf_slock, lock_flags); in cmd_complete()
186 cfg->tmf_active = false; in cmd_complete()
187 wake_up_all_locked(&cfg->tmf_waitq); in cmd_complete()
188 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); in cmd_complete()
202 struct cxlflash_cfg *cfg = hwq->afu->parent; in flush_pending_cmds() local
222 spin_lock_irqsave(&cfg->tmf_slock, lock_flags); in flush_pending_cmds()
[all …]
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