| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/igc/ |
| D | igc_regs.h | 118 #define IGC_CRCERRS 0x04000 /* CRC Error Count - R/clr */
119 #define IGC_ALGNERRC 0x04004 /* Alignment Error Count - R/clr */
120 #define IGC_RXERRC 0x0400C /* Receive Error Count - R/clr */
121 #define IGC_MPC 0x04010 /* Missed Packet Count - R/clr */
122 #define IGC_SCC 0x04014 /* Single Collision Count - R/clr */
123 #define IGC_ECOL 0x04018 /* Excessive Collision Count - R/clr */
124 #define IGC_MCC 0x0401C /* Multiple Collision Count - R/clr */
125 #define IGC_LATECOL 0x04020 /* Late Collision Count - R/clr */
126 #define IGC_COLC 0x04028 /* Collision Count - R/clr */
127 #define IGC_RERC 0x0402C /* Receive Error Count - R/clr */
[all …]
|
| /kernel/linux/linux-4.19/drivers/net/ethernet/intel/e1000e/ |
| D | regs.h | 28 #define E1000_ICR 0x000C0 /* Interrupt Cause Read - R/clr */
117 #define E1000_CRCERRS 0x04000 /* CRC Error Count - R/clr */
118 #define E1000_ALGNERRC 0x04004 /* Alignment Error Count - R/clr */
119 #define E1000_SYMERRS 0x04008 /* Symbol Error Count - R/clr */
120 #define E1000_RXERRC 0x0400C /* Receive Error Count - R/clr */
121 #define E1000_MPC 0x04010 /* Missed Packet Count - R/clr */
122 #define E1000_SCC 0x04014 /* Single Collision Count - R/clr */
123 #define E1000_ECOL 0x04018 /* Excessive Collision Count - R/clr */
124 #define E1000_MCC 0x0401C /* Multiple Collision Count - R/clr */
125 #define E1000_LATECOL 0x04020 /* Late Collision Count - R/clr */
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/e1000e/ |
| D | regs.h | 32 #define E1000_ICR 0x000C0 /* Interrupt Cause Read - R/clr */
121 #define E1000_CRCERRS 0x04000 /* CRC Error Count - R/clr */
122 #define E1000_ALGNERRC 0x04004 /* Alignment Error Count - R/clr */
123 #define E1000_SYMERRS 0x04008 /* Symbol Error Count - R/clr */
124 #define E1000_RXERRC 0x0400C /* Receive Error Count - R/clr */
125 #define E1000_MPC 0x04010 /* Missed Packet Count - R/clr */
126 #define E1000_SCC 0x04014 /* Single Collision Count - R/clr */
127 #define E1000_ECOL 0x04018 /* Excessive Collision Count - R/clr */
128 #define E1000_MCC 0x0401C /* Multiple Collision Count - R/clr */
129 #define E1000_LATECOL 0x04020 /* Late Collision Count - R/clr */
[all …]
|
| /kernel/linux/linux-4.19/drivers/net/ethernet/intel/igb/ |
| D | e1000_regs.h | 21 #define E1000_ICR 0x000C0 /* Interrupt Cause Read - R/clr */
30 #define E1000_EICR 0x01580 /* Ext. Interrupt Cause Read - R/clr */
188 #define E1000_CRCERRS 0x04000 /* CRC Error Count - R/clr */
189 #define E1000_ALGNERRC 0x04004 /* Alignment Error Count - R/clr */
190 #define E1000_SYMERRS 0x04008 /* Symbol Error Count - R/clr */
191 #define E1000_RXERRC 0x0400C /* Receive Error Count - R/clr */
192 #define E1000_MPC 0x04010 /* Missed Packet Count - R/clr */
193 #define E1000_SCC 0x04014 /* Single Collision Count - R/clr */
194 #define E1000_ECOL 0x04018 /* Excessive Collision Count - R/clr */
195 #define E1000_MCC 0x0401C /* Multiple Collision Count - R/clr */
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/igb/ |
| D | e1000_regs.h | 21 #define E1000_ICR 0x000C0 /* Interrupt Cause Read - R/clr */
30 #define E1000_EICR 0x01580 /* Ext. Interrupt Cause Read - R/clr */
188 #define E1000_CRCERRS 0x04000 /* CRC Error Count - R/clr */
189 #define E1000_ALGNERRC 0x04004 /* Alignment Error Count - R/clr */
190 #define E1000_SYMERRS 0x04008 /* Symbol Error Count - R/clr */
191 #define E1000_RXERRC 0x0400C /* Receive Error Count - R/clr */
192 #define E1000_MPC 0x04010 /* Missed Packet Count - R/clr */
193 #define E1000_SCC 0x04014 /* Single Collision Count - R/clr */
194 #define E1000_ECOL 0x04018 /* Excessive Collision Count - R/clr */
195 #define E1000_MCC 0x0401C /* Multiple Collision Count - R/clr */
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/mach-rpc/ |
| D | irq.c | 14 #define CLR 0x04 macro
39 writeb(mask, base + CLR); in iomd_irq_mask_ack()
75 unsigned int irq, clr, set; in rpc_init_irq() local
86 clr = IRQ_NOREQUEST; in rpc_init_irq()
90 clr |= IRQ_NOPROBE; in rpc_init_irq()
100 irq_modify_status(irq, clr, set); in rpc_init_irq()
108 irq_modify_status(irq, clr, set); in rpc_init_irq()
116 irq_modify_status(irq, clr, set); in rpc_init_irq()
123 irq_modify_status(irq, clr, set); in rpc_init_irq()
|
| /kernel/linux/linux-4.19/arch/m68k/math-emu/ |
| D | fp_util.S | 70 2: clr.l %d0
99 clr.l %d1 | sign defaults to zero
109 clr.l (%a0)
116 clr.l (%a0)+
117 clr.l (%a0)+
118 clr.l (%a0)
142 clr.l (%a0) | low lword = 0
236 clr.b (%a0)
274 clr.l %d0
279 clr.w -(%a0)
[all …]
|
| /kernel/linux/linux-5.10/arch/m68k/math-emu/ |
| D | fp_util.S | 70 2: clr.l %d0
99 clr.l %d1 | sign defaults to zero
109 clr.l (%a0)
116 clr.l (%a0)+
117 clr.l (%a0)+
118 clr.l (%a0)
142 clr.l (%a0) | low lword = 0
236 clr.b (%a0)
274 clr.l %d0
279 clr.w -(%a0)
[all …]
|
| /kernel/linux/linux-5.10/include/trace/events/ |
| D | thp.h | 49 TP_PROTO(unsigned long addr, unsigned long pte, unsigned long clr, unsigned long set),
50 TP_ARGS(addr, pte, clr, set),
54 __field(unsigned long, clr)
61 __entry->clr = clr;
66 …page update at addr 0x%lx and pte = 0x%lx clr = 0x%lx, set = 0x%lx", __entry->addr, __entry->pte, …
|
| /kernel/linux/linux-4.19/include/trace/events/ |
| D | thp.h | 49 TP_PROTO(unsigned long addr, unsigned long pte, unsigned long clr, unsigned long set),
50 TP_ARGS(addr, pte, clr, set),
54 __field(unsigned long, clr)
61 __entry->clr = clr;
66 …page update at addr 0x%lx and pte = 0x%lx clr = 0x%lx, set = 0x%lx", __entry->addr, __entry->pte, …
|
| /kernel/linux/linux-5.10/drivers/video/fbdev/ |
| D | atafb_utils.h | 85 " lsr.l #1,%1 ; jcc 1f ; clr.b (%0)+\n" in fb_memclear()
86 "1: lsr.l #1,%1 ; jcc 1f ; clr.w (%0)+\n" in fb_memclear()
87 "1: lsr.l #1,%1 ; jcc 1f ; clr.l (%0)+\n" in fb_memclear()
88 "1: lsr.l #1,%1 ; jcc 1f ; clr.l (%0)+ ; clr.l (%0)+\n" in fb_memclear()
96 " lsr.l #1,%2 ; jcc 1f ; clr.b (%0)+ ; subq.w #1,%1\n" in fb_memclear()
98 " clr.w (%0)+ ; subq.w #2,%1 ; jra 2f\n" in fb_memclear()
100 " clr.w (%0)+ ; subq.w #2,%1\n" in fb_memclear()
102 " lsr.l #1,%1 ; jcc 3f ; clr.l (%0)+\n" in fb_memclear()
103 "3: lsr.l #1,%1 ; jcc 4f ; clr.l (%0)+ ; clr.l (%0)+\n" in fb_memclear()
105 "5: clr.l (%0)+; clr.l (%0)+ ; clr.l (%0)+ ; clr.l (%0)+\n" in fb_memclear()
[all …]
|
| /kernel/linux/linux-4.19/drivers/video/fbdev/ |
| D | atafb_utils.h | 85 " lsr.l #1,%1 ; jcc 1f ; clr.b (%0)+\n" in fb_memclear()
86 "1: lsr.l #1,%1 ; jcc 1f ; clr.w (%0)+\n" in fb_memclear()
87 "1: lsr.l #1,%1 ; jcc 1f ; clr.l (%0)+\n" in fb_memclear()
88 "1: lsr.l #1,%1 ; jcc 1f ; clr.l (%0)+ ; clr.l (%0)+\n" in fb_memclear()
96 " lsr.l #1,%2 ; jcc 1f ; clr.b (%0)+ ; subq.w #1,%1\n" in fb_memclear()
98 " clr.w (%0)+ ; subq.w #2,%1 ; jra 2f\n" in fb_memclear()
100 " clr.w (%0)+ ; subq.w #2,%1\n" in fb_memclear()
102 " lsr.l #1,%1 ; jcc 3f ; clr.l (%0)+\n" in fb_memclear()
103 "3: lsr.l #1,%1 ; jcc 4f ; clr.l (%0)+ ; clr.l (%0)+\n" in fb_memclear()
105 "5: clr.l (%0)+; clr.l (%0)+ ; clr.l (%0)+ ; clr.l (%0)+\n" in fb_memclear()
[all …]
|
| /kernel/linux/linux-4.19/arch/sparc/lib/ |
| D | ffs.S | 14 clr %o0
21 clr %o1 /* 2 */
25 1: clr %o2
31 clr %o3
34 clr %o4
40 clr %o5
|
| /kernel/linux/linux-5.10/arch/sparc/lib/ |
| D | ffs.S | 14 clr %o0
21 clr %o1 /* 2 */
25 1: clr %o2
31 clr %o3
34 clr %o4
40 clr %o5
|
| /kernel/linux/linux-5.10/Documentation/admin-guide/ |
| D | mono.rst | 5 (in the form of .exe files) without the need to use the mono CLR
11 1) You MUST FIRST install the Mono CLR support, either by downloading
21 Once the Mono CLR support has been installed, just check that
50 # Register support for .NET CLR binaries
53 # the Mono CLR runtime (usually /usr/local/bin/mono
55 echo ':CLR:M::MZ::/usr/bin/mono:' > /proc/sys/fs/binfmt_misc/register
|
| /kernel/linux/linux-4.19/Documentation/admin-guide/ |
| D | mono.rst | 5 (in the form of .exe files) without the need to use the mono CLR
11 1) You MUST FIRST install the Mono CLR support, either by downloading
21 Once the Mono CLR support has been installed, just check that
50 # Register support for .NET CLR binaries
53 # the Mono CLR runtime (usually /usr/local/bin/mono
55 echo ':CLR:M::MZ::/usr/bin/mono:' > /proc/sys/fs/binfmt_misc/register
|
| /kernel/linux/linux-4.19/arch/m68k/ifpsp060/src/ |
| D | itest.S | 81 clr.l TESTCTR(%a6)
91 clr.l TESTCTR(%a6)
101 clr.l TESTCTR(%a6)
111 clr.l TESTCTR(%a6)
121 clr.l TESTCTR(%a6)
132 clr.l TESTCTR(%a6)
142 clr.l TESTCTR(%a6)
169 clr.l %d1
181 clr.l IREGS+0x8(%a6)
182 clr.l IREGS+0xc(%a6)
[all …]
|
| /kernel/linux/linux-5.10/arch/m68k/ifpsp060/src/ |
| D | itest.S | 81 clr.l TESTCTR(%a6)
91 clr.l TESTCTR(%a6)
101 clr.l TESTCTR(%a6)
111 clr.l TESTCTR(%a6)
121 clr.l TESTCTR(%a6)
132 clr.l TESTCTR(%a6)
142 clr.l TESTCTR(%a6)
169 clr.l %d1
181 clr.l IREGS+0x8(%a6)
182 clr.l IREGS+0xc(%a6)
[all …]
|
| /kernel/linux/linux-4.19/arch/arm/mach-rpc/ |
| D | irq.c | 121 unsigned int irq, clr, set; in rpc_init_irq() local
132 clr = IRQ_NOREQUEST; in rpc_init_irq()
136 clr |= IRQ_NOPROBE; in rpc_init_irq()
146 irq_modify_status(irq, clr, set); in rpc_init_irq()
152 irq_modify_status(irq, clr, set); in rpc_init_irq()
158 irq_modify_status(irq, clr, set); in rpc_init_irq()
163 irq_modify_status(irq, clr, set); in rpc_init_irq()
|
| /kernel/linux/linux-5.10/arch/m68k/ifpsp060/ |
| D | os.S | 94 clr.l %d1 | return success
101 clr.l %d1 | return success
127 clr.l %d1 | return success
134 clr.l %d1 | return success
151 clr.l %d0 | clear whole longword
152 clr.l %d1 | assume success
187 clr.l %d1 | assume success
188 clr.l %d0 | clear whole longword
223 clr.l %d1 | assume success
245 clr.l %d1 | assume success
[all …]
|
| /kernel/linux/linux-4.19/arch/m68k/ifpsp060/ |
| D | os.S | 94 clr.l %d1 | return success
101 clr.l %d1 | return success
127 clr.l %d1 | return success
134 clr.l %d1 | return success
151 clr.l %d0 | clear whole longword
152 clr.l %d1 | assume success
187 clr.l %d1 | assume success
188 clr.l %d0 | clear whole longword
223 clr.l %d1 | assume success
245 clr.l %d1 | assume success
[all …]
|
| /kernel/linux/linux-5.10/drivers/staging/media/omap4iss/ |
| D | iss.h | 190 * @clr: bit mask to be cleared
194 u32 offset, u32 clr) in iss_reg_clr() argument
198 iss_reg_write(iss, res, offset, v & ~clr); in iss_reg_clr()
222 * @clr: bit mask to be cleared
225 * Clear the clr mask first and then set the set mask.
229 u32 offset, u32 clr, u32 set) in iss_reg_update() argument
233 iss_reg_write(iss, res, offset, (v & ~clr) | set); in iss_reg_update()
|
| /kernel/linux/linux-4.19/drivers/staging/media/omap4iss/ |
| D | iss.h | 194 * @clr: bit mask to be cleared
198 u32 offset, u32 clr) in iss_reg_clr() argument
202 iss_reg_write(iss, res, offset, v & ~clr); in iss_reg_clr()
226 * @clr: bit mask to be cleared
229 * Clear the clr mask first and then set the set mask.
233 u32 offset, u32 clr, u32 set) in iss_reg_update() argument
237 iss_reg_write(iss, res, offset, (v & ~clr) | set); in iss_reg_update()
|
| /kernel/linux/linux-4.19/drivers/clocksource/ |
| D | time-armada-370-xp.c | 91 static void local_timer_ctrl_clrset(u32 clr, u32 set) in local_timer_ctrl_clrset() argument
93 writel((readl(local_base + TIMER_CTRL_OFF) & ~clr) | set, in local_timer_ctrl_clrset()
176 u32 clr = 0, set = 0; in armada_370_xp_timer_starting_cpu() local
181 clr = TIMER0_25MHZ; in armada_370_xp_timer_starting_cpu()
182 local_timer_ctrl_clrset(clr, set); in armada_370_xp_timer_starting_cpu()
245 u32 clr = 0, set = 0; in armada_370_xp_timer_common_init() local
264 clr = TIMER0_25MHZ; in armada_370_xp_timer_common_init()
267 atomic_io_modify(timer_base + TIMER_CTRL_OFF, clr | set, set); in armada_370_xp_timer_common_init()
268 local_timer_ctrl_clrset(clr, set); in armada_370_xp_timer_common_init()
|
| /kernel/linux/linux-5.10/drivers/clocksource/ |
| D | timer-armada-370-xp.c | 91 static void local_timer_ctrl_clrset(u32 clr, u32 set) in local_timer_ctrl_clrset() argument
93 writel((readl(local_base + TIMER_CTRL_OFF) & ~clr) | set, in local_timer_ctrl_clrset()
176 u32 clr = 0, set = 0; in armada_370_xp_timer_starting_cpu() local
181 clr = TIMER0_25MHZ; in armada_370_xp_timer_starting_cpu()
182 local_timer_ctrl_clrset(clr, set); in armada_370_xp_timer_starting_cpu()
245 u32 clr = 0, set = 0; in armada_370_xp_timer_common_init() local
264 clr = TIMER0_25MHZ; in armada_370_xp_timer_common_init()
267 atomic_io_modify(timer_base + TIMER_CTRL_OFF, clr | set, set); in armada_370_xp_timer_common_init()
268 local_timer_ctrl_clrset(clr, set); in armada_370_xp_timer_common_init()
|