| /kernel/linux/linux-4.19/arch/powerpc/kernel/ |
| D | cacheinfo.c | 2 * Processor cache information made available to userspace via sysfs;
27 * - a "cache" kobject for the top-level directory
28 * - a list of "index" objects representing the cpu's local cache hierarchy
31 struct kobject *kobj; /* bare (not embedded) kobject for cache
36 /* "index" object: each cpu's cache directory has an index
37 * subdirectory corresponding to a cache object associated with the
43 struct cache *cache; member
47 * cache type */
52 /* Allow for both [di]-cache-line-size and
53 * [di]-cache-block-size properties. According to the PowerPC
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| /kernel/linux/linux-5.10/arch/powerpc/kernel/ |
| D | cacheinfo.c | 3 * Processor cache information made available to userspace via sysfs;
28 * - a "cache" kobject for the top-level directory
29 * - a list of "index" objects representing the cpu's local cache hierarchy
32 struct kobject *kobj; /* bare (not embedded) kobject for cache
37 /* "index" object: each cpu's cache directory has an index
38 * subdirectory corresponding to a cache object associated with the
44 struct cache *cache; member
48 * cache type */
53 /* Allow for both [di]-cache-line-size and
54 * [di]-cache-block-size properties. According to the PowerPC
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| /kernel/linux/linux-5.10/drivers/md/ |
| D | dm-cache-target.c | 10 #include "dm-cache-metadata.h"
22 #define DM_MSG_PREFIX "cache"
25 "A percentage of time allocated for copying to and/or from cache");
33 * cblock: index of a cache block
34 * promotion: movement of a block from origin to cache
35 * demotion: movement of a block from cache to origin
36 * migration: movement of a block between the origin and cache device,
310 * The block size of the device holding cache data must be
325 * dirty. If you lose the cache device you will lose data.
331 * Data is written to both cache and origin. Blocks are never
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| /kernel/linux/linux-4.19/drivers/md/ |
| D | dm-cache-target.c | 10 #include "dm-cache-metadata.h"
22 #define DM_MSG_PREFIX "cache"
25 "A percentage of time allocated for copying to and/or from cache");
33 * cblock: index of a cache block
34 * promotion: movement of a block from origin to cache
35 * demotion: movement of a block from cache to origin
36 * migration: movement of a block between the origin and cache device,
317 * The block size of the device holding cache data must be
332 * dirty. If you lose the cache device you will lose data.
338 * Data is written to both cache and origin. Blocks are never
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| /kernel/linux/linux-4.19/fs/cachefiles/ |
| D | bind.c | 1 /* Bind and unbind a cache from the filesystem backing it
29 * bind a directory as a cache
31 int cachefiles_daemon_bind(struct cachefiles_cache *cache, char *args) in cachefiles_daemon_bind() argument
34 cache->frun_percent, in cachefiles_daemon_bind()
35 cache->fcull_percent, in cachefiles_daemon_bind()
36 cache->fstop_percent, in cachefiles_daemon_bind()
37 cache->brun_percent, in cachefiles_daemon_bind()
38 cache->bcull_percent, in cachefiles_daemon_bind()
39 cache->bstop_percent, in cachefiles_daemon_bind()
43 ASSERT(cache->fstop_percent >= 0 && in cachefiles_daemon_bind()
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| /kernel/linux/linux-5.10/fs/cachefiles/ |
| D | bind.c | 2 /* Bind and unbind a cache from the filesystem backing it
25 * bind a directory as a cache
27 int cachefiles_daemon_bind(struct cachefiles_cache *cache, char *args) in cachefiles_daemon_bind() argument
30 cache->frun_percent, in cachefiles_daemon_bind()
31 cache->fcull_percent, in cachefiles_daemon_bind()
32 cache->fstop_percent, in cachefiles_daemon_bind()
33 cache->brun_percent, in cachefiles_daemon_bind()
34 cache->bcull_percent, in cachefiles_daemon_bind()
35 cache->bstop_percent, in cachefiles_daemon_bind()
39 ASSERT(cache->fstop_percent >= 0 && in cachefiles_daemon_bind()
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| D | daemon.c | 59 int (*handler)(struct cachefiles_cache *cache, char *args);
85 struct cachefiles_cache *cache; in cachefiles_daemon_open() local
97 /* allocate a cache record */ in cachefiles_daemon_open()
98 cache = kzalloc(sizeof(struct cachefiles_cache), GFP_KERNEL); in cachefiles_daemon_open()
99 if (!cache) { in cachefiles_daemon_open()
104 mutex_init(&cache->daemon_mutex); in cachefiles_daemon_open()
105 cache->active_nodes = RB_ROOT; in cachefiles_daemon_open()
106 rwlock_init(&cache->active_lock); in cachefiles_daemon_open()
107 init_waitqueue_head(&cache->daemon_pollwq); in cachefiles_daemon_open()
114 cache->frun_percent = 7; in cachefiles_daemon_open()
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | l2cache.txt | 1 Freescale L2 Cache Controller
3 L2 cache is present in Freescale's QorIQ and QorIQ Qonverge platforms.
4 The cache bindings explained below are Devicetree Specification compliant
9 "fsl,8540-l2-cache-controller"
10 "fsl,8541-l2-cache-controller"
11 "fsl,8544-l2-cache-controller"
12 "fsl,8548-l2-cache-controller"
13 "fsl,8555-l2-cache-controller"
14 "fsl,8568-l2-cache-controller"
15 "fsl,b4420-l2-cache-controller"
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | l2cache.txt | 1 Freescale L2 Cache Controller
3 L2 cache is present in Freescale's QorIQ and QorIQ Qonverge platforms.
4 The cache bindings explained below are Devicetree Specification compliant
9 "fsl,8540-l2-cache-controller"
10 "fsl,8541-l2-cache-controller"
11 "fsl,8544-l2-cache-controller"
12 "fsl,8548-l2-cache-controller"
13 "fsl,8555-l2-cache-controller"
14 "fsl,8568-l2-cache-controller"
15 "fsl,b4420-l2-cache-controller"
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| /kernel/linux/linux-5.10/fs/fscache/ |
| D | cache.c | 2 /* FS-Cache cache handling
8 #define FSCACHE_DEBUG_LEVEL CACHE
21 * look up a cache tag
67 * release a reference to a cache tag
86 * select a cache in which to store an object
87 * - the cache addremove semaphore must be at least read-locked by the caller
95 struct fscache_cache *cache; in fscache_select_cache_for_object() local
100 _leave(" = NULL [no cache]"); in fscache_select_cache_for_object()
104 /* we check the parent to determine the cache to use */ in fscache_select_cache_for_object()
108 * cache */ in fscache_select_cache_for_object()
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| /kernel/linux/linux-4.19/fs/fscache/ |
| D | cache.c | 1 /* FS-Cache cache handling
12 #define FSCACHE_DEBUG_LEVEL CACHE
25 * look up a cache tag
71 * release a reference to a cache tag
90 * select a cache in which to store an object
91 * - the cache addremove semaphore must be at least read-locked by the caller
99 struct fscache_cache *cache; in fscache_select_cache_for_object() local
104 _leave(" = NULL [no cache]"); in fscache_select_cache_for_object()
108 /* we check the parent to determine the cache to use */ in fscache_select_cache_for_object()
112 * cache */ in fscache_select_cache_for_object()
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amazon/ |
| D | alpine-v3.dtsi | 28 d-cache-size = <0x8000>;
29 d-cache-line-size = <64>;
30 d-cache-sets = <256>;
31 i-cache-size = <0xc000>;
32 i-cache-line-size = <64>;
33 i-cache-sets = <256>;
34 next-level-cache = <&cluster0_l2>;
42 d-cache-size = <0x8000>;
43 d-cache-line-size = <64>;
44 d-cache-sets = <256>;
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/uniphier/ |
| D | cache-uniphier.txt | 1 UniPhier outer cache controller
3 UniPhier SoCs are integrated with a full-custom outer cache controller system.
4 All of them have a level 2 cache controller, and some have a level 3 cache
8 - compatible: should be "socionext,uniphier-system-cache"
12 - cache-unified: specifies the cache is a unified cache.
13 - cache-size: specifies the size in bytes of the cache
14 - cache-sets: specifies the number of associativity sets of the cache
15 - cache-line-size: specifies the line size in bytes
16 - cache-level: specifies the level in the cache hierarchy. The value should
17 be 2 for L2 cache, 3 for L3 cache, etc.
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| /kernel/linux/linux-4.19/arch/mips/include/asm/ |
| D | r4kcache.h | 6 * Inline assembly cache operations.
31 * for indexed cache operations. Two issues here:
47 " cache %0, %1 \n" \
157 "1: cache %1, (%2) \n" \
252 " cache %1, 0x000(%0); cache %1, 0x010(%0) \n" \
253 " cache %1, 0x020(%0); cache %1, 0x030(%0) \n" \
254 " cache %1, 0x040(%0); cache %1, 0x050(%0) \n" \
255 " cache %1, 0x060(%0); cache %1, 0x070(%0) \n" \
256 " cache %1, 0x080(%0); cache %1, 0x090(%0) \n" \
257 " cache %1, 0x0a0(%0); cache %1, 0x0b0(%0) \n" \
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| /kernel/linux/linux-5.10/fs/ |
| D | mbcache.c | 16 * Ext2 and ext4 use this cache for deduplication of extended attribute blocks.
21 * identifies a cache entry.
33 /* Maximum entries in cache to avoid degrading hash too much */
38 /* Number of entries in cache */
41 /* Work for shrinking when the cache has too many entries */
47 static unsigned long mb_cache_shrink(struct mb_cache *cache,
50 static inline struct hlist_bl_head *mb_cache_entry_head(struct mb_cache *cache, in mb_cache_entry_head() argument
53 return &cache->c_hash[hash_32(key, cache->c_bucket_bits)]; in mb_cache_entry_head()
58 * in cache
63 * mb_cache_entry_create - create entry in cache
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| /kernel/linux/linux-4.19/fs/ |
| D | mbcache.c | 15 * Ext2 and ext4 use this cache for deduplication of extended attribute blocks.
20 * identifies a cache entry.
32 /* Maximum entries in cache to avoid degrading hash too much */
37 /* Number of entries in cache */
40 /* Work for shrinking when the cache has too many entries */
46 static unsigned long mb_cache_shrink(struct mb_cache *cache,
49 static inline struct hlist_bl_head *mb_cache_entry_head(struct mb_cache *cache, in mb_cache_entry_head() argument
52 return &cache->c_hash[hash_32(key, cache->c_bucket_bits)]; in mb_cache_entry_head()
57 * in cache
62 * mb_cache_entry_create - create entry in cache
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| /kernel/linux/linux-5.10/fs/squashfs/ |
| D | cache.c | 8 * cache.c
15 * This file implements a generic cache implementation used for both caches,
16 * plus functions layered ontop of the generic cache implementation to
19 * To avoid out of memory and fragmentation issues with vmalloc the cache
22 * It should be noted that the cache is not used for file datablocks, these
23 * are decompressed and cached in the page-cache in the normal way. The
24 * cache is only used to temporarily cache fragment and metadata blocks
49 * Look-up block in cache, and increment usage count. If not in cache, read
53 struct squashfs_cache *cache, u64 block, int length) in squashfs_cache_get() argument
58 spin_lock(&cache->lock); in squashfs_cache_get()
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| /kernel/linux/linux-5.10/mm/ |
| D | swap_slots.c | 3 * Manage cache of swap slots to be used for and returned from
25 * The swap slots cache is protected by a mutex instead of
42 /* Serialize swap slots cache enable/disable operations */
107 /* if global pool of slot caches too low, deactivate cache */ in check_cache_active()
116 struct swap_slots_cache *cache; in alloc_swap_slot_cache() local
137 cache = &per_cpu(swp_slots, cpu); in alloc_swap_slot_cache()
138 if (cache->slots || cache->slots_ret) { in alloc_swap_slot_cache()
139 /* cache already allocated */ in alloc_swap_slot_cache()
148 if (!cache->lock_initialized) { in alloc_swap_slot_cache()
149 mutex_init(&cache->alloc_lock); in alloc_swap_slot_cache()
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| /kernel/linux/linux-4.19/mm/ |
| D | swap_slots.c | 3 * Manage cache of swap slots to be used for and returned from
25 * The swap slots cache is protected by a mutex instead of
42 /* Serialize swap slots cache enable/disable operations */
108 /* if global pool of slot caches too low, deactivate cache */ in check_cache_active()
117 struct swap_slots_cache *cache; in alloc_swap_slot_cache() local
138 cache = &per_cpu(swp_slots, cpu); in alloc_swap_slot_cache()
139 if (cache->slots || cache->slots_ret) in alloc_swap_slot_cache()
140 /* cache already allocated */ in alloc_swap_slot_cache()
142 if (!cache->lock_initialized) { in alloc_swap_slot_cache()
143 mutex_init(&cache->alloc_lock); in alloc_swap_slot_cache()
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| /kernel/linux/linux-4.19/fs/squashfs/ |
| D | cache.c | 21 * cache.c
28 * This file implements a generic cache implementation used for both caches,
29 * plus functions layered ontop of the generic cache implementation to
32 * To avoid out of memory and fragmentation issues with vmalloc the cache
35 * It should be noted that the cache is not used for file datablocks, these
36 * are decompressed and cached in the page-cache in the normal way. The
37 * cache is only used to temporarily cache fragment and metadata blocks
62 * Look-up block in cache, and increment usage count. If not in cache, read
66 struct squashfs_cache *cache, u64 block, int length) in squashfs_cache_get() argument
71 spin_lock(&cache->lock); in squashfs_cache_get()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/socionext/ |
| D | socionext,uniphier-system-cache.yaml | 4 $id: http://devicetree.org/schemas/arm/socionext/socionext,uniphier-system-cache.yaml#
7 title: UniPhier outer cache controller
10 UniPhier ARM 32-bit SoCs are integrated with a full-custom outer cache
11 controller system. All of them have a level 2 cache controller, and some
12 have a level 3 cache controller as well.
19 const: socionext,uniphier-system-cache
30 Interrupts can be used to notify the completion of cache operations.
36 cache-unified: true
38 cache-size: true
40 cache-sets: true
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| /kernel/linux/linux-5.10/fs/nfs/ |
| D | nfs42xattr.c | 6 * User extended attribute client side cache functions.
21 * a cache structure attached to NFS inodes. This structure is allocated
22 * when needed, and freed when the cache is zapped.
24 * The cache structure contains as hash table of entries, and a pointer
25 * to a special-cased entry for the listxattr cache.
28 * counting. The cache entries use a similar refcounting scheme.
30 * This makes freeing a cache, both from the shrinker and from the
31 * zap cache path, easy. It also means that, in current use cases,
40 * Two shrinkers deal with the cache entries themselves: one for
45 * The other shrinker frees the cache structures themselves.
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/s390/cf_z13/ |
| D | extended.json | 7 … cache where the line was originally in a Read-Only state in the cache but has been updated to be …
42 …rectory write to the Level-1 Data cache directory where the returned cache line was sourced from t…
63 …te to the Level-1 Instruction cache directory where the returned cache line was sourced from the L…
105 …"PublicDescription": "Increments by one for any cycle where a Level-1 cache or Level-1 TLB miss is…
112 …ectory write to the Level-1 Data cache directory where the returned cache line was sourced from an…
119 …ectory write to the Level-1 Data cache directory where the returned cache line was sourced from an…
126 …ectory write to the Level-1 Data cache directory where the returned cache line was sourced from an…
133 …ectory write to the Level-1 Data cache directory where the returned cache line was sourced from an…
140 …ectory write to the Level-1 Data cache directory where the returned cache line was sourced from an…
147 …ctory write to the Level-1 Data cache directory where the returned cache line was sourced from an …
[all …]
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| /kernel/linux/linux-4.19/tools/perf/pmu-events/arch/s390/cf_z13/ |
| D | extended.json | 7 … cache where the line was originally in a Read-Only state in the cache but has been updated to be …
42 …rectory write to the Level-1 Data cache directory where the returned cache line was sourced from t…
63 …te to the Level-1 Instruction cache directory where the returned cache line was sourced from the L…
105 …"PublicDescription": "Increments by one for any cycle where a Level-1 cache or Level-1 TLB miss is…
112 …ectory write to the Level-1 Data cache directory where the returned cache line was sourced from an…
119 …ectory write to the Level-1 Data cache directory where the returned cache line was sourced from an…
126 …ectory write to the Level-1 Data cache directory where the returned cache line was sourced from an…
133 …ectory write to the Level-1 Data cache directory where the returned cache line was sourced from an…
140 …ectory write to the Level-1 Data cache directory where the returned cache line was sourced from an…
147 …ctory write to the Level-1 Data cache directory where the returned cache line was sourced from an …
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/ |
| D | k3-am654.dtsi | 41 i-cache-size = <0x8000>;
42 i-cache-line-size = <64>;
43 i-cache-sets = <256>;
44 d-cache-size = <0x8000>;
45 d-cache-line-size = <64>;
46 d-cache-sets = <128>;
47 next-level-cache = <&L2_0>;
55 i-cache-size = <0x8000>;
56 i-cache-line-size = <64>;
57 i-cache-sets = <256>;
[all …]
|