| /kernel/linux/linux-4.19/kernel/irq/ |
| D | irqdomain.c | 28 static void irq_domain_check_hierarchy(struct irq_domain *domain);
50 * identifying an irq domain
52 * @name: Optional user provided domain name
62 * domain struct.
123 * @ops: domain callbacks
127 * Returns pointer to IRQ domain, or NULL on failure.
136 struct irq_domain *domain; in __irq_domain_add() local
140 domain = kzalloc_node(sizeof(*domain) + (sizeof(unsigned int) * size), in __irq_domain_add()
142 if (WARN_ON(!domain)) in __irq_domain_add()
151 domain->fwnode = fwnode; in __irq_domain_add()
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| D | msi.c | 79 static void msi_check_level(struct irq_domain *domain, struct msi_msg *msg) in msi_check_level() argument
81 struct msi_domain_info *info = domain->host_data; in msi_check_level()
111 msi_check_level(irq_data->domain, msg); in msi_domain_set_affinity()
118 static int msi_domain_activate(struct irq_domain *domain, in msi_domain_activate() argument
124 msi_check_level(irq_data->domain, msg); in msi_domain_activate()
129 static void msi_domain_deactivate(struct irq_domain *domain, in msi_domain_deactivate() argument
138 static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq, in msi_domain_alloc() argument
141 struct msi_domain_info *info = domain->host_data; in msi_domain_alloc()
146 if (irq_find_mapping(domain, hwirq) > 0) in msi_domain_alloc()
149 if (domain->parent) { in msi_domain_alloc()
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| /kernel/linux/linux-5.10/kernel/irq/ |
| D | irqdomain.c | 28 static void irq_domain_check_hierarchy(struct irq_domain *domain);
50 * identifying an irq domain
53 * @name: Optional user provided domain name
62 * domain struct.
124 * @ops: domain callbacks
128 * Returns pointer to IRQ domain, or NULL on failure.
136 struct irq_domain *domain; in __irq_domain_add() local
140 domain = kzalloc_node(sizeof(*domain) + (sizeof(unsigned int) * size), in __irq_domain_add()
142 if (!domain) in __irq_domain_add()
151 domain->fwnode = fwnode; in __irq_domain_add()
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| D | msi.c | 79 static void msi_check_level(struct irq_domain *domain, struct msi_msg *msg) in msi_check_level() argument
81 struct msi_domain_info *info = domain->host_data; in msi_check_level()
111 msi_check_level(irq_data->domain, msg); in msi_domain_set_affinity()
118 static int msi_domain_activate(struct irq_domain *domain, in msi_domain_activate() argument
124 msi_check_level(irq_data->domain, msg); in msi_domain_activate()
129 static void msi_domain_deactivate(struct irq_domain *domain, in msi_domain_deactivate() argument
138 static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq, in msi_domain_alloc() argument
141 struct msi_domain_info *info = domain->host_data; in msi_domain_alloc()
146 if (irq_find_mapping(domain, hwirq) > 0) in msi_domain_alloc()
149 if (domain->parent) { in msi_domain_alloc()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/ |
| D | power-domain.yaml | 4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
19 This device tree binding can be used to bind PM domain consumer devices with
20 their PM domains provided by PM domain providers. A PM domain provider can be
23 phandle arguments (so called PM domain specifiers) of length specified by the
24 \#power-domain-cells property in the PM domain provider node.
28 pattern: "^(power-controller|power-domain)([@-].*)?$"
30 domain-idle-states:
34 power-domain provider. The idle state definitions are compatible with the
35 domain-idle-state bindings, specified in ./domain-idle-state.yaml.
37 Note that, the domain-idle-state property reflects the idle states of this
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/power/ |
| D | power_domain.txt | 7 This device tree binding can be used to bind PM domain consumer devices with
8 their PM domains provided by PM domain providers. A PM domain provider can be
11 phandle arguments (so called PM domain specifiers) of length specified by the
12 #power-domain-cells property in the PM domain provider node.
14 ==PM domain providers==
17 - #power-domain-cells : Number of cells in a PM domain specifier;
18 Typically 0 for nodes representing a single PM domain and 1 for nodes
23 - power-domains : A phandle and PM domain specifier as defined by bindings of
25 Some power domains might be powered from another power domain (or have
27 a standard PM domain consumer binding is used. When provided, all domains
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| /kernel/linux/linux-5.10/drivers/soc/imx/ |
| D | gpcv2.c | 133 struct imx_pgc_domain *domain = container_of(genpd, in imx_gpc_pu_pgc_sw_pxx_req() local
139 const bool has_regulator = !IS_ERR(domain->regulator); in imx_gpc_pu_pgc_sw_pxx_req()
143 regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, in imx_gpc_pu_pgc_sw_pxx_req()
144 domain->bits.map, domain->bits.map); in imx_gpc_pu_pgc_sw_pxx_req()
147 ret = regulator_enable(domain->regulator); in imx_gpc_pu_pgc_sw_pxx_req()
149 dev_err(domain->dev, "failed to enable regulator\n"); in imx_gpc_pu_pgc_sw_pxx_req()
154 /* Enable reset clocks for all devices in the domain */ in imx_gpc_pu_pgc_sw_pxx_req()
155 for (i = 0; i < domain->num_clks; i++) in imx_gpc_pu_pgc_sw_pxx_req()
156 clk_prepare_enable(domain->clk[i]); in imx_gpc_pu_pgc_sw_pxx_req()
159 regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc), in imx_gpc_pu_pgc_sw_pxx_req()
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| /kernel/linux/linux-5.10/drivers/soc/xilinx/ |
| D | zynqmp_pm_domains.c | 3 * ZynqMP Generic PM domain support
23 /* Flag stating if PM nodes mapped to the PM domain has been requested */
30 * @gpd: Generic power domain
31 * @node_id: PM node ID corresponding to device inside PM domain
32 * @flags: ZynqMP PM domain flags
64 * zynqmp_gpd_power_on() - Power on PM domain
65 * @domain: Generic PM domain
67 * This function is called before devices inside a PM domain are resumed, to
68 * power on PM domain.
72 static int zynqmp_gpd_power_on(struct generic_pm_domain *domain) in zynqmp_gpd_power_on() argument
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| /kernel/linux/linux-4.19/drivers/soc/imx/ |
| D | gpcv2.c | 75 struct imx7_pgc_domain *domain = container_of(genpd, in imx7_gpc_pu_pgc_sw_pxx_req() local
81 const bool has_regulator = !IS_ERR(domain->regulator); in imx7_gpc_pu_pgc_sw_pxx_req()
85 regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, in imx7_gpc_pu_pgc_sw_pxx_req()
86 domain->bits.map, domain->bits.map); in imx7_gpc_pu_pgc_sw_pxx_req()
89 ret = regulator_enable(domain->regulator); in imx7_gpc_pu_pgc_sw_pxx_req()
91 dev_err(domain->dev, "failed to enable regulator\n"); in imx7_gpc_pu_pgc_sw_pxx_req()
97 regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc), in imx7_gpc_pu_pgc_sw_pxx_req()
100 regmap_update_bits(domain->regmap, offset, in imx7_gpc_pu_pgc_sw_pxx_req()
101 domain->bits.pxx, domain->bits.pxx); in imx7_gpc_pu_pgc_sw_pxx_req()
111 regmap_read(domain->regmap, offset, &pxx_req); in imx7_gpc_pu_pgc_sw_pxx_req()
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | keystone-k2hk-clocks.dtsi | 59 reg-names = "control", "domain";
60 domain-id = <0>;
69 reg-names = "control", "domain";
70 domain-id = <4>;
79 reg-names = "control", "domain";
80 domain-id = <5>;
89 reg-names = "control", "domain";
90 domain-id = <9>;
99 reg-names = "control", "domain";
100 domain-id = <10>;
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| D | keystone-k2l-clocks.dtsi | 49 reg-names = "control", "domain";
51 domain-id = <0>;
60 reg-names = "control", "domain";
61 domain-id = <4>;
70 reg-names = "control", "domain";
71 domain-id = <9>;
80 reg-names = "control", "domain";
81 domain-id = <10>;
90 reg-names = "control", "domain";
91 domain-id = <11>;
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | keystone-k2hk-clocks.dtsi | 59 reg-names = "control", "domain";
60 domain-id = <0>;
69 reg-names = "control", "domain";
70 domain-id = <4>;
79 reg-names = "control", "domain";
80 domain-id = <5>;
89 reg-names = "control", "domain";
90 domain-id = <9>;
99 reg-names = "control", "domain";
100 domain-id = <10>;
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| D | keystone-k2l-clocks.dtsi | 49 reg-names = "control", "domain";
51 domain-id = <0>;
60 reg-names = "control", "domain";
61 domain-id = <4>;
70 reg-names = "control", "domain";
71 domain-id = <9>;
80 reg-names = "control", "domain";
81 domain-id = <10>;
90 reg-names = "control", "domain";
91 domain-id = <11>;
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| /kernel/linux/linux-4.19/Documentation/scheduler/ |
| D | sched-stats.txt | 9 per-domain. Note that domains (and their associated information) will only
12 In version 14 of schedstat, there is at least one level of domain
14 domain. Domains have no particular names in this implementation, but
16 cpus on the machine, while domain0 is the most tightly focused domain,
18 are no architectures which need more than three domain levels. The first
19 field in the domain stats is a bit map indicating which cpus are affected
20 by that domain.
57 Domain statistics
59 One of these is produced per domain for each cpu described. (Note that if
63 domain<N> <cpumask> 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 3…
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/rockchip/ |
| D | power_domain.txt | 6 Required properties for power domain controller:
19 - #power-domain-cells: Number of cells in a power-domain specifier.
24 Required properties for power domain sub nodes:
25 - reg: index of the power domain, should use macros in:
26 "include/dt-bindings/power/px30-power.h" - for PX30 type power domain.
27 "include/dt-bindings/power/rk3036-power.h" - for RK3036 type power domain.
28 "include/dt-bindings/power/rk3066-power.h" - for RK3066 type power domain.
29 "include/dt-bindings/power/rk3128-power.h" - for RK3128 type power domain.
30 "include/dt-bindings/power/rk3188-power.h" - for RK3188 type power domain.
31 "include/dt-bindings/power/rk3228-power.h" - for RK3228 type power domain.
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| /kernel/linux/linux-4.19/include/linux/ |
| D | iommu.h | 65 /* Domain feature flags */
67 #define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API
69 #define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */
72 * This are the possible domain-types
163 * @domain_alloc: allocate iommu domain
164 * @domain_free: free iommu domain
165 * @attach_dev: attach device to an iommu domain
166 * @detach_dev: detach device from an iommu domain
167 * @map: map a physically contiguous memory region to an iommu domain
168 * @unmap: unmap a physically contiguous memory region from an iommu domain
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| D | irqdomain.h | 14 * Interrupt controller "domain" data structure. This could be defined as a
15 * irq domain controller. That is, it handles the mapping between hardware
16 * and virtual interrupt numbers for a given interrupt domain. The domain
18 * (though a domain can cover more than one PIC if they have a flat number
19 * model). It's the domain callbacks that are responsible for setting the
23 * identify the domain. In some cases, and in order to preserve source
70 * different purposes (for example one domain is for PCI/MSI, and the
134 * @name: Name of interrupt domain
148 * @debugfs_file: dentry for the domain debugfs file
185 /* Irq domain flags */
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| /kernel/linux/linux-5.10/Documentation/scheduler/ |
| D | sched-stats.rst | 13 per-domain. Note that domains (and their associated information) will only
16 In version 14 of schedstat, there is at least one level of domain
18 domain. Domains have no particular names in this implementation, but
20 cpus on the machine, while domain0 is the most tightly focused domain,
22 are no architectures which need more than three domain levels. The first
23 field in the domain stats is a bit map indicating which cpus are affected
24 by that domain.
65 Domain statistics
67 One of these is produced per domain for each cpu described. (Note that if
71 domain<N> <cpumask> 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 3…
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| /kernel/linux/linux-5.10/include/linux/ |
| D | iommu.h | 58 /* Domain feature flags */
60 #define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API
62 #define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */
65 * This are the possible domain-types
160 IOMMU_DEV_FEAT_AUX, /* Aux-domain feature */
188 * @domain_alloc: allocate iommu domain
189 * @domain_free: free iommu domain
190 * @attach_dev: attach device to an iommu domain
191 * @detach_dev: detach device from an iommu domain
192 * @map: map a physically contiguous memory region to an iommu domain
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| D | irqdomain.h | 14 * Interrupt controller "domain" data structure. This could be defined as a
15 * irq domain controller. That is, it handles the mapping between hardware
16 * and virtual interrupt numbers for a given interrupt domain. The domain
18 * (though a domain can cover more than one PIC if they have a flat number
19 * model). It's the domain callbacks that are responsible for setting the
23 * identify the domain. In some cases, and in order to preserve source
71 * different purposes (for example one domain is for PCI/MSI, and the
139 * @name: Name of interrupt domain
153 * @debugfs_file: dentry for the domain debugfs file
190 /* Irq domain flags */
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/soc/rockchip/ |
| D | power_domain.txt | 6 Required properties for power domain controller:
17 - #power-domain-cells: Number of cells in a power-domain specifier.
22 Required properties for power domain sub nodes:
23 - reg: index of the power domain, should use macros in:
24 "include/dt-bindings/power/px30-power.h" - for PX30 type power domain.
25 "include/dt-bindings/power/rk3036-power.h" - for RK3036 type power domain.
26 "include/dt-bindings/power/rk3128-power.h" - for RK3128 type power domain.
27 "include/dt-bindings/power/rk3228-power.h" - for RK3228 type power domain.
28 "include/dt-bindings/power/rk3288-power.h" - for RK3288 type power domain.
29 "include/dt-bindings/power/rk3328-power.h" - for RK3328 type power domain.
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| /kernel/linux/linux-4.19/drivers/iommu/ |
| D | ipmmu-vmsa.c | 263 static u32 ipmmu_ctx_read_root(struct ipmmu_vmsa_domain *domain, in ipmmu_ctx_read_root() argument
266 return ipmmu_read(domain->mmu->root, in ipmmu_ctx_read_root()
267 domain->context_id * IM_CTX_SIZE + reg); in ipmmu_ctx_read_root()
270 static void ipmmu_ctx_write_root(struct ipmmu_vmsa_domain *domain, in ipmmu_ctx_write_root() argument
273 ipmmu_write(domain->mmu->root, in ipmmu_ctx_write_root()
274 domain->context_id * IM_CTX_SIZE + reg, data); in ipmmu_ctx_write_root()
277 static void ipmmu_ctx_write_all(struct ipmmu_vmsa_domain *domain, in ipmmu_ctx_write_all() argument
280 if (domain->mmu != domain->mmu->root) in ipmmu_ctx_write_all()
281 ipmmu_write(domain->mmu, in ipmmu_ctx_write_all()
282 domain->context_id * IM_CTX_SIZE + reg, data); in ipmmu_ctx_write_all()
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| /kernel/linux/linux-4.19/net/netlabel/ |
| D | netlabel_domainhash.c | 2 * NetLabel Domain Hash Table
4 * This file manages the domain hash table that NetLabel uses to determine
5 * which network labeling protocol to use for a given domain. The NetLabel
54 /* Domain hash table */
65 * Domain Hash Table Helper Functions
69 * netlbl_domhsh_free_entry - Frees a domain hash table entry
104 kfree(ptr->domain); in netlbl_domhsh_free_entry()
109 * netlbl_domhsh_hash - Hashing function for the domain hash table
110 * @domain: the domain name to hash
113 * This is the hashing function for the domain hash table, it returns the
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| /kernel/linux/linux-5.10/net/netlabel/ |
| D | netlabel_domainhash.c | 3 * NetLabel Domain Hash Table
5 * This file manages the domain hash table that NetLabel uses to determine
6 * which network labeling protocol to use for a given domain. The NetLabel
40 /* Domain hash table */
51 * Domain Hash Table Helper Functions
55 * netlbl_domhsh_free_entry - Frees a domain hash table entry
90 kfree(ptr->domain); in netlbl_domhsh_free_entry()
95 * netlbl_domhsh_hash - Hashing function for the domain hash table
96 * @key: the domain name to hash
99 * This is the hashing function for the domain hash table, it returns the
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| /kernel/linux/linux-5.10/drivers/iommu/ |
| D | ipmmu-vmsa.c | 210 static u32 ipmmu_ctx_read_root(struct ipmmu_vmsa_domain *domain, in ipmmu_ctx_read_root() argument
213 return ipmmu_ctx_read(domain->mmu->root, domain->context_id, reg); in ipmmu_ctx_read_root()
216 static void ipmmu_ctx_write_root(struct ipmmu_vmsa_domain *domain, in ipmmu_ctx_write_root() argument
219 ipmmu_ctx_write(domain->mmu->root, domain->context_id, reg, data); in ipmmu_ctx_write_root()
222 static void ipmmu_ctx_write_all(struct ipmmu_vmsa_domain *domain, in ipmmu_ctx_write_all() argument
225 if (domain->mmu != domain->mmu->root) in ipmmu_ctx_write_all()
226 ipmmu_ctx_write(domain->mmu, domain->context_id, reg, data); in ipmmu_ctx_write_all()
228 ipmmu_ctx_write(domain->mmu->root, domain->context_id, reg, data); in ipmmu_ctx_write_all()
253 static void ipmmu_tlb_sync(struct ipmmu_vmsa_domain *domain) in ipmmu_tlb_sync() argument
257 while (ipmmu_ctx_read_root(domain, IMCTR) & IMCTR_FLUSH) { in ipmmu_tlb_sync()
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