| /kernel/linux/linux-5.10/arch/powerpc/kvm/ |
| D | book3s_xive_template.c | 77 /* If the XIVE supports the new "store EOI facility, use it */ in GLUE()
84 * For LSIs the HW EOI cycle is used rather than PQ bits, in GLUE()
93 * Otherwise for EOI, we use the special MMIO that does in GLUE()
95 * except for LSIs where we use the "EOI cycle" special in GLUE()
148 * Snapshot the queue page. The test further down for EOI in GLUE()
151 * to miss an EOI. in GLUE()
165 * we EOI it now, thus re-enabling reception of a new in GLUE()
240 * If this is an EOI that's it, no CPPR adjustment done here, in GLUE()
427 /* If it's not an LSI, set PQ to 11 the EOI will force a resend */ in GLUE()
431 /* EOI the source */ in GLUE()
[all …]
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| /kernel/linux/linux-4.19/arch/powerpc/kvm/ |
| D | book3s_xive_template.c | 77 /* If the XIVE supports the new "store EOI facility, use it */ in GLUE()
84 * For LSIs the HW EOI cycle is used rather than PQ bits, in GLUE()
93 * Otherwise for EOI, we use the special MMIO that does in GLUE()
95 * except for LSIs where we use the "EOI cycle" special in GLUE()
158 * Snapshot the queue page. The test further down for EOI in GLUE()
161 * to miss an EOI. in GLUE()
175 * we EOI it now, thus re-enabling reception of a new in GLUE()
238 * If this is an EOI that's it, no CPPR adjustment done here, in GLUE()
433 /* If it's not an LSI, set PQ to 11 the EOI will force a resend */ in GLUE()
437 /* EOI the source */ in GLUE()
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/sysdev/xics/ |
| D | icp-opal.c | 32 * We take the ipi irq but and never return so we need to EOI the IPI, in icp_opal_flush_ipi()
81 /* We might learn about it later, so EOI it */ in icp_opal_get_irq()
114 * EOI tells us whether there are more interrupts to fetch. in icp_opal_eoi()
168 /* EOI the interrupt */ in icp_opal_flush_interrupt()
176 .eoi = icp_opal_eoi,
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| D | icp-hv.c | 52 pr_err("%s: bad return code eoi xirr=0x%x returned %ld\n", in icp_hv_set_xirr()
93 * need to EOI the IPI, but want to leave our priority 0 in icp_hv_flush_ipi()
121 /* We might learn about it later, so EOI it */ in icp_hv_get_irq()
154 .eoi = icp_hv_eoi,
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| /kernel/linux/linux-4.19/arch/powerpc/sysdev/xics/ |
| D | icp-opal.c | 36 * We take the ipi irq but and never return so we need to EOI the IPI, in icp_opal_flush_ipi()
85 /* We might learn about it later, so EOI it */ in icp_opal_get_irq()
118 * EOI tells us whether there are more interrupts to fetch. in icp_opal_eoi()
172 /* EOI the interrupt */ in icp_opal_flush_interrupt()
180 .eoi = icp_opal_eoi,
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| D | icp-hv.c | 57 pr_err("%s: bad return code eoi xirr=0x%x returned %ld\n", in icp_hv_set_xirr()
98 * need to EOI the IPI, but want to leave our priority 0 in icp_hv_flush_ipi()
126 /* We might learn about it later, so EOI it */ in icp_hv_get_irq()
159 .eoi = icp_hv_eoi,
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| /kernel/linux/linux-5.10/drivers/xen/xen-pciback/ |
| D | pciback_ops.c | 295 bool eoi = true; in xen_pcibk_test_and_schedule_op() local
301 eoi = false; in xen_pcibk_test_and_schedule_op()
308 eoi = false; in xen_pcibk_test_and_schedule_op()
311 /* EOI if there was nothing to do. */ in xen_pcibk_test_and_schedule_op()
312 if (eoi) in xen_pcibk_test_and_schedule_op()
412 bool eoi; in xen_pcibk_handle_event() local
418 eoi = test_and_set_bit(_EOI_pending, &pdev->flags); in xen_pcibk_handle_event()
419 WARN(eoi, "IRQ while EOI pending\n"); in xen_pcibk_handle_event()
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| /kernel/linux/linux-4.19/drivers/xen/xen-pciback/ |
| D | pciback_ops.c | 316 bool eoi = true; in xen_pcibk_test_and_schedule_op() local
322 eoi = false; in xen_pcibk_test_and_schedule_op()
329 eoi = false; in xen_pcibk_test_and_schedule_op()
332 /* EOI if there was nothing to do. */ in xen_pcibk_test_and_schedule_op()
333 if (eoi) in xen_pcibk_test_and_schedule_op()
433 bool eoi; in xen_pcibk_handle_event() local
439 eoi = test_and_set_bit(_EOI_pending, &pdev->flags); in xen_pcibk_handle_event()
440 WARN(eoi, "IRQ while EOI pending\n"); in xen_pcibk_handle_event()
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| /kernel/linux/linux-5.10/drivers/xen/events/ |
| D | events_base.c | 108 unsigned short eoi_cpu; /* EOI must happen on this cpu-1 */
110 u64 eoi_time; /* Time in jiffies when to EOI. */
523 struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu); in lateeoi_list_del() local
526 spin_lock_irqsave(&eoi->eoi_list_lock, flags); in lateeoi_list_del()
528 spin_unlock_irqrestore(&eoi->eoi_list_lock, flags); in lateeoi_list_del()
533 struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu); in lateeoi_list_add() local
544 spin_lock_irqsave(&eoi->eoi_list_lock, flags); in lateeoi_list_add()
546 if (list_empty(&eoi->eoi_list)) { in lateeoi_list_add()
547 list_add(&info->eoi_list, &eoi->eoi_list); in lateeoi_list_add()
549 &eoi->delayed, delay); in lateeoi_list_add()
[all …]
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| /kernel/linux/linux-5.10/drivers/irqchip/ |
| D | irq-i8259.c | 131 * first, _then_ send the EOI, and the order of EOI
164 outb(0x60+(irq&7), PIC_SLAVE_CMD);/* 'Specific EOI' to slave */ in mask_and_ack_8259A()
165 outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */ in mask_and_ack_8259A()
169 outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */ in mask_and_ack_8259A()
245 if (auto_eoi) /* master does Auto EOI */ in init_8259A()
247 else /* master expects normal EOI */ in init_8259A()
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| D | irq-clps711x.c | 40 phys_addr_t eoi; member
95 writel_relaxed(0, clps711x_intc->base + clps711x_irqs[hwirq].eoi); in clps711x_intc_eoi()
139 } else if (clps711x_irqs[hw].eoi) { in clps711x_intc_irq_map()
144 if (clps711x_irqs[hw].eoi) in clps711x_intc_irq_map()
145 writel_relaxed(0, clps711x_intc->base + clps711x_irqs[hw].eoi); in clps711x_intc_irq_map()
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| /kernel/linux/linux-4.19/drivers/irqchip/ |
| D | irq-i8259.c | 131 * first, _then_ send the EOI, and the order of EOI
164 outb(0x60+(irq&7), PIC_SLAVE_CMD);/* 'Specific EOI' to slave */ in mask_and_ack_8259A()
165 outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */ in mask_and_ack_8259A()
169 outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */ in mask_and_ack_8259A()
253 if (auto_eoi) /* master does Auto EOI */ in init_8259A()
255 else /* master expects normal EOI */ in init_8259A()
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| D | irq-clps711x.c | 44 phys_addr_t eoi; member
99 writel_relaxed(0, clps711x_intc->base + clps711x_irqs[hwirq].eoi); in clps711x_intc_eoi()
143 } else if (clps711x_irqs[hw].eoi) { in clps711x_intc_irq_map()
148 if (clps711x_irqs[hw].eoi) in clps711x_intc_irq_map()
149 writel_relaxed(0, clps711x_intc->base + clps711x_irqs[hw].eoi); in clps711x_intc_irq_map()
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| /kernel/linux/linux-4.19/arch/powerpc/sysdev/xive/ |
| D | common.c | 256 * as a "replay" because EOI decided there was still something in xive_get_irq()
264 * entry (on HW interrupt) from a replay triggered by EOI, in xive_get_irq()
285 * After EOI'ing an interrupt, we need to re-check the queue
297 DBG_VERBOSE("eoi: pending=0x%02x\n", xc->pending_prio); in xive_do_queue_eoi()
303 * EOI an interrupt at the source. There are several methods
308 /* If the XIVE supports the new "store EOI facility, use it */ in xive_do_source_eoi()
319 if (WARN_ON_ONCE(!xive_ops->eoi)) in xive_do_source_eoi()
321 xive_ops->eoi(hw_irq); in xive_do_source_eoi()
326 * Otherwise for EOI, we use the special MMIO that does in xive_do_source_eoi()
328 * except for LSIs where we use the "EOI cycle" special in xive_do_source_eoi()
[all …]
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| /kernel/linux/linux-4.19/drivers/xen/events/ |
| D | events_base.c | 424 struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu); in lateeoi_list_del() local
427 spin_lock_irqsave(&eoi->eoi_list_lock, flags); in lateeoi_list_del()
429 spin_unlock_irqrestore(&eoi->eoi_list_lock, flags); in lateeoi_list_del()
434 struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu); in lateeoi_list_add() local
445 spin_lock_irqsave(&eoi->eoi_list_lock, flags); in lateeoi_list_add()
447 if (list_empty(&eoi->eoi_list)) { in lateeoi_list_add()
448 list_add(&info->eoi_list, &eoi->eoi_list); in lateeoi_list_add()
450 &eoi->delayed, delay); in lateeoi_list_add()
452 list_for_each_entry_reverse(elem, &eoi->eoi_list, eoi_list) { in lateeoi_list_add()
459 spin_unlock_irqrestore(&eoi->eoi_list_lock, flags); in lateeoi_list_add()
[all …]
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| /kernel/linux/linux-5.10/arch/x86/kvm/ |
| D | ioapic.c | 199 * If no longer has pending EOI in LAPICs, update in ioapic_lazy_update_eoi()
200 * EOI for this vector. in ioapic_lazy_update_eoi()
225 * AMD SVM AVIC accelerate EOI write iff the interrupt is edge in ioapic_set_irq()
227 * to receive the EOI. In this case, we do a lazy update of the in ioapic_set_irq()
228 * pending EOI when trying to set IOAPIC irq. in ioapic_set_irq()
237 * us if the interrupt is waiting for an EOI. in ioapic_set_irq()
240 * if it has been already ack-ed via EOI because coalesced RTC in ioapic_set_irq()
242 * EOI manually for the RTC interrupt. in ioapic_set_irq()
288 /* Make sure we see any missing RTC EOI */ in kvm_ioapic_scan_entry()
364 * explicit EOI on IOAPICs that don't have the EOI register. in ioapic_write_indirect()
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/sysdev/xive/ |
| D | common.c | 315 * as a "replay" because EOI decided there was still something in xive_get_irq()
323 * entry (on HW interrupt) from a replay triggered by EOI, in xive_get_irq()
344 * After EOI'ing an interrupt, we need to re-check the queue
356 DBG_VERBOSE("eoi: pending=0x%02x\n", xc->pending_prio); in xive_do_queue_eoi()
362 * EOI an interrupt at the source. There are several methods
368 /* If the XIVE supports the new "store EOI facility, use it */ in xive_do_source_eoi()
379 if (WARN_ON_ONCE(!xive_ops->eoi)) in xive_do_source_eoi()
381 xive_ops->eoi(hw_irq); in xive_do_source_eoi()
386 * Otherwise for EOI, we use the special MMIO that does in xive_do_source_eoi()
388 * except for LSIs where we use the "EOI cycle" special in xive_do_source_eoi()
[all …]
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| /kernel/linux/linux-4.19/Documentation/virtual/kvm/ |
| D | msr.txt | 253 injection. Value of 1 means that guest can skip writing EOI to the apic
255 EOI by clearing the bit in guest memory - this location will
257 Value of 0 means that the EOI write is required.
260 the APIC EOI write anyway.
271 whether it can skip EOI apic write and between guest
272 clearing it to signal EOI to the hypervisor,
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| /kernel/linux/linux-5.10/arch/x86/kernel/ |
| D | i8259.c | 147 * first, _then_ send the EOI, and the order of EOI
180 /* 'Specific EOI' to slave */ in mask_and_ack_8259A()
182 /* 'Specific EOI' to master-IRQ2 */ in mask_and_ack_8259A()
187 outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */ in mask_and_ack_8259A()
348 if (auto_eoi) /* master does Auto EOI */ in init_8259A()
350 else /* master expects normal EOI */ in init_8259A()
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| /kernel/linux/linux-4.19/arch/x86/kernel/ |
| D | i8259.c | 147 * first, _then_ send the EOI, and the order of EOI
180 /* 'Specific EOI' to slave */ in mask_and_ack_8259A()
182 /* 'Specific EOI' to master-IRQ2 */ in mask_and_ack_8259A()
187 outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */ in mask_and_ack_8259A()
348 if (auto_eoi) /* master does Auto EOI */ in init_8259A()
350 else /* master expects normal EOI */ in init_8259A()
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| /kernel/linux/linux-5.10/Documentation/virt/kvm/ |
| D | msr.rst | 319 injection. Value of 1 means that guest can skip writing EOI to the apic
321 EOI by clearing the bit in guest memory - this location will
323 Value of 0 means that the EOI write is required.
326 the APIC EOI write anyway.
337 whether it can skip EOI apic write and between guest
338 clearing it to signal EOI to the hypervisor,
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| /kernel/linux/linux-5.10/arch/x86/kernel/cpu/ |
| D | acrn.c | 43 * The hypervisor requires that the APIC EOI should be acked. in DEFINE_IDTENTRY_SYSVEC()
44 * If the APIC EOI is not acked, the APIC ISR bit for the in DEFINE_IDTENTRY_SYSVEC()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | mstar,mst-intc.yaml | 42 mstar,intc-no-eoi:
44 Mark this controller has no End Of Interrupt(EOI) implementation.
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| /kernel/linux/linux-4.19/arch/powerpc/include/asm/ |
| D | xive-regs.h | 18 * to a queue and is waiting for an EOI). Q indicates that the
24 * When doing an EOI, the Q bit will indicate if the interrupt
32 * Additionally, some ESB pages support doing an EOI via a
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | xive-regs.h | 14 * to a queue and is waiting for an EOI). Q indicates that the
20 * When doing an EOI, the Q bit will indicate if the interrupt
28 * Additionally, some ESB pages support doing an EOI via a
|