| /kernel/linux/linux-5.10/drivers/gpu/drm/meson/ |
| D | meson_vclk.c | 49 /* HHI Registers */
140 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, VID_PLL_EN, 0); in meson_vid_pll_set()
141 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, VID_PLL_PRESET, 0); in meson_vid_pll_set()
204 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
208 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
211 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
213 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
215 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
219 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
221 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
[all …]
|
| D | meson_venc_cvbs.c | 25 /* HHI VDAC Registers */
170 regmap_write(priv->hhi, HHI_VDAC_CNTL0_G12A, 0); in meson_venc_cvbs_encoder_disable()
171 regmap_write(priv->hhi, HHI_VDAC_CNTL1_G12A, 0); in meson_venc_cvbs_encoder_disable()
173 regmap_write(priv->hhi, HHI_VDAC_CNTL0, 0); in meson_venc_cvbs_encoder_disable()
174 regmap_write(priv->hhi, HHI_VDAC_CNTL1, 8); in meson_venc_cvbs_encoder_disable()
189 regmap_write(priv->hhi, HHI_VDAC_CNTL0, 1); in meson_venc_cvbs_encoder_enable()
190 regmap_write(priv->hhi, HHI_VDAC_CNTL1, 0); in meson_venc_cvbs_encoder_enable()
193 regmap_write(priv->hhi, HHI_VDAC_CNTL0, 0xf0001); in meson_venc_cvbs_encoder_enable()
194 regmap_write(priv->hhi, HHI_VDAC_CNTL1, 0); in meson_venc_cvbs_encoder_enable()
196 regmap_write(priv->hhi, HHI_VDAC_CNTL0_G12A, 0x906001); in meson_venc_cvbs_encoder_enable()
[all …]
|
| D | meson_dw_hdmi.c | 64 * HHI register block.
106 /* HHI Registers */
311 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x333d3282); in meson_hdmi_phy_setup_mode()
312 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2136315b); in meson_hdmi_phy_setup_mode()
315 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33303382); in meson_hdmi_phy_setup_mode()
316 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2036315b); in meson_hdmi_phy_setup_mode()
319 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33303362); in meson_hdmi_phy_setup_mode()
320 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2016315b); in meson_hdmi_phy_setup_mode()
323 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33604142); in meson_hdmi_phy_setup_mode()
324 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x0016315b); in meson_hdmi_phy_setup_mode()
[all …]
|
| D | meson_drv.c | 238 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi"); in meson_drv_bind_master()
250 priv->hhi = devm_regmap_init_mmio(dev, regs, in meson_drv_bind_master()
252 if (IS_ERR(priv->hhi)) { in meson_drv_bind_master()
253 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n"); in meson_drv_bind_master()
254 ret = PTR_ERR(priv->hhi); in meson_drv_bind_master()
|
| D | meson_venc.c | 61 /* HHI Registers */
1752 regmap_update_bits(priv->hhi, HHI_GCLK_MPEG2, BIT(25), BIT(25)); in meson_venc_enable_vsync()
1757 regmap_update_bits(priv->hhi, HHI_GCLK_MPEG2, BIT(25), 0); in meson_venc_disable_vsync()
1765 regmap_write(priv->hhi, HHI_VDAC_CNTL0_G12A, 0); in meson_venc_init()
1766 regmap_write(priv->hhi, HHI_VDAC_CNTL1_G12A, 8); in meson_venc_init()
1768 regmap_write(priv->hhi, HHI_VDAC_CNTL0, 0); in meson_venc_init()
1769 regmap_write(priv->hhi, HHI_VDAC_CNTL1, 8); in meson_venc_init()
1776 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0); in meson_venc_init()
|
| D | meson_drv.h | 41 struct regmap *hhi; member
|
| /kernel/linux/linux-4.19/drivers/gpu/drm/meson/ |
| D | meson_vclk.c | 60 /* HHI Registers */
145 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, VID_PLL_EN, 0); in meson_vid_pll_set()
146 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, VID_PLL_PRESET, 0); in meson_vid_pll_set()
209 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
213 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
216 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
218 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
220 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
224 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
226 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
[all …]
|
| D | meson_dw_hdmi.c | 73 * HHI register block.
114 /* HHI Registers */
273 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x333d3282); in meson_hdmi_phy_setup_mode()
274 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2136315b); in meson_hdmi_phy_setup_mode()
277 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33303382); in meson_hdmi_phy_setup_mode()
278 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2036315b); in meson_hdmi_phy_setup_mode()
281 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33303362); in meson_hdmi_phy_setup_mode()
282 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2016315b); in meson_hdmi_phy_setup_mode()
285 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33604142); in meson_hdmi_phy_setup_mode()
286 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x0016315b); in meson_hdmi_phy_setup_mode()
[all …]
|
| D | meson_venc_cvbs.c | 38 /* HHI VDAC Registers */
182 regmap_write(priv->hhi, HHI_VDAC_CNTL0, 0); in meson_venc_cvbs_encoder_disable()
183 regmap_write(priv->hhi, HHI_VDAC_CNTL1, 8); in meson_venc_cvbs_encoder_disable()
196 regmap_write(priv->hhi, HHI_VDAC_CNTL0, 1); in meson_venc_cvbs_encoder_enable()
199 regmap_write(priv->hhi, HHI_VDAC_CNTL0, 0xf0001); in meson_venc_cvbs_encoder_enable()
201 regmap_write(priv->hhi, HHI_VDAC_CNTL1, 0); in meson_venc_cvbs_encoder_enable()
|
| D | meson_drv.c | 203 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi"); in meson_drv_bind_master()
215 priv->hhi = devm_regmap_init_mmio(dev, regs, in meson_drv_bind_master()
217 if (IS_ERR(priv->hhi)) { in meson_drv_bind_master()
218 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n"); in meson_drv_bind_master()
219 ret = PTR_ERR(priv->hhi); in meson_drv_bind_master()
|
| D | meson_drv.h | 30 struct regmap *hhi; member
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/clock/ |
| D | amlogic,gxbb-clkc.txt | 21 - compatible: "syscon", "simple-mfd, and "amlogic,meson-gx-hhi-sysctrl" or
22 "amlogic,meson-axg-hhi-sysctrl"
23 - reg: base address and size of the HHI system control register space.
28 compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd";
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | amlogic,gxbb-clkc.txt | 27 - compatible: "syscon", "simple-mfd, and "amlogic,meson-gx-hhi-sysctrl" or
28 "amlogic,meson-axg-hhi-sysctrl"
29 - reg: base address and size of the HHI system control register space.
34 compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd";
|
| D | amlogic,meson8b-clkc.txt | 21 - compatible: "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"
22 - reg: base address and size of the HHI system control register space.
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | amlogic,meson-saradc.yaml | 56 amlogic,hhi-sysctrl:
103 amlogic,hhi-sysctrl: true
106 amlogic,hhi-sysctrl: false
146 amlogic,hhi-sysctrl = <&hhi>;
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/power/ |
| D | amlogic,meson-gx-pwrc.txt | 21 - amlogic,hhi-sysctrl: phandle to the HHI sysctrl node
42 amlogic,hhi-sysctrl = <&sysctrl>;
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/ |
| D | amlogic,meson-gx-pwrc.txt | 23 - amlogic,hhi-sysctrl: phandle to the HHI sysctrl node
44 amlogic,hhi-sysctrl = <&sysctrl>;
|
| /kernel/linux/linux-5.10/drivers/clk/meson/ |
| D | meson-eeclk.c | 27 /* Get the hhi system controller node */ in meson_eeclkc_probe()
31 "failed to get HHI regmap\n"); in meson_eeclkc_probe()
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ |
| D | amlogic,meson-vpu.yaml | 17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
76 - const: hhi
117 reg-names = "vpu", "hhi";
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/ |
| D | amlogic,meson-vpu.txt | 7 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
62 - hhi
103 reg-names = "vpu", "hhi", "dmc";
|
| /kernel/linux/linux-4.19/drivers/soc/amlogic/ |
| D | meson-gx-pwrc-vpu.c | 24 /* HHI Offsets */
179 "amlogic,hhi-sysctrl"); in meson_gx_pwrc_vpu_probe()
181 dev_err(&pdev->dev, "failed to get HHI regmap\n"); in meson_gx_pwrc_vpu_probe()
|
| /kernel/linux/linux-5.10/drivers/soc/amlogic/ |
| D | meson-gx-pwrc-vpu.c | 25 /* HHI Offsets */
300 "amlogic,hhi-sysctrl"); in meson_gx_pwrc_vpu_probe()
302 dev_err(&pdev->dev, "failed to get HHI regmap\n"); in meson_gx_pwrc_vpu_probe()
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | meson.dtsi | 27 hhi: system-controller@4000 { label
28 compatible = "amlogic,meson-hhi-sysctrl",
|
| D | meson8b.dtsi | 457 &hhi {
562 amlogic,hhi-sysctrl = <&hhi>;
|
| /kernel/linux/linux-4.19/arch/arm64/boot/dts/amlogic/ |
| D | meson-gx.dtsi | 353 amlogic,hhi-sysctrl = <&sysctrl>;
434 compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd";
491 reg-names = "vpu", "hhi", "dmc";
|