| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mmc/ |
| D | mtk-sd.txt | 33 - assigned-clock-parents: parent of source clock, used for HS400 mode to get 400Mhz source clock
34 - hs400-ds-delay: HS400 DS delay setting
38 - mediatek,hs400-cmd-int-delay: HS400 command internal delay setting
41 - mediatek,hs400-cmd-resp-sel-rising: HS400 command response sample selection
42 If present,HS400 command responses are sampled on rising edges.
43 If not present,HS400 command responses are sampled on falling edges.
64 hs400-ds-delay = <0x14015>;
66 mediatek,hs400-cmd-int-delay = <14>;
67 mediatek,hs400-cmd-resp-sel-rising;
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| D | sdhci-cadence.txt | 19 - mmc-hs400-1_8v
20 - mmc-hs400-1_2v
58 for all modes except HS200, HS400 and HS400_ES.
62 for HS200, HS400 and HS400_ES speed modes.
66 used in HS400 / HS400_ES speed modes.
78 mmc-hs400-1_8v;
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| D | exynos-dw-mshc.txt | 39 * samsung,dw-mshc-hs400-timing: Specifies the value of CIU TX and RX clock phase
40 shift value for hs400 mode operation.
55 * samsung,read-strobe-delay: RCLK (Data strobe) delay to control HS400 mode
89 samsung,dw-mshc-hs400-timing = <0 2>;
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| D | mmc.txt | 50 - mmc-hs400-1_8v: eMMC HS400 mode(1.8V I/O) is supported
51 - mmc-hs400-1_2v: eMMC HS400 mode(1.2V I/O) is supported
52 - mmc-hs400-enhanced-strobe: eMMC HS400 enhanced strobe mode is supported
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | mtk-sd.txt | 38 - assigned-clock-parents: parent of source clock, used for HS400 mode to get 400Mhz source clock
39 - hs400-ds-delay: HS400 DS delay setting
43 - mediatek,hs400-cmd-int-delay: HS400 command internal delay setting
46 - mediatek,hs400-cmd-resp-sel-rising: HS400 command response sample selection
47 If present,HS400 command responses are sampled on rising edges.
48 If not present,HS400 command responses are sampled on falling edges.
71 hs400-ds-delay = <0x14015>;
73 mediatek,hs400-cmd-int-delay = <14>;
74 mediatek,hs400-cmd-resp-sel-rising;
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| D | nvidia,tegra20-sdhci.txt | 79 - nvidia,pad-autocal-pull-up-offset-hs400,
80 nvidia,pad-autocal-pull-down-offset-hs400 : Specify drive strength
81 calibration offsets for HS400 mode.
86 - nvidia,dqs-trim : Specify DQS trim value for HS400 timing
94 - The SDR104 and HS400 timing specific values are used in
104 HS400 timing. Only SDMMC4 on Tegra210 and Tegra 186 supports
105 HS400.
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| D | exynos-dw-mshc.txt | 39 * samsung,dw-mshc-hs400-timing: Specifies the value of CIU TX and RX clock phase
40 shift value for hs400 mode operation.
55 * samsung,read-strobe-delay: RCLK (Data strobe) delay to control HS400 mode
89 samsung,dw-mshc-hs400-timing = <0 2>;
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| D | cdns,sdhci.yaml | 93 HS200, HS400 and HS400_ES.
100 Value of the delay introduced on the sdclk output for HS200, HS400 and
109 HS400 / HS400_ES speed modes.
132 mmc-hs400-1_8v;
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| D | sdhci-sprd.txt | 40 - sprd,phy-delay-mmc-hs400: Delay value for MMC HS400 timing.
41 - sprd,phy-delay-mmc-hs400es: Delay value for MMC HS400 enhanced strobe timing.
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| D | sdhci-am654.yaml | 111 ti,otap-del-sel-hs400:
112 description: Output tap delay for eMMC HS400 timing
174 description: strobe select delay for HS400 speed mode.
213 ti,otap-del-sel-hs400 = <0x0>;
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| D | mmc-controller.yaml | 206 mmc-hs400-1_2v:
209 eMMC HS400 mode (1.2V I/O) is supported.
211 mmc-hs400-1_8v:
214 eMMC HS400 mode (1.8V I/O) is supported.
216 mmc-hs400-enhanced-strobe:
219 eMMC HS400 enhanced strobe mode is supported
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| D | brcm,sdhci-brcmstb.txt | 39 mmc-hs400-1_8v;
40 mmc-hs400-enhanced-strobe;
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| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | sdhci-acpi.c | 569 * The initialization sequence for HS400 is:
570 * HS->HS200->Perform Tuning->HS->HS400
573 * HS400->DDR52->HS->HS200->Perform Tuning->HS->HS400
575 * The AMD eMMC Controller can only use the tuned clock while in HS200 and HS400
578 * HS400, we can re-enable the tuned clock.
603 /* DLL is only required for HS400 */ in amd_set_ios()
673 * b) The HS200 and HS400 driver strengths don't match. in sdhci_acpi_emmc_amd_probe_slot()
675 * A, but the (internal) HS400 preset register has a driver in sdhci_acpi_emmc_amd_probe_slot()
676 * strength of B. As part of initializing HS400, HS200 tuning in sdhci_acpi_emmc_amd_probe_slot()
683 * HS400 preset driver strengths match. in sdhci_acpi_emmc_amd_probe_slot()
[all …]
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| D | renesas_sdhi.h | 17 u32 tap; /* sampling clock position for SDR104/HS400 (8 TAP) */
18 u32 tap_hs400_4tap; /* sampling clock position for HS400 (4 TAP) */
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| D | sdhci-xenon-phy.c | 318 * and before HS400 data strobe setting.
436 /* Set HS400 Data Strobe and Enhanced Strobe */
449 dev_dbg(mmc_dev(host->mmc), "starts HS400 strobe delay adjustment\n"); in xenon_emmc_phy_strobe_delay_adj()
459 * 1. card is in HS400 mode and in xenon_emmc_phy_strobe_delay_adj()
638 /* Hardware team recommend a value for HS400 */ in xenon_emmc_phy_set()
732 * HS400 set Data Strobe and Enhanced Strobe if it is supported.
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| D | dw_mmc-exynos.c | 239 * related to HS400 in dw_mci_exynos_config_hs400()
244 "cannot configure HS400, unsupported chipset\n"); in dw_mci_exynos_config_hs400()
331 /* Configure setting for HS400 */ in dw_mci_exynos_set_ios()
380 "samsung,dw-mshc-hs400-timing", timing, 2); in dw_mci_exynos_parse_dt()
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| /kernel/linux/linux-4.19/drivers/mmc/host/ |
| D | sdhci-acpi.c | 506 * mode, later enable to tune to HS400 mode.
557 * b) The HS200 and HS400 driver strengths don't match. in sdhci_acpi_emmc_amd_probe_slot()
559 * A, but the (internal) HS400 preset register has a driver in sdhci_acpi_emmc_amd_probe_slot()
560 * strength of B. As part of initializing HS400, HS200 tuning in sdhci_acpi_emmc_amd_probe_slot()
567 * HS400 preset driver strengths match. in sdhci_acpi_emmc_amd_probe_slot()
569 * Enabling presets for HS400 doesn't work for the following reasons: in sdhci_acpi_emmc_amd_probe_slot()
573 * read out HS400 presets. The AMD controller doesn't support this in sdhci_acpi_emmc_amd_probe_slot()
574 * non-standard register. In fact, it doesn't expose the HS400 in sdhci_acpi_emmc_amd_probe_slot()
578 * Since HS400 and HS200 presets must be identical, we could in sdhci_acpi_emmc_amd_probe_slot()
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| D | sdhci-xenon-phy.c | 321 * and before HS400 data strobe setting.
439 /* Set HS400 Data Strobe and Enhanced Strobe */
452 dev_dbg(mmc_dev(host->mmc), "starts HS400 strobe delay adjustment\n"); in xenon_emmc_phy_strobe_delay_adj()
462 * 1. card is in HS400 mode and in xenon_emmc_phy_strobe_delay_adj()
641 /* Hardware team recommend a value for HS400 */ in xenon_emmc_phy_set()
735 * HS400 set Data Strobe and Enhanced Strobe if it is supported.
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| D | dw_mmc-exynos.c | 241 * related to HS400 in dw_mci_exynos_config_hs400()
246 "cannot configure HS400, unsupported chipset\n"); in dw_mci_exynos_config_hs400()
322 /* Configure setting for HS400 */ in dw_mci_exynos_set_ios()
371 "samsung,dw-mshc-hs400-timing", timing, 2); in dw_mci_exynos_parse_dt()
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| D | sdhci-msm.c | 443 * HS400/HS200 timing mode).
765 * Select HS400 mode using the HC_SELECT_IN from VENDOR SPEC in msm_hc_select_hs400()
804 * eMMC specific HS200/HS400 doesn't have their respective modes
808 * HS400 - This involves multiple configurations
810 * Then when switching to DDR @ 400MHz (HS400) we use
816 * HS400 - divided clock (free running MCLK/2)
842 * Retuning in HS400 (DDR mode) will fail, just reset the in sdhci_msm_cdclp533_calibration()
1010 * Retuning in HS400 (DDR mode) will fail, just reset the in sdhci_msm_hs400_dll_calibration()
1071 * Tuning is required for SDR104, HS200 and HS400 cards and in sdhci_msm_execute_tuning()
1088 * HS400 settings. in sdhci_msm_execute_tuning()
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/ |
| D | rk3399-nanopc-t4.dts | 112 mmc-hs400-1_8v;
113 mmc-hs400-enhanced-strobe;
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| /kernel/linux/linux-5.10/include/linux/mmc/ |
| D | host.h | 148 /* Prepare HS400 target operating frequency depending host driver */
151 /* Prepare switch to DDR during the HS400 init sequence */
154 /* Prepare for switching from HS400 to HS200 */
157 /* Complete selection of HS400 */
361 #define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */
362 #define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/sprd/ |
| D | whale2.dtsi | 146 sprd,phy-delay-mmc-hs400 = <0x44 0x7f 0x2e 0x2e>;
156 mmc-hs400-enhanced-strobe;
157 mmc-hs400-1_8v;
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| /kernel/linux/linux-4.19/arch/arm64/boot/dts/rockchip/ |
| D | rk3399-evb.dts | 151 mmc-hs400-1_8v;
152 mmc-hs400-enhanced-strobe;
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| /kernel/linux/linux-4.19/include/linux/mmc/ |
| D | host.h | 147 /* Prepare HS400 target operating frequency depending host driver */
150 /* Prepare for switching from HS400 to HS200 */
153 /* Complete selection of HS400 */
356 #define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */
357 #define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
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