Searched +full:i2c +full:- +full:controller (Results 1 – 25 of 1055) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/ |
| D | nvidia,tegra20-i2c.txt | 1 NVIDIA Tegra20/Tegra30/Tegra114 I2C controller driver.
4 - compatible : For Tegra20, must be one of "nvidia,tegra20-i2c-dvc" or
5 "nvidia,tegra20-i2c". For Tegra30, must be "nvidia,tegra30-i2c".
6 For Tegra114, must be "nvidia,tegra114-i2c". Otherwise, must be
7 "nvidia,<chip>-i2c", plus at least one of the above, where <chip> is
10 nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
11 controller. This only support master mode of I2C communication. Register
12 interface/offset and interrupts handling are different than generic I2C
13 controller. Driver of DVC I2C controller is only compatible with
14 "nvidia,tegra20-i2c-dvc".
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| D | i2c-pxa-pci-ce4100.txt | 1 CE4100 I2C
2 ----------
4 CE4100 has one PCI device which is described as the I2C-Controller. This
5 PCI device has three PCI-bars, each bar contains a complete I2C
6 controller. So we have a total of three independent I2C-Controllers
8 The driver is probed via the PCI-ID and is gathering the information of
10 Grant Likely recommended to use the ranges property to map the PCI-Bar
12 of the specific I2C controller. This were his exact words:
22 non-zero if you had 2 or more devices mapped off
30 ------------------------------------------------
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| D | snps,designware-i2c.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare APB I2C Controller
10 - Jarkko Nikula <jarkko.nikula@linux.intel.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 const: mscc,ocelot-i2c
28 - description: Generic Synopsys DesignWare I2C controller
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| D | i2c-s3c2410.txt | 1 * Samsung's I2C controller
3 The Samsung's I2C controller is used to interface with I2C devices.
6 - compatible: value should be either of the following.
7 (a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c.
8 (b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c.
9 (c) "samsung, s3c2440-hdmiphy-i2c", for s3c2440-like i2c used
11 (d) "samsung, exynos5-sata-phy-i2c", for s3c2440-like i2c used as
12 a host to SATA PHY controller on an internal bus.
13 - reg: physical base address of the controller and length of memory mapped
15 - interrupts: interrupt number to the cpu.
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| D | i2c-mux-gpmux.txt | 1 General Purpose I2C Bus Mux
3 This binding describes an I2C bus multiplexer that uses a mux controller
4 from the mux subsystem to route the I2C signals.
6 .-----. .-----.
8 .------------. '-----' '-----'
10 | | .--------+--------'
11 | .------. | .------+ child bus A, on MUX value set to 0
12 | | I2C |-|--| Mux |
13 | '------' | '--+---+ child bus B, on MUX value set to 1
14 | .------. | | '----------+--------+--------.
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| D | i2c-pxa.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-pxa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MMP I2C controller bindings
10 - Rob Herring <robh+dt@kernel.org>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
17 - mrvl,i2c-polling
20 - interrupts
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| D | cdns,i2c-r1p10.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/i2c/cdns,i2c-r1p10.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Cadence I2C controller Device Tree Bindings
10 - Michal Simek <michal.simek@xilinx.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - cdns,i2c-r1p10 # cadence i2c controller version 1.0
19 - cdns,i2c-r1p14 # cadence i2c controller version 1.4
30 clock-frequency:
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| D | i2c-ocores.txt | 1 Device tree configuration for i2c-ocores
4 - compatible : "opencores,i2c-ocores"
6 "sifive,fu540-c000-i2c", "sifive,i2c0"
7 For Opencore based I2C IP block reimplemented in
8 FU540-C000 SoC. Please refer to sifive-blocks-ip-versioning.txt
10 - reg : bus address start and address range size of device
11 - clocks : handle to the controller clock; see the note below.
12 Mutually exclusive with opencores,ip-clock-frequency
13 - opencores,ip-clock-frequency: frequency of the controller clock in Hz;
15 - #address-cells : should be <1>
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| D | nuvoton,npcm7xx-i2c.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/nuvoton,npcm7xx-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: nuvoton NPCM7XX I2C Controller Device Tree Bindings
10 The NPCM750x includes sixteen I2C bus controllers. All Controllers support
11 both master and slave mode. Each controller can switch between master and slave
12 at run time (i.e. IPMB mode). Each controller has two 16 byte HW FIFO for TX and
16 - Tali Perry <tali.perry1@gmail.com>
20 const: nuvoton,npcm7xx-i2c
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| D | i2c-rk3x.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3xxx I2C controller
10 This driver interfaces with the native I2C controller present in Rockchip
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rv1108-i2c
24 - const: rockchip,rk3066-i2c
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| D | ingenic,i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/ingenic,i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs I2C controller devicetree bindings
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
17 pattern: "^i2c@[0-9a-f]+$"
21 - enum:
22 - ingenic,jz4770-i2c
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| D | i2c-mux-pca954x.txt | 1 * NXP PCA954x I2C bus switch
3 The driver supports NXP PCA954x and PCA984x I2C mux/switch devices.
7 - compatible: Must contain one of the following.
18 - reg: The I2C address of the device.
22 - Standard I2C mux properties. See i2c-mux.txt in this directory.
23 - I2C child bus nodes. See i2c-mux.txt in this directory.
27 - reset-gpios: Reference to the GPIO connected to the reset input.
28 - idle-state: if present, overrides i2c-mux-idle-disconnect,
29 Please refer to Documentation/devicetree/bindings/mux/mux-controller.txt
30 - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all
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| D | i2c-imx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
10 - Wolfram Sang <wolfram@the-dreams.de>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - const: fsl,imx1-i2c
19 - const: fsl,imx21-i2c
20 - const: fsl,vf610-i2c
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/i2c/ |
| D | nvidia,tegra20-i2c.txt | 1 NVIDIA Tegra20/Tegra30/Tegra114 I2C controller driver.
4 - compatible : For Tegra20, must be one of "nvidia,tegra20-i2c-dvc" or
5 "nvidia,tegra20-i2c". For Tegra30, must be "nvidia,tegra30-i2c".
6 For Tegra114, must be "nvidia,tegra114-i2c". Otherwise, must be
7 "nvidia,<chip>-i2c", plus at least one of the above, where <chip> is
10 nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
11 controller. This only support master mode of I2C communication. Register
12 interface/offset and interrupts handling are different than generic I2C
13 controller. Driver of DVC I2C controller is only compatible with
14 "nvidia,tegra20-i2c-dvc".
[all …]
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| D | i2c-pxa-pci-ce4100.txt | 1 CE4100 I2C
2 ----------
4 CE4100 has one PCI device which is described as the I2C-Controller. This
5 PCI device has three PCI-bars, each bar contains a complete I2C
6 controller. So we have a total of three independent I2C-Controllers
8 The driver is probed via the PCI-ID and is gathering the information of
10 Grant Likely recommended to use the ranges property to map the PCI-Bar
12 of the specific I2C controller. This were his exact words:
22 non-zero if you had 2 or more devices mapped off
30 ------------------------------------------------
[all …]
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| D | i2c-s3c2410.txt | 1 * Samsung's I2C controller
3 The Samsung's I2C controller is used to interface with I2C devices.
6 - compatible: value should be either of the following.
7 (a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c.
8 (b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c.
9 (c) "samsung, s3c2440-hdmiphy-i2c", for s3c2440-like i2c used
11 (d) "samsung, exynos5-sata-phy-i2c", for s3c2440-like i2c used as
12 a host to SATA PHY controller on an internal bus.
13 - reg: physical base address of the controller and length of memory mapped
15 - interrupts: interrupt number to the cpu.
[all …]
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| D | i2c-mux-gpmux.txt | 1 General Purpose I2C Bus Mux
3 This binding describes an I2C bus multiplexer that uses a mux controller
4 from the mux subsystem to route the I2C signals.
6 .-----. .-----.
8 .------------. '-----' '-----'
10 | | .--------+--------'
11 | .------. | .------+ child bus A, on MUX value set to 0
12 | | I2C |-|--| Mux |
13 | '------' | '--+---+ child bus B, on MUX value set to 1
14 | .------. | | '----------+--------+--------.
[all …]
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| D | i2c-ocores.txt | 1 Device tree configuration for i2c-ocores
4 - compatible : "opencores,i2c-ocores" or "aeroflexgaisler,i2cmst"
5 - reg : bus address start and address range size of device
6 - interrupts : interrupt number
7 - clocks : handle to the controller clock; see the note below.
8 Mutually exclusive with opencores,ip-clock-frequency
9 - opencores,ip-clock-frequency: frequency of the controller clock in Hz;
11 - #address-cells : should be <1>
12 - #size-cells : should be <0>
15 - clock-frequency : frequency of bus clock in Hz; see the note below.
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| D | i2c-pxa.txt | 1 * Marvell MMP I2C controller
5 - reg : Offset and length of the register set for the device
6 - compatible : should be "mrvl,mmp-twsi" where mmp is the name of a
8 For the pxa2xx/pxa3xx, an additional node "mrvl,pxa-i2c" is required
10 For the Armada 3700, the compatible should be "marvell,armada-3700-i2c".
14 - interrupts : the interrupt number
15 - mrvl,i2c-polling : Disable interrupt of i2c controller. Polling
16 status register of i2c controller instead.
17 - mrvl,i2c-fast-mode : Enable fast mode of i2c controller.
20 twsi1: i2c@d4011000 {
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| /kernel/linux/linux-5.10/drivers/i2c/busses/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
6 menu "I2C Hardware Bus support"
9 comment "PC SMBus host controller drivers"
17 Host controller on Acer Labs Inc. (ALI) M1535 South Bridges. The SMB
18 controller is part of the 7101 device, which is an ACPI-compliant
22 will be called i2c-ali1535.
29 Host controller on Acer Labs Inc. (ALI) M1563 South Bridges. The SMB
30 controller is part of the 7101 device, which is an ACPI-compliant
34 will be called i2c-ali1563.
41 Acer Labs Inc. (ALI) M1514 and M1543 motherboard I2C interfaces.
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| /kernel/linux/linux-4.19/drivers/i2c/busses/ |
| D | Kconfig | 5 menu "I2C Hardware Bus support"
8 comment "PC SMBus host controller drivers"
16 Host controller on Acer Labs Inc. (ALI) M1535 South Bridges. The SMB
17 controller is part of the 7101 device, which is an ACPI-compliant
21 will be called i2c-ali1535.
28 Host controller on Acer Labs Inc. (ALI) M1563 South Bridges. The SMB
29 controller is part of the 7101 device, which is an ACPI-compliant
33 will be called i2c-ali1563.
40 Acer Labs Inc. (ALI) M1514 and M1543 motherboard I2C interfaces.
43 will be called i2c-ali15x3.
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| /kernel/linux/linux-5.10/drivers/clk/qcom/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
32 tristate "MSM8916 APCS Clock Controller"
35 Support for the APCS Clock Controller on msm8916 devices. The
41 tristate "MSM8996 CPU Clock Controller"
45 Support for the CPU clock controller on msm8996 devices.
50 tristate "RPM based Clock Controller"
63 tristate "RPM over SMD based Clock Controller"
85 tristate "APQ8084 Global Clock Controller"
88 Support for the global clock controller on apq8084 devices.
90 i2c, USB, SD/eMMC, SATA, PCIe, etc.
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| /kernel/linux/linux-4.19/drivers/input/touchscreen/ |
| D | Kconfig | 23 support for the built-in touchscreen.
28 module will be called 88pm860x-ts.
36 ADS7846/TSC2046/AD7873 or ADS7843/AD7843 controller,
37 and your board-specific setup code includes that in its
54 AD7877 controller, and your board-specific initialization
63 tristate "Analog Devices AD7879-1/AD7889-1 touchscreen interface"
66 the AD7879-1/AD7889-1 controller.
74 tristate "support I2C bus connection"
75 depends on TOUCHSCREEN_AD7879 && I2C
78 Say Y here if you have AD7879-1/AD7889-1 hooked to an I2C bus.
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| /kernel/linux/linux-5.10/drivers/input/touchscreen/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
24 support for the built-in touchscreen.
29 module will be called 88pm860x-ts.
37 ADS7846/TSC2046/AD7873 or ADS7843/AD7843 controller,
38 and your board-specific setup code includes that in its
55 AD7877 controller, and your board-specific initialization
64 tristate "Analog Devices AD7879-1/AD7889-1 touchscreen interface"
67 the AD7879-1/AD7889-1 controller.
75 tristate "support I2C bus connection"
76 depends on TOUCHSCREEN_AD7879 && I2C
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| /kernel/linux/linux-5.10/include/linux/i3c/ |
| D | master.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
14 #include <linux/i2c.h>
31 * struct i3c_i2c_dev_desc - Common part of the I3C/I2C device descriptor
32 * @node: node element used to insert the slot into the I2C or I3C device
35 * I2C/I3C transfers
39 * This structure is describing common I3C/I2C dev information.
54 * struct i2c_dev_boardinfo - I2C device board information
55 * @node: used to insert the boardinfo object in the I2C boardinfo list
56 * @base: regular I2C board information
58 * the I2C device limitations
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