Home
last modified time | relevance | path

Searched full:lp1 (Results 1 – 25 of 34) sorted by relevance

12

/kernel/linux/linux-4.19/arch/arm/mach-tegra/
Dpm.c208 * The Tegra devices support suspending to LP1 or lower currently. in tegra_pm_validate_suspend_mode()
230 * Hooking the address of LP1 reset vector and SDRAM self-refresh code in
232 * copy these code to IRAM before LP0/LP1 suspend and restore the content
313 [TEGRA_SUSPEND_LP1] = "LP1",
379 "self-refresh -- LP0/LP1 unavailable\n", in tegra_init_suspend()
Dreset-handler.S39 * an LP2 transition. Also branched to by LP0 and LP1 resume after
108 * R8 = CPU in LP1 state mask
179 /* Waking up from LP1? */
187 bleq __die @ no LP1 startup handler
Dsleep-tegra30.S241 * Enters suspend in LP0 or LP1 by turning off the MMU and jumping to
255 * LP0 / LP1 use physical address, since the MMU needs to be
314 * reset vector for LP1 restore; copied into IRAM during suspend.
602 * puts memory in self-refresh for LP0 and LP1
612 * In LP0 and LP1 all PLLs will be turned off. Switching the CPU and System CLK
646 /* disable PLLM via PMC in LP1 */
683 * executes from IRAM with SDRAM in selfrefresh when target state is LP0 or LP1
829 * and COMP in the lowest power mode when LP1.
Dsleep-tegra20.S231 * Enters suspend in LP0 or LP1 by turning off the mmu and jumping to
333 * reset vector for LP1 restore; copied into IRAM during suspend.
421 * puts memory in self-refresh for LP0 and LP1
431 * In LP0 and LP1 all PLLs will be turned off. Switch the CPU and system clock
473 * executes from IRAM with SDRAM in selfrefresh when target state is LP0 or LP1
/kernel/linux/linux-5.10/arch/arm/mach-tegra/
Dpm.c228 * The Tegra devices support suspending to LP1 or lower currently. in tegra_pm_validate_suspend_mode()
259 * Hooking the address of LP1 reset vector and SDRAM self-refresh code in
261 * copy these code to IRAM before LP0/LP1 suspend and restore the content
342 [TEGRA_SUSPEND_LP1] = "LP1",
418 "self-refresh -- LP0/LP1 unavailable\n", in tegra_init_suspend()
Dsleep-tegra20.S115 * Enters suspend in LP0 or LP1 by turning off the mmu and jumping to
155 * reset vector for LP1 restore; copied into IRAM during suspend.
242 * puts memory in self-refresh for LP0 and LP1
252 * In LP0 and LP1 all PLLs will be turned off. Switch the CPU and system clock
294 * executes from IRAM with SDRAM in selfrefresh when target state is LP0 or LP1
Dreset-handler.S27 * an LP2 transition. Also branched to by LP0 and LP1 resume after
126 * R8 = CPU in LP1 state mask
191 /* Waking up from LP1? */
199 bleq __die @ no LP1 startup handler
Dsleep-tegra30.S232 * Enters suspend in LP0 or LP1 by turning off the MMU and jumping to
246 * LP0 / LP1 use physical address, since the MMU needs to be
305 * reset vector for LP1 restore; copied into IRAM during suspend.
600 * puts memory in self-refresh for LP0 and LP1
610 * In LP0 and LP1 all PLLs will be turned off. Switching the CPU and System CLK
644 /* disable PLLM via PMC in LP1 */
689 * executes from IRAM with SDRAM in selfrefresh when target state is LP0 or LP1
837 * and COMP in the lowest power mode when LP1.
/kernel/linux/linux-4.19/arch/arm/include/asm/mach/
Darch.h44 unsigned char reserve_lp1 :1; /* never has lp1 */
/kernel/linux/linux-5.10/arch/arm/include/asm/mach/
Darch.h41 unsigned char reserve_lp1 :1; /* never has lp1 */
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra20-pmc.txt34 1 (LP1): CPU voltage off and DRAM in self-refresh
/kernel/linux/linux-4.19/arch/arm/kernel/
Dsetup.c219 #define lp1 io_res[1] macro
902 * possessing lp0, lp1 or lp2 in request_standard_resources()
907 request_resource(&ioport_resource, &lp1); in request_standard_resources()
/kernel/linux/linux-5.10/arch/arm/kernel/
Dsetup.c217 #define lp1 io_res[1] macro
914 * possessing lp0, lp1 or lp2 in request_standard_resources()
919 request_resource(&ioport_resource, &lp1); in request_standard_resources()
/kernel/linux/linux-5.10/Documentation/admin-guide/
Dparport.rst222 the first parallel port, and /dev/lp1 to be the **third** parallel port,
Ddevices.txt168 1 = /dev/lp1 Parallel printer on parport1
986 1 = /dev/pd_bdm1 PD BDM interface on lp1
989 5 = /dev/icd_bdm1 ICD BDM interface on lp1
/kernel/linux/linux-4.19/Documentation/admin-guide/
Dparport.rst222 the first parallel port, and /dev/lp1 to be the **third** parallel port,
/kernel/linux/linux-5.10/drivers/clk/
Dclk-si514.c122 /* Calculate LP1/LP2 according to table 13 in the datasheet */ in si514_set_muldiv()
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra20-pmc.yaml93 Mode 1 is for LP1, CPU voltage off and DRAM in self-refresh
/kernel/linux/linux-4.19/drivers/clk/
Dclk-si514.c131 /* Calculate LP1/LP2 according to table 13 in the datasheet */ in si514_set_muldiv()
/kernel/linux/linux-5.10/drivers/char/
Dlp.c44 * lp=parport1,none,parport2 (bind lp0 to parport1, disable lp1 and
72 * lp1 0x378
/kernel/linux/linux-4.19/drivers/char/
Dlp.c43 * lp=parport1,none,parport2 (bind lp0 to parport1, disable lp1 and
71 * lp1 0x378
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
Dintel_pm.c2709 /* HSW allows LP1+ watermarks even with multiple pipes */ in ilk_plane_wm_max()
2742 /* HSW LP1+ watermarks w/ multiple pipes */ in ilk_cursor_wm_max()
3180 /* ILK/SNB/IVB: LP1+ watermarks only w/o scaling */ in ilk_compute_pipe_wm()
3318 /* ILK/SNB/IVB: LP1+ watermarks only w/ single pipe */ in ilk_wm_merge()
3367 /* LP1,LP2,LP3 levels are either 1,2,3 or 1,3,4 */ in ilk_wm_lp_to_level()
3392 /* LP1+ register values */ in ilk_compute_wm_results()
3493 /* Must disable LP1+ watermarks too */ in ilk_compute_wm_dirty()
3500 /* Must disable LP1+ watermarks too */ in ilk_compute_wm_dirty()
3506 /* Must disable LP1+ watermarks too */ in ilk_compute_wm_dirty()
3510 /* LP1+ watermarks already deemed dirty, no need to continue */ in ilk_compute_wm_dirty()
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/i915/
Dintel_pm.c2649 /* HSW allows LP1+ watermarks even with multiple pipes */ in ilk_plane_wm_max()
2682 /* HSW LP1+ watermarks w/ multiple pipes */ in ilk_cursor_wm_max()
3140 /* ILK/SNB/IVB: LP1+ watermarks only w/o scaling */ in ilk_compute_pipe_wm()
3281 /* ILK/SNB/IVB: LP1+ watermarks only w/ single pipe */ in ilk_wm_merge()
3330 /* LP1,LP2,LP3 levels are either 1,2,3 or 1,3,4 */ in ilk_wm_lp_to_level()
3357 /* LP1+ register values */ in ilk_compute_wm_results()
3460 /* Must disable LP1+ watermarks too */ in ilk_compute_wm_dirty()
3466 /* Must disable LP1+ watermarks too */ in ilk_compute_wm_dirty()
3473 /* Must disable LP1+ watermarks too */ in ilk_compute_wm_dirty()
3479 /* Must disable LP1+ watermarks too */ in ilk_compute_wm_dirty()
[all …]
/kernel/linux/linux-4.19/drivers/scsi/isci/
Dport_config.c154 * -> (PE0), (PE0, PE1), (PE0, PE1, PE2, PE3) LP1 -> (PE1) LP2 -> (PE2), (PE2,
/kernel/linux/linux-5.10/drivers/scsi/isci/
Dport_config.c154 * -> (PE0), (PE0, PE1), (PE0, PE1, PE2, PE3) LP1 -> (PE1) LP2 -> (PE2), (PE2,

12