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/kernel/linux/linux-5.10/drivers/net/
Dmdio.c3 * mdio.c: Generic support for MDIO-compatible transceivers
11 #include <linux/mdio.h>
14 MODULE_DESCRIPTION("Generic support for MDIO-compatible transceivers");
19 * mdio45_probe - probe for an MDIO (clause 45) device
20 * @mdio: MDIO interface
23 * This sets @prtad and @mmds in the MDIO interface if successful.
26 int mdio45_probe(struct mdio_if_info *mdio, int prtad) in mdio45_probe() argument
34 stat2 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_STAT2); in mdio45_probe()
40 devs1 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_DEVS1); in mdio45_probe()
41 devs2 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_DEVS2); in mdio45_probe()
[all …]
/kernel/linux/linux-4.19/drivers/net/
Dmdio.c2 * mdio.c: Generic support for MDIO-compatible transceivers
14 #include <linux/mdio.h>
17 MODULE_DESCRIPTION("Generic support for MDIO-compatible transceivers");
22 * mdio45_probe - probe for an MDIO (clause 45) device
23 * @mdio: MDIO interface
26 * This sets @prtad and @mmds in the MDIO interface if successful.
29 int mdio45_probe(struct mdio_if_info *mdio, int prtad) in mdio45_probe() argument
37 stat2 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_STAT2); in mdio45_probe()
43 devs1 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_DEVS1); in mdio45_probe()
44 devs2 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_DEVS2); in mdio45_probe()
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/kernel/linux/linux-5.10/drivers/net/mdio/
DKconfig3 # MDIO Layer Configuration
7 tristate "MDIO bus device drivers"
9 MDIO devices and driver infrastructure code.
28 OpenFirmware MDIO bus (Ethernet PHY) accessors
36 tristate "Allwinner sun4i MDIO interface support"
39 This driver supports the MDIO interface found in the network
44 tristate "APM X-Gene SoC MDIO bus controller"
47 This module provides a driver for the MDIO busses found in the
51 tristate "ASPEED MDIO bus controller"
55 This module provides a driver for the independent MDIO bus
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DMakefile2 # Makefile for Linux MDIO bus drivers
6 obj-$(CONFIG_MDIO_ASPEED) += mdio-aspeed.o
7 obj-$(CONFIG_MDIO_BCM_IPROC) += mdio-bcm-iproc.o
8 obj-$(CONFIG_MDIO_BCM_UNIMAC) += mdio-bcm-unimac.o
9 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
10 obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium.o
11 obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o
12 obj-$(CONFIG_MDIO_HISI_FEMAC) += mdio-hisi-femac.o
13 obj-$(CONFIG_MDIO_I2C) += mdio-i2c.o
14 obj-$(CONFIG_MDIO_IPQ4019) += mdio-ipq4019.o
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Dmdio-mvusb.c27 struct mii_bus *mdio; member
32 static int mvusb_mdio_read(struct mii_bus *mdio, int dev, int reg) in mvusb_mdio_read() argument
34 struct mvusb_mdio *mvusb = mdio->priv; in mvusb_mdio_read()
55 static int mvusb_mdio_write(struct mii_bus *mdio, int dev, int reg, u16 val) in mvusb_mdio_write() argument
57 struct mvusb_mdio *mvusb = mdio->priv; in mvusb_mdio_write()
75 struct mii_bus *mdio; in mvusb_mdio_probe() local
77 mdio = devm_mdiobus_alloc_size(dev, sizeof(*mvusb)); in mvusb_mdio_probe()
78 if (!mdio) in mvusb_mdio_probe()
81 mvusb = mdio->priv; in mvusb_mdio_probe()
82 mvusb->mdio = mdio; in mvusb_mdio_probe()
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Dof_mdio.c3 * OF helpers for the MDIO (Ethernet PHY) API
63 int of_mdiobus_phy_device_register(struct mii_bus *mdio, struct phy_device *phy, in of_mdiobus_phy_device_register() argument
74 mdio->irq[addr] = rc; in of_mdiobus_phy_device_register()
76 phy->irq = mdio->irq[addr]; in of_mdiobus_phy_device_register()
80 mdio->phy_ignore_ta_mask |= 1 << addr; in of_mdiobus_phy_device_register()
83 &phy->mdio.reset_assert_delay); in of_mdiobus_phy_device_register()
85 &phy->mdio.reset_deassert_delay); in of_mdiobus_phy_device_register()
90 phy->mdio.dev.of_node = child; in of_mdiobus_phy_device_register()
91 phy->mdio.dev.fwnode = of_fwnode_handle(child); in of_mdiobus_phy_device_register()
101 dev_dbg(&mdio->dev, "registered phy %pOFn at address %i\n", in of_mdiobus_phy_device_register()
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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/net/
Ddwmac-sun8i.txt41 - mdio bus node: should be named mdio with compatible "snps,dwmac-mdio"
43 Required properties of the mdio node:
48 of the mdio node. See phy.txt for the generic PHY bindings.
50 The following compatibles require that the emac node have a mdio-mux child
51 node called "mdio-mux":
54 Required properties for the mdio-mux node:
55 - compatible = "allwinner,sun8i-h3-mdio-mux"
56 - mdio-parent-bus: a phandle to EMAC mdio
57 - one child mdio for the integrated mdio with the compatible
58 "allwinner,sun8i-h3-mdio-internal"
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Dbrcm,unimac-mdio.txt1 * Broadcom UniMAC MDIO bus controller
4 - compatible: should one from "brcm,genet-mdio-v1", "brcm,genet-mdio-v2",
5 "brcm,genet-mdio-v3", "brcm,genet-mdio-v4", "brcm,genet-mdio-v5" or
6 "brcm,unimac-mdio"
9 larger than 16-bits MDIO transactions
10 - reg-names: name(s) of the register must be "mdio" and optional "mdio_indir_rw"
16 Ethernet switch this MDIO block is integrated from, or must be two, if there
17 are two separate interrupts, first one must be "mdio done" and second must be
18 for "mdio error"
22 - clocks: A reference to the clock supplying the MDIO bus controller
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Dcavium-mdio.txt1 * System Management Interface (SMI) / MDIO
6 "cavium,octeon-3860-mdio": Compatibility with all cn3XXX, cn5XXX
9 "cavium,thunder-8890-mdio": Compatibility with all cn8XXX SOCs.
11 - reg: The base address of the MDIO bus controller register bank.
15 - #size-cells: Must be <0>. MDIO addresses have no size component.
17 Typically an MDIO bus might have several children.
20 mdio@1180000001800 {
21 compatible = "cavium,octeon-3860-mdio";
33 * System Management Interface (SMI) / MDIO Nexus
35 Several mdio buses may be gathered as children of a single PCI
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Dmarvell-orion-mdio.txt1 * Marvell MDIO Ethernet Controller interface
5 identical unit that provides an interface with the MDIO bus.
11 - compatible: "marvell,orion-mdio" or "marvell,xmdio"
12 - reg: address and length of the MDIO registers. When an interrupt is
19 - clocks: phandle for up to four required clocks for the MDIO instance
21 The child nodes of the MDIO driver are the individual PHY devices
22 connected to this MDIO bus. They must have a "reg" property given the
23 PHY address on the MDIO bus.
27 mdio {
30 compatible = "marvell,orion-mdio";
[all …]
Dhisilicon-hns-mdio.txt1 Hisilicon MDIO bus controller
5 "hisilicon,hns-mdio"
6 "hisilicon,mdio"
7 "hisilicon,hns-mdio" is recommended to be used for hip05 and later SOCs,
8 while "hisilicon,mdio" is optional for backwards compatibility only on
10 - reg: The base address of the MDIO bus controller register bank.
12 - #size-cells: Must be <0>. MDIO addresses have no size component.
14 Typically an MDIO bus might have several children.
17 mdio@803c0000 {
20 compatible = "hisilicon,hns-mdio","hisilicon,mdio";
Dbrcm,mdio-mux-iproc.txt1 Properties for an MDIO bus multiplexer found in Broadcom iProc based SoCs.
3 This MDIO bus multiplexer defines buses that could be internal as well as
4 external to SoCs and could accept MDIO transaction compatible to C-22 or
6 properties as well to generate desired MDIO transaction on appropriate bus.
10 MDIO multiplexer node:
11 - compatible: brcm,mdio-mux-iproc.
17 - clocks: phandle of the core clock which drives the mdio block.
20 at- Documentation/devicetree/bindings/net/mdio-mux.txt
24 mdio_mux_iproc: mdio-mux@66020000 {
25 compatible = "brcm,mdio-mux-iproc";
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Dmdio-mux-mmioreg.txt1 Properties for an MDIO bus multiplexer controlled by a memory-mapped device
3 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
4 like an FPGA, is used to control which child bus is connected. The mdio-mux
10 - compatible : string, must contain "mdio-mux-mmioreg"
18 'reg' property of each child mdio-mux node must be constrained by
24 For the "EMI2" MDIO bus, register 9 (BRDCFG1) controls the mux on that bus.
36 mdio-mux-emi2 {
37 compatible = "mdio-mux-mmioreg", "mdio-mux";
38 mdio-parent-bus = <&xmdio0>;
44 emi2_slot1: mdio@0 { // Slot 1 XAUI (FM2)
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dbrcm,unimac-mdio.txt1 * Broadcom UniMAC MDIO bus controller
4 - compatible: should one from "brcm,genet-mdio-v1", "brcm,genet-mdio-v2",
5 "brcm,genet-mdio-v3", "brcm,genet-mdio-v4", "brcm,genet-mdio-v5" or
6 "brcm,unimac-mdio"
9 larger than 16-bits MDIO transactions
10 - reg-names: name(s) of the register must be "mdio" and optional "mdio_indir_rw"
16 Ethernet switch this MDIO block is integrated from, or must be two, if there
17 are two separate interrupts, first one must be "mdio done" and second must be
18 for "mdio error"
22 - clocks: A reference to the clock supplying the MDIO bus controller
[all …]
Dmdio-mux-multiplexer.txt1 Properties for an MDIO bus multiplexer consumer device
3 This is a special case of MDIO mux when MDIO mux is defined as a consumer
7 Required properties in addition to the MDIO Bus multiplexer properties:
11 - mdio-parent-bus : phandle to the parent MDIO bus.
13 each child node of mdio bus multiplexer consumer device represent a mdio
18 and Documentation/devicetree/bindings/net/mdio-mux.txt
38 mdio-mux-1 { // Mux consumer
39 compatible = "mdio-mux-multiplexer";
41 mdio-parent-bus = <&emdio1>;
45 mdio@0 {
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Dallwinner,sun8i-a83t-emac.yaml121 mdio-mux:
126 const: allwinner,sun8i-h3-mdio-mux
128 mdio-parent-bus:
131 Phandle to EMAC MDIO.
133 mdio@1:
135 description: Internal MDIO Bus
145 const: allwinner,sun8i-h3-mdio-internal
168 mdio@2:
170 description: External MDIO Bus (H3 only)
184 - mdio-parent-bus
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Dcavium-mdio.txt1 * System Management Interface (SMI) / MDIO
6 "cavium,octeon-3860-mdio": Compatibility with all cn3XXX, cn5XXX
9 "cavium,thunder-8890-mdio": Compatibility with all cn8XXX SOCs.
11 - reg: The base address of the MDIO bus controller register bank.
15 - #size-cells: Must be <0>. MDIO addresses have no size component.
17 Typically an MDIO bus might have several children.
20 mdio@1180000001800 {
21 compatible = "cavium,octeon-3860-mdio";
33 * System Management Interface (SMI) / MDIO Nexus
35 Several mdio buses may be gathered as children of a single PCI
[all …]
Dmarvell-orion-mdio.txt1 * Marvell MDIO Ethernet Controller interface
5 identical unit that provides an interface with the MDIO bus.
11 - compatible: "marvell,orion-mdio" or "marvell,xmdio"
12 - reg: address and length of the MDIO registers. When an interrupt is
19 - clocks: phandle for up to four required clocks for the MDIO instance
21 The child nodes of the MDIO driver are the individual PHY devices
22 connected to this MDIO bus. They must have a "reg" property given the
23 PHY address on the MDIO bus.
27 mdio {
30 compatible = "marvell,orion-mdio";
[all …]
Dhisilicon-hns-mdio.txt1 Hisilicon MDIO bus controller
5 "hisilicon,hns-mdio"
6 "hisilicon,mdio"
7 "hisilicon,hns-mdio" is recommended to be used for hip05 and later SOCs,
8 while "hisilicon,mdio" is optional for backwards compatibility only on
10 - reg: The base address of the MDIO bus controller register bank.
12 - #size-cells: Must be <0>. MDIO addresses have no size component.
14 Typically an MDIO bus might have several children.
17 mdio@803c0000 {
20 compatible = "hisilicon,hns-mdio","hisilicon,mdio";
Dbrcm,mdio-mux-iproc.txt1 Properties for an MDIO bus multiplexer found in Broadcom iProc based SoCs.
3 This MDIO bus multiplexer defines buses that could be internal as well as
4 external to SoCs and could accept MDIO transaction compatible to C-22 or
6 properties as well to generate desired MDIO transaction on appropriate bus.
10 MDIO multiplexer node:
11 - compatible: brcm,mdio-mux-iproc.
17 - clocks: phandle of the core clock which drives the mdio block.
20 at- Documentation/devicetree/bindings/net/mdio-mux.txt
24 mdio_mux_iproc: mdio-mux@66020000 {
25 compatible = "brcm,mdio-mux-iproc";
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Dfsl-enetc.txt14 1. The ENETC external port is connected to a MDIO configurable phy
16 1.1. Using the local ENETC Port MDIO interface
18 In this case, the ENETC node should include a "mdio" sub-node
26 - phy-handle : Phandle to a PHY on the MDIO bus.
31 - mdio : "mdio" node, defined in mdio.txt.
43 mdio {
52 1.2. Using the central MDIO PCIe endpoint device
54 In this case, the mdio node should be defined as another PCIe
62 - compatible : Should be "fsl,enetc-mdio".
64 The remaining required mdio bus properties are standard, their bindings
[all …]
Dmdio-mux-mmioreg.txt1 Properties for an MDIO bus multiplexer controlled by a memory-mapped device
3 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
4 like an FPGA, is used to control which child bus is connected. The mdio-mux
10 - compatible : string, must contain "mdio-mux-mmioreg"
18 'reg' property of each child mdio-mux node must be constrained by
24 For the "EMI2" MDIO bus, register 9 (BRDCFG1) controls the mux on that bus.
36 mdio-mux-emi2 {
37 compatible = "mdio-mux-mmioreg", "mdio-mux";
38 mdio-parent-bus = <&xmdio0>;
44 emi2_slot1: mdio@0 { // Slot 1 XAUI (FM2)
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/kernel/linux/linux-4.19/drivers/net/phy/
DKconfig6 tristate "MDIO bus device drivers"
8 MDIO devices and driver infrastructure code.
22 tristate "Broadcom iProc MDIO bus controller"
26 This module provides a driver for the MDIO busses found in the
30 tristate "Broadcom UniMAC MDIO bus controller"
33 This module provides a driver for the Broadcom UniMAC MDIO busses.
39 tristate "Bitbanged MDIO buses"
41 This module implements the MDIO bus protocol in software,
51 This module provides a driver framework for MDIO bus
52 multiplexers which connect one of several child MDIO busses
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DMakefile2 # Makefile for Linux PHY drivers and MDIO bus drivers
5 mdio-bus-y += mdio_bus.o mdio_device.o
8 obj-y += mdio-boardinfo.o
12 # dependencies that does not make it possible to split mdio-bus objects into a
15 libphy-y += $(mdio-bus-y)
17 obj-$(CONFIG_MDIO_DEVICE) += mdio-bus.o
25 obj-$(CONFIG_MDIO_BCM_IPROC) += mdio-bcm-iproc.o
26 obj-$(CONFIG_MDIO_BCM_UNIMAC) += mdio-bcm-unimac.o
27 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
28 obj-$(CONFIG_MDIO_BUS_MUX) += mdio-mux.o
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/kernel/linux/linux-4.19/drivers/of/
Dof_mdio.c2 * OF helpers for the MDIO (Ethernet PHY) API
47 static int of_mdiobus_register_phy(struct mii_bus *mdio, in of_mdiobus_register_phy() argument
59 phy = phy_device_create(mdio, addr, phy_id, 0, NULL); in of_mdiobus_register_phy()
61 phy = get_phy_device(mdio, addr, is_c45); in of_mdiobus_register_phy()
72 mdio->irq[addr] = rc; in of_mdiobus_register_phy()
74 phy->irq = mdio->irq[addr]; in of_mdiobus_register_phy()
78 mdio->phy_ignore_ta_mask |= 1 << addr; in of_mdiobus_register_phy()
81 &phy->mdio.reset_assert_delay); in of_mdiobus_register_phy()
83 &phy->mdio.reset_deassert_delay); in of_mdiobus_register_phy()
88 phy->mdio.dev.of_node = child; in of_mdiobus_register_phy()
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