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/kernel/linux/linux-5.10/drivers/dma/
Dimg-mdc-dma.c118 struct mdc_dma *mdma; member
149 static inline u32 mdc_readl(struct mdc_dma *mdma, u32 reg) in mdc_readl() argument
151 return readl(mdma->regs + reg); in mdc_readl()
154 static inline void mdc_writel(struct mdc_dma *mdma, u32 val, u32 reg) in mdc_writel() argument
156 writel(val, mdma->regs + reg); in mdc_writel()
161 return mdc_readl(mchan->mdma, mchan->chan_nr * 0x040 + reg); in mdc_chan_readl()
166 mdc_writel(mchan->mdma, val, mchan->chan_nr * 0x040 + reg); in mdc_chan_writel()
181 static inline struct device *mdma2dev(struct mdc_dma *mdma) in mdma2dev() argument
183 return mdma->dma_dev.dev; in mdma2dev()
210 struct mdc_dma *mdma = mchan->mdma; in mdc_list_desc_config() local
[all …]
Dmpc512x_dma.c256 struct mpc_dma *mdma = dma_chan_to_mpc_dma(&mchan->chan); in mpc_dma_execute() local
300 memcpy_toio(&mdma->tcd[cid], first->tcd, sizeof(struct mpc_dma_tcd)); in mpc_dma_execute()
303 mdma->tcd[cid].e_sg = 1; in mpc_dma_execute()
305 if (mdma->is_mpc8308) { in mpc_dma_execute()
307 out_8(&mdma->regs->dmassrt, cid); in mpc_dma_execute()
310 out_8(&mdma->regs->dmaserq, cid); in mpc_dma_execute()
313 out_8(&mdma->regs->dmassrt, cid); in mpc_dma_execute()
318 static void mpc_dma_irq_process(struct mpc_dma *mdma, u32 is, u32 es, int off) in mpc_dma_irq_process() argument
327 mchan = &mdma->channels[ch + off]; in mpc_dma_irq_process()
331 out_8(&mdma->regs->dmacint, ch + off); in mpc_dma_irq_process()
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Dstm32-mdma.c8 * Driver for STM32 MDMA controller
35 /* MDMA Generic getter/setter */
42 #define STM32_MDMA_GISR0 0x0000 /* MDMA Int Status Reg 1 */
43 #define STM32_MDMA_GISR1 0x0004 /* MDMA Int Status Reg 2 */
45 /* MDMA Channel x interrupt/status register */
54 /* MDMA Channel x interrupt flag clear register */
67 /* MDMA Channel x error status register */
76 /* MDMA Channel x control register */
97 /* MDMA Channel x transfer configuration register */
151 /* MDMA Channel x block number of data register */
[all …]
DMakefile72 obj-$(CONFIG_STM32_MDMA) += stm32-mdma.o
/kernel/linux/linux-4.19/drivers/dma/
Dimg-mdc-dma.c121 struct mdc_dma *mdma; member
152 static inline u32 mdc_readl(struct mdc_dma *mdma, u32 reg) in mdc_readl() argument
154 return readl(mdma->regs + reg); in mdc_readl()
157 static inline void mdc_writel(struct mdc_dma *mdma, u32 val, u32 reg) in mdc_writel() argument
159 writel(val, mdma->regs + reg); in mdc_writel()
164 return mdc_readl(mchan->mdma, mchan->chan_nr * 0x040 + reg); in mdc_chan_readl()
169 mdc_writel(mchan->mdma, val, mchan->chan_nr * 0x040 + reg); in mdc_chan_writel()
184 static inline struct device *mdma2dev(struct mdc_dma *mdma) in mdma2dev() argument
186 return mdma->dma_dev.dev; in mdma2dev()
213 struct mdc_dma *mdma = mchan->mdma; in mdc_list_desc_config() local
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Dmpc512x_dma.c268 struct mpc_dma *mdma = dma_chan_to_mpc_dma(&mchan->chan); in mpc_dma_execute() local
312 memcpy_toio(&mdma->tcd[cid], first->tcd, sizeof(struct mpc_dma_tcd)); in mpc_dma_execute()
315 mdma->tcd[cid].e_sg = 1; in mpc_dma_execute()
317 if (mdma->is_mpc8308) { in mpc_dma_execute()
319 out_8(&mdma->regs->dmassrt, cid); in mpc_dma_execute()
322 out_8(&mdma->regs->dmaserq, cid); in mpc_dma_execute()
325 out_8(&mdma->regs->dmassrt, cid); in mpc_dma_execute()
330 static void mpc_dma_irq_process(struct mpc_dma *mdma, u32 is, u32 es, int off) in mpc_dma_irq_process() argument
339 mchan = &mdma->channels[ch + off]; in mpc_dma_irq_process()
343 out_8(&mdma->regs->dmacint, ch + off); in mpc_dma_irq_process()
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Dstm32-mdma.c18 * Driver for STM32 MDMA controller
45 /* MDMA Generic getter/setter */
52 #define STM32_MDMA_GISR0 0x0000 /* MDMA Int Status Reg 1 */
53 #define STM32_MDMA_GISR1 0x0004 /* MDMA Int Status Reg 2 */
55 /* MDMA Channel x interrupt/status register */
64 /* MDMA Channel x interrupt flag clear register */
77 /* MDMA Channel x error status register */
86 /* MDMA Channel x control register */
107 /* MDMA Channel x transfer configuration register */
161 /* MDMA Channel x block number of data register */
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DMakefile65 obj-$(CONFIG_STM32_MDMA) += stm32-mdma.o
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/dma/
Dstm32-mdma.txt1 * STMicroelectronics STM32 MDMA controller
3 The STM32 MDMA is a general-purpose direct memory access controller capable of
7 - compatible: Should be "st,stm32h7-mdma"
8 - reg: Should contain MDMA registers location and length. This should include
10 - interrupts: Should contain the MDMA interrupt.
24 compatible = "st,stm32h7-mdma";
37 DMA clients connected to the STM32 MDMA controller must use the format
39 a phandle to the MDMA controller plus the following five integer cells:
71 0x00: Each MDMA request triggers a buffer transfer (max 128 bytes)
72 0x01: Each MDMA request triggers a block transfer (max 64K bytes)
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/
Dst,stm32-mdma.yaml4 $id: http://devicetree.org/schemas/dma/st,stm32-mdma.yaml#
7 title: STMicroelectronics STM32 MDMA Controller bindings
10 The STM32 MDMA is a general-purpose direct memory access controller capable of
12 DMA clients connected to the STM32 MDMA controller must use the format
14 a phandle to the MDMA controller plus the following five integer cells:
43 0x00: Each MDMA request triggers a buffer transfer (max 128 bytes)
44 0x1: Each MDMA request triggers a block transfer (max 64K bytes)
45 0x2: Each MDMA request triggers a repeated block transfer
46 0x3: Each MDMA request triggers a linked list transfer
48 if no HW ack signal is used by the MDMA client
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/kernel/linux/linux-5.10/drivers/ata/
Dpata_pdc2027x.c92 { 0xdf, 0x5f }, /* MDMA mode 0 */
93 { 0x6b, 0x27 }, /* MDMA mode 1 */
94 { 0x69, 0x25 }, /* MDMA mode 2 */
368 /* Set the MDMA timing registers with value table for 133MHz */ in pdc2027x_set_dmamode()
371 PDPRINTK("Set mdma regs... \n"); in pdc2027x_set_dmamode()
379 PDPRINTK("Set mdma regs done\n"); in pdc2027x_set_dmamode()
381 PDPRINTK("Set to mdma mode[%u] \n", mdma_mode); in pdc2027x_set_dmamode()
/kernel/linux/linux-4.19/drivers/ata/
Dpata_pdc2027x.c98 { 0xdf, 0x5f }, /* MDMA mode 0 */
99 { 0x6b, 0x27 }, /* MDMA mode 1 */
100 { 0x69, 0x25 }, /* MDMA mode 2 */
374 /* Set the MDMA timing registers with value table for 133MHz */ in pdc2027x_set_dmamode()
377 PDPRINTK("Set mdma regs... \n"); in pdc2027x_set_dmamode()
385 PDPRINTK("Set mdma regs done\n"); in pdc2027x_set_dmamode()
387 PDPRINTK("Set to mdma mode[%u] \n", mdma_mode); in pdc2027x_set_dmamode()
/kernel/linux/linux-4.19/arch/mips/include/asm/mach-au1x00/
Dau1xxx_ide.h140 /* Timing parameters MDMA mode 0 */
150 /* Timing parameters MDMA mode 1 */
160 /* Timing parameters MDMA mode 2 */
/kernel/linux/linux-5.10/drivers/dma/qcom/
Dhidma.c117 struct hidma_dev *mdma = to_hidma_dev(ddev); in hidma_process_completed() local
141 llstat = hidma_ll_status(mdma->lldev, mdesc->tre_ch); in hidma_process_completed()
405 struct hidma_dev *mdma = mchan->dmadev; in hidma_prep_dma_memcpy() local
420 hidma_ll_set_transfer_params(mdma->lldev, mdesc->tre_ch, in hidma_prep_dma_memcpy()
438 struct hidma_dev *mdma = mchan->dmadev; in hidma_prep_dma_memset() local
453 hidma_ll_set_transfer_params(mdma->lldev, mdesc->tre_ch, in hidma_prep_dma_memset()
533 struct hidma_dev *mdma = mchan->dmadev; in hidma_free_chan_resources() local
548 hidma_ll_free(mdma->lldev, mdesc->tre_ch); in hidma_free_chan_resources()
/kernel/linux/linux-4.19/drivers/dma/qcom/
Dhidma.c117 struct hidma_dev *mdma = to_hidma_dev(ddev); in hidma_process_completed() local
141 llstat = hidma_ll_status(mdma->lldev, mdesc->tre_ch); in hidma_process_completed()
405 struct hidma_dev *mdma = mchan->dmadev; in hidma_prep_dma_memcpy() local
420 hidma_ll_set_transfer_params(mdma->lldev, mdesc->tre_ch, in hidma_prep_dma_memcpy()
438 struct hidma_dev *mdma = mchan->dmadev; in hidma_prep_dma_memset() local
453 hidma_ll_set_transfer_params(mdma->lldev, mdesc->tre_ch, in hidma_prep_dma_memset()
533 struct hidma_dev *mdma = mchan->dmadev; in hidma_free_chan_resources() local
548 hidma_ll_free(mdma->lldev, mdesc->tre_ch); in hidma_free_chan_resources()
/kernel/linux/linux-5.10/drivers/rapidio/devices/
Dtsi721.c113 void __iomem *regs = priv->regs + TSI721_DMAC_BASE(priv->mdma.ch_id); in tsi721_maint_dma()
125 bd_ptr = priv->mdma.bd_base; in tsi721_maint_dma()
153 priv->mdma.ch_id, ch_stat); in tsi721_maint_dma()
1433 priv->mdma.ch_id = TSI721_DMACH_MAINT; in tsi721_bdma_maint_init()
1443 priv->mdma.bd_num = bd_num; in tsi721_bdma_maint_init()
1444 priv->mdma.bd_phys = bd_phys; in tsi721_bdma_maint_init()
1445 priv->mdma.bd_base = bd_ptr; in tsi721_bdma_maint_init()
1462 priv->mdma.bd_base = NULL; in tsi721_bdma_maint_init()
1466 priv->mdma.sts_phys = sts_phys; in tsi721_bdma_maint_init()
1467 priv->mdma.sts_base = sts_ptr; in tsi721_bdma_maint_init()
[all …]
/kernel/linux/linux-4.19/drivers/rapidio/devices/
Dtsi721.c126 void __iomem *regs = priv->regs + TSI721_DMAC_BASE(priv->mdma.ch_id); in tsi721_maint_dma()
138 bd_ptr = priv->mdma.bd_base; in tsi721_maint_dma()
166 priv->mdma.ch_id, ch_stat); in tsi721_maint_dma()
1446 priv->mdma.ch_id = TSI721_DMACH_MAINT; in tsi721_bdma_maint_init()
1456 priv->mdma.bd_num = bd_num; in tsi721_bdma_maint_init()
1457 priv->mdma.bd_phys = bd_phys; in tsi721_bdma_maint_init()
1458 priv->mdma.bd_base = bd_ptr; in tsi721_bdma_maint_init()
1475 priv->mdma.bd_base = NULL; in tsi721_bdma_maint_init()
1479 priv->mdma.sts_phys = sts_phys; in tsi721_bdma_maint_init()
1480 priv->mdma.sts_base = sts_ptr; in tsi721_bdma_maint_init()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/iommu/
Dti,omap-iommu.txt28 instance number should be 0 for DSP MDMA MMUs and 1 for
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/iommu/
Dti,omap-iommu.txt28 instance number should be 0 for DSP MDMA MMUs and 1 for
/kernel/linux/linux-4.19/drivers/ide/
Dpmac.c90 "KeyLargo ATA-3", /* KeyLargo ATA-3 (MDMA only) */
137 * The "PIO" register controls PIO and MDMA timings, the "ULTRA"
139 * of this one enables UDMA vs. MDMA, and bits 4..7 are the
185 * Can do pio & mdma modes, clock unit is 30ns (33Mhz)
641 * Calculate MDMA timings for all cells
699 printk(KERN_ERR "%s: MDMA, cycleTime: %d, accessTime: %d, recTime: %d\n", in set_timings_mdma()
727 /* Clear out mdma bits and disable udma */ in set_timings_mdma()
773 printk(KERN_ERR "%s: Set MDMA timing for mode %d, reg: 0x%08x\n", in set_timings_mdma()
Dcs5530.c70 * UDMA/MDMA. It has to be one or the other, for the pair, though
/kernel/linux/linux-5.10/drivers/ide/
Dpmac.c85 "KeyLargo ATA-3", /* KeyLargo ATA-3 (MDMA only) */
132 * The "PIO" register controls PIO and MDMA timings, the "ULTRA"
134 * of this one enables UDMA vs. MDMA, and bits 4..7 are the
180 * Can do pio & mdma modes, clock unit is 30ns (33Mhz)
636 * Calculate MDMA timings for all cells
694 printk(KERN_ERR "%s: MDMA, cycleTime: %d, accessTime: %d, recTime: %d\n", in set_timings_mdma()
722 /* Clear out mdma bits and disable udma */ in set_timings_mdma()
768 printk(KERN_ERR "%s: Set MDMA timing for mode %d, reg: 0x%08x\n", in set_timings_mdma()
Dcs5530.c70 * UDMA/MDMA. It has to be one or the other, for the pair, though
/kernel/linux/linux-4.19/include/dt-bindings/clock/
Dstm32mp1-clks.h113 #define MDMA 100 macro
/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dstm32mp1-clks.h113 #define MDMA 100 macro

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