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/kernel/linux/linux-4.19/drivers/gpu/drm/tinydrm/
Dili9225.c6 * Some code copied from mipi-dbi.c
25 #include <drm/tinydrm/mipi-dbi.h>
68 static inline int ili9225_command(struct mipi_dbi *mipi, u8 cmd, u16 data) in ili9225_command() argument
72 return mipi_dbi_command_buf(mipi, cmd, par, 2); in ili9225_command()
82 struct mipi_dbi *mipi = mipi_dbi_from_tinydrm(tdev); in ili9225_fb_dirty() local
83 bool swap = mipi->swap_bytes; in ili9225_fb_dirty()
91 if (!mipi->enabled) in ili9225_fb_dirty()
100 if (!mipi->dc || !full || swap || in ili9225_fb_dirty()
102 tr = mipi->tx_buf; in ili9225_fb_dirty()
103 ret = mipi_dbi_buf_copy(mipi->tx_buf, fb, &clip, swap); in ili9225_fb_dirty()
[all …]
Dmi0283qt.c23 #include <drm/tinydrm/mipi-dbi.h>
57 struct mipi_dbi *mipi = mipi_dbi_from_tinydrm(tdev); in mi0283qt_enable() local
63 ret = mipi_dbi_poweron_conditional_reset(mipi); in mi0283qt_enable()
69 mipi_dbi_command(mipi, MIPI_DCS_SET_DISPLAY_OFF); in mi0283qt_enable()
71 mipi_dbi_command(mipi, ILI9341_PWCTRLB, 0x00, 0x83, 0x30); in mi0283qt_enable()
72 mipi_dbi_command(mipi, ILI9341_PWRSEQ, 0x64, 0x03, 0x12, 0x81); in mi0283qt_enable()
73 mipi_dbi_command(mipi, ILI9341_DTCTRLA, 0x85, 0x01, 0x79); in mi0283qt_enable()
74 mipi_dbi_command(mipi, ILI9341_PWCTRLA, 0x39, 0x2c, 0x00, 0x34, 0x02); in mi0283qt_enable()
75 mipi_dbi_command(mipi, ILI9341_PUMPCTRL, 0x20); in mi0283qt_enable()
76 mipi_dbi_command(mipi, ILI9341_DTCTRLB, 0x00, 0x00); in mi0283qt_enable()
[all …]
Dili9341.c21 #include <drm/tinydrm/mipi-dbi.h>
55 struct mipi_dbi *mipi = mipi_dbi_from_tinydrm(tdev); in yx240qv29_enable() local
61 ret = mipi_dbi_poweron_conditional_reset(mipi); in yx240qv29_enable()
67 mipi_dbi_command(mipi, MIPI_DCS_SET_DISPLAY_OFF); in yx240qv29_enable()
69 mipi_dbi_command(mipi, ILI9341_PWCTRLB, 0x00, 0xc1, 0x30); in yx240qv29_enable()
70 mipi_dbi_command(mipi, ILI9341_PWRSEQ, 0x64, 0x03, 0x12, 0x81); in yx240qv29_enable()
71 mipi_dbi_command(mipi, ILI9341_DTCTRLA, 0x85, 0x00, 0x78); in yx240qv29_enable()
72 mipi_dbi_command(mipi, ILI9341_PWCTRLA, 0x39, 0x2c, 0x00, 0x34, 0x02); in yx240qv29_enable()
73 mipi_dbi_command(mipi, ILI9341_PUMPCTRL, 0x20); in yx240qv29_enable()
74 mipi_dbi_command(mipi, ILI9341_DTCTRLB, 0x00, 0x00); in yx240qv29_enable()
[all …]
Dst7735r.c19 #include <drm/tinydrm/mipi-dbi.h>
44 struct mipi_dbi *mipi = mipi_dbi_from_tinydrm(tdev); in jd_t18003_t01_pipe_enable() local
50 ret = mipi_dbi_poweron_reset(mipi); in jd_t18003_t01_pipe_enable()
56 mipi_dbi_command(mipi, MIPI_DCS_EXIT_SLEEP_MODE); in jd_t18003_t01_pipe_enable()
59 mipi_dbi_command(mipi, ST7735R_FRMCTR1, 0x01, 0x2c, 0x2d); in jd_t18003_t01_pipe_enable()
60 mipi_dbi_command(mipi, ST7735R_FRMCTR2, 0x01, 0x2c, 0x2d); in jd_t18003_t01_pipe_enable()
61 mipi_dbi_command(mipi, ST7735R_FRMCTR3, 0x01, 0x2c, 0x2d, 0x01, 0x2c, in jd_t18003_t01_pipe_enable()
63 mipi_dbi_command(mipi, ST7735R_INVCTR, 0x07); in jd_t18003_t01_pipe_enable()
64 mipi_dbi_command(mipi, ST7735R_PWCTR1, 0xa2, 0x02, 0x84); in jd_t18003_t01_pipe_enable()
65 mipi_dbi_command(mipi, ST7735R_PWCTR2, 0xc5); in jd_t18003_t01_pipe_enable()
[all …]
Dmipi-dbi.c2 * MIPI Display Bus Interface (DBI) LCD controller support
13 #include <drm/tinydrm/mipi-dbi.h>
35 * This library provides helpers for MIPI Display Bus Interface (DBI)
38 * Many controllers for tiny lcd displays are MIPI compliant and can use this
41 * MIPI compliant.
43 * Only MIPI Type 1 displays are supported since a full frame memory is needed.
45 * There are 3 MIPI DBI implementation types:
95 static bool mipi_dbi_command_is_read(struct mipi_dbi *mipi, u8 cmd) in mipi_dbi_command_is_read() argument
99 if (!mipi->read_commands) in mipi_dbi_command_is_read()
103 if (!mipi->read_commands[i]) in mipi_dbi_command_is_read()
[all …]
Dst7586.c22 #include <drm/tinydrm/mipi-dbi.h>
118 struct mipi_dbi *mipi = mipi_dbi_from_tinydrm(tdev); in st7586_fb_dirty() local
123 if (!mipi->enabled) in st7586_fb_dirty()
136 ret = st7586_buf_copy(mipi->tx_buf, fb, &clip); in st7586_fb_dirty()
144 mipi_dbi_command(mipi, MIPI_DCS_SET_COLUMN_ADDRESS, in st7586_fb_dirty()
147 mipi_dbi_command(mipi, MIPI_DCS_SET_PAGE_ADDRESS, in st7586_fb_dirty()
151 ret = mipi_dbi_command_buf(mipi, MIPI_DCS_WRITE_MEMORY_START, in st7586_fb_dirty()
152 (u8 *)mipi->tx_buf, in st7586_fb_dirty()
169 struct mipi_dbi *mipi = mipi_dbi_from_tinydrm(tdev); in st7586_pipe_enable() local
175 ret = mipi_dbi_poweron_reset(mipi); in st7586_pipe_enable()
[all …]
/kernel/linux/linux-4.19/drivers/gpu/host1x/
Dmipi.c131 struct tegra_mipi *mipi; member
136 static inline u32 tegra_mipi_readl(struct tegra_mipi *mipi, in tegra_mipi_readl() argument
139 return readl(mipi->regs + (offset << 2)); in tegra_mipi_readl()
142 static inline void tegra_mipi_writel(struct tegra_mipi *mipi, u32 value, in tegra_mipi_writel() argument
145 writel(value, mipi->regs + (offset << 2)); in tegra_mipi_writel()
148 static int tegra_mipi_power_up(struct tegra_mipi *mipi) in tegra_mipi_power_up() argument
153 err = clk_enable(mipi->clk); in tegra_mipi_power_up()
157 value = tegra_mipi_readl(mipi, MIPI_CAL_BIAS_PAD_CFG0); in tegra_mipi_power_up()
160 if (mipi->soc->needs_vclamp_ref) in tegra_mipi_power_up()
163 tegra_mipi_writel(mipi, value, MIPI_CAL_BIAS_PAD_CFG0); in tegra_mipi_power_up()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/host1x/
Dmipi.c131 struct tegra_mipi *mipi; member
136 static inline u32 tegra_mipi_readl(struct tegra_mipi *mipi, in tegra_mipi_readl() argument
139 return readl(mipi->regs + (offset << 2)); in tegra_mipi_readl()
142 static inline void tegra_mipi_writel(struct tegra_mipi *mipi, u32 value, in tegra_mipi_writel() argument
145 writel(value, mipi->regs + (offset << 2)); in tegra_mipi_writel()
148 static int tegra_mipi_power_up(struct tegra_mipi *mipi) in tegra_mipi_power_up() argument
153 err = clk_enable(mipi->clk); in tegra_mipi_power_up()
157 value = tegra_mipi_readl(mipi, MIPI_CAL_BIAS_PAD_CFG0); in tegra_mipi_power_up()
160 if (mipi->soc->needs_vclamp_ref) in tegra_mipi_power_up()
163 tegra_mipi_writel(mipi, value, MIPI_CAL_BIAS_PAD_CFG0); in tegra_mipi_power_up()
[all …]
/kernel/linux/linux-4.19/drivers/soundwire/
Dmipi_disco.c5 * MIPI Discovery And Configuration (DisCo) Specification for SoundWire
38 "mipi-sdw-sw-interface-revision", &prop->revision); in sdw_master_read_prop()
42 "mipi-sdw-master-%d-subproperties", bus->link_id); in sdw_master_read_prop()
51 "mipi-sdw-clock-stop-mode0-supported") == true) in sdw_master_read_prop()
55 "mipi-sdw-clock-stop-mode1-supported") == true) in sdw_master_read_prop()
59 "mipi-sdw-max-clock-frequency", &prop->max_freq); in sdw_master_read_prop()
62 "mipi-sdw-clock-frequencies-supported", NULL, 0); in sdw_master_read_prop()
72 "mipi-sdw-clock-frequencies-supported", in sdw_master_read_prop()
89 "mipi-sdw-supported-clock-gears", NULL, 0); in sdw_master_read_prop()
99 "mipi-sdw-supported-clock-gears", in sdw_master_read_prop()
[all …]
/kernel/linux/linux-5.10/drivers/soundwire/
Dmipi_disco.c5 * MIPI Discovery And Configuration (DisCo) Specification for SoundWire
38 "mipi-sdw-sw-interface-revision", in sdw_master_read_prop()
43 "mipi-sdw-link-%d-subproperties", bus->link_id); in sdw_master_read_prop()
52 "mipi-sdw-clock-stop-mode0-supported")) in sdw_master_read_prop()
56 "mipi-sdw-clock-stop-mode1-supported")) in sdw_master_read_prop()
60 "mipi-sdw-max-clock-frequency", in sdw_master_read_prop()
63 nval = fwnode_property_count_u32(link, "mipi-sdw-clock-frequencies-supported"); in sdw_master_read_prop()
73 "mipi-sdw-clock-frequencies-supported", in sdw_master_read_prop()
89 nval = fwnode_property_count_u32(link, "mipi-sdw-supported-clock-gears"); in sdw_master_read_prop()
99 "mipi-sdw-supported-clock-gears", in sdw_master_read_prop()
[all …]
/kernel/linux/linux-4.19/include/drm/tinydrm/
Dmipi-dbi.h2 * MIPI Display Bus Interface (DBI) LCD controller support
22 * struct mipi_dbi - MIPI DBI controller
45 int (*command)(struct mipi_dbi *mipi, u8 *cmd, u8 *param, size_t num);
64 int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *mipi,
66 int mipi_dbi_init(struct device *dev, struct mipi_dbi *mipi,
70 void mipi_dbi_enable_flush(struct mipi_dbi *mipi,
74 void mipi_dbi_hw_reset(struct mipi_dbi *mipi);
75 bool mipi_dbi_display_is_on(struct mipi_dbi *mipi);
76 int mipi_dbi_poweron_reset(struct mipi_dbi *mipi);
77 int mipi_dbi_poweron_conditional_reset(struct mipi_dbi *mipi);
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra114-mipi.txt1 NVIDIA Tegra MIPI pad calibration controller
4 - compatible: "nvidia,tegra<chip>-mipi"
9 - mipi-cal
10 - #nvidia,mipi-calibrate-cells: Should be 1. The cell is a bitmask of the pads
13 User nodes need to contain an nvidia,mipi-calibrate property that has a
19 mipi: mipi@700e3000 {
20 compatible = "nvidia,tegra114-mipi";
23 clock-names = "mipi-cal";
24 #nvidia,mipi-calibrate-cells = <1>;
35 nvidia,mipi-calibrate = <&mipi 0x060>;
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra114-mipi.txt1 NVIDIA Tegra MIPI pad calibration controller
4 - compatible: "nvidia,tegra<chip>-mipi"
9 - mipi-cal
10 - #nvidia,mipi-calibrate-cells: Should be 1. The cell is a bitmask of the pads
13 User nodes need to contain an nvidia,mipi-calibrate property that has a
19 mipi: mipi@700e3000 {
20 compatible = "nvidia,tegra114-mipi";
23 clock-names = "mipi-cal";
24 #nvidia,mipi-calibrate-cells = <1>;
35 nvidia,mipi-calibrate = <&mipi 0x060>;
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/exynos/
Dexynos_dsim.txt1 Exynos MIPI DSI Master
5 "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
6 "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
7 "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
8 "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
9 "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
19 - vddcore-supply: MIPI DSIM Core voltage supply (e.g. 1.1V)
20 - vddio-supply: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)
23 according to DSI host bindings (see MIPI DSI bindings [1])
29 Should contain DSI peripheral nodes (see MIPI DSI bindings [1]).
[all …]
/kernel/linux/linux-5.10/include/video/
Dmipi_display.h3 * Defines for Mobile Industry Processor Interface (MIPI(R))
13 /* MIPI DSI Processor-to-Peripheral transaction types */
66 /* MIPI DSI Peripheral-to-Processor transaction types */
78 /* MIPI DCS commands */
111 MIPI_DCS_SET_PARTIAL_ROWS = 0x30, /* MIPI DCS 1.02 - MIPI_DCS_SET_PARTIAL_AREA before that */
128 MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /* MIPI DCS 1.3 */
129 MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, /* MIPI DCS 1.3 */
130 MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, /* MIPI DCS 1.3 */
131 MIPI_DCS_GET_CONTROL_DISPLAY = 0x54, /* MIPI DCS 1.3 */
132 MIPI_DCS_WRITE_POWER_SAVE = 0x55, /* MIPI DCS 1.3 */
[all …]
/kernel/linux/linux-4.19/include/video/
Dmipi_display.h2 * Defines for Mobile Industry Processor Interface (MIPI(R))
16 /* MIPI DSI Processor-to-Peripheral transaction types */
67 /* MIPI DSI Peripheral-to-Processor transaction types */
79 /* MIPI DCS commands */
121 MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /* MIPI DCS 1.3 */
122 MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, /* MIPI DCS 1.3 */
123 MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, /* MIPI DCS 1.3 */
124 MIPI_DCS_GET_CONTROL_DISPLAY = 0x54, /* MIPI DCS 1.3 */
125 MIPI_DCS_WRITE_POWER_SAVE = 0x55, /* MIPI DCS 1.3 */
126 MIPI_DCS_GET_POWER_SAVE = 0x56, /* MIPI DCS 1.3 */
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/exynos/
Dexynos_dsim.txt1 Exynos MIPI DSI Master
5 "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
6 "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
7 "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
8 "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
9 "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
19 - vddcore-supply: MIPI DSIM Core voltage supply (e.g. 1.1V)
20 - vddio-supply: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)
23 according to DSI host bindings (see MIPI DSI bindings [1])
32 Should contain DSI peripheral nodes (see MIPI DSI bindings [1]).
[all …]
/kernel/linux/linux-5.10/Documentation/admin-guide/media/
Dimx7.rst16 - MIPI CSI-2 Receiver
20 MIPI Camera Input ---> MIPI CSI-2 --- > |\
36 imx7-mipi-csi2
39 This is the MIPI CSI-2 receiver entity. It has one sink pad to receive the pixel
40 data from MIPI CSI-2 camera sensor. It has one source pad, corresponding to the
48 sensor with a parallel interface or from MIPI CSI-2 virtual channel 0. It has
55 can interface directly with Parallel and MIPI CSI-2 buses. It has 256 x 64 FIFO
76 On this platform an OV2680 MIPI CSI-2 module is connected to the internal MIPI
83 media-ctl -l "'ov2680 1-0036':0 -> 'imx7-mipi-csis.0':0[1]"
84 media-ctl -l "'imx7-mipi-csis.0':1 -> 'csi-mux':1[1]"
[all …]
Dimx.rst32 camera sensors over Parallel, BT.656/1120, and MIPI CSI-2 buses.
66 - MIPI CSI-2 Receiver for camera sensors with the MIPI CSI-2 bus
84 - Supports parallel, BT.565, and MIPI CSI-2 interfaces.
115 MIPI CSI-2 OV5640 sensor, requires the i.MX6 MIPI CSI-2 receiver. But
117 therefore does not require the MIPI CSI-2 receiver, so it is missing in
137 imx6-mipi-csi2
140 This is the MIPI CSI-2 receiver entity. It has one sink pad to receive
141 the MIPI CSI-2 stream (usually from a MIPI CSI-2 camera sensor). It has
142 four source pads, corresponding to the four MIPI CSI-2 demuxed virtual
146 This entity actually consists of two sub-blocks. One is the MIPI CSI-2
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/
Dia_css_mipi.h20 * This file contains MIPI support functionality
31 /* @brief Specify a CSS MIPI frame buffer.
39 * Specifies a CSS MIPI frame buffer: size in memory words (32B).
45 /* @brief Register size of a CSS MIPI frame for check during capturing.
51 * Register size of a CSS MIPI frame to check during capturing. Up to
61 /* @brief Calculate the size of a mipi frame.
65 * @param[in] format The frame (MIPI) format.
66 * @param[in] hasSOLandEOL Whether frame (MIPI) contains (optional) SOL and EOF packets.
68 * @param size_mem_words The mipi frame size in memory words (32B).
71 * Calculate the size of a mipi frame, based on the resolution and format.
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Drockchip-mipi-dphy-rx0.yaml4 $id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx0.yaml#
7 title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings
14 The Rockchip SoC has a MIPI D-PHY bus with an RX0 entry which connects to
19 const: rockchip,rk3399-mipi-dphy-rx0
23 - description: MIPI D-PHY ref clock
24 - description: MIPI D-PHY RX0 cfg clock
53 * MIPI D-PHY RX0 use registers in "general register files", it
65 mipi_dphy_rx0: mipi-dphy-rx0 {
66 compatible = "rockchip,rk3399-mipi-dphy-rx0";
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/rockchip/
Ddw_mipi_dsi_rockchip.txt1 Rockchip specific extensions to the Synopsys Designware MIPI DSI
8 "rockchip,px30-mipi-dsi", "snps,dw-mipi-dsi"
9 "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"
10 "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi"
26 - power-domains: a phandle to mipi dsi power domain node.
35 mipi_dsi: mipi@ff960000 {
38 compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
/kernel/linux/linux-4.19/Documentation/media/v4l-drivers/
Dimx.rst30 camera sensors over Parallel, BT.656/1120, and MIPI CSI-2 busses.
64 - MIPI CSI-2 Receiver for camera sensors with the MIPI CSI-2 bus
82 - Supports parallel, BT.565, and MIPI CSI-2 interfaces.
106 imx6-mipi-csi2
109 This is the MIPI CSI-2 receiver entity. It has one sink pad to receive
110 the MIPI CSI-2 stream (usually from a MIPI CSI-2 camera sensor). It has
111 four source pads, corresponding to the four MIPI CSI-2 demuxed virtual
115 This entity actually consists of two sub-blocks. One is the MIPI CSI-2
116 core. This is a Synopsys Designware MIPI CSI-2 core. The other sub-block
136 MIPI CSI-2 virtual channels from imx6-mipi-csi2 entity. They have a
[all …]
/kernel/linux/linux-5.10/Documentation/driver-api/soundwire/
Dsummary.rst5 SoundWire is a new interface ratified in 2015 by the MIPI Alliance.
58 The MIPI SoundWire specification uses the term 'device' to refer to a Master
69 Programs all the MIPI-defined Slave registers. Represents a SoundWire
77 Driver controlling the Slave device. MIPI-specified registers are controlled
91 Bus implements API to read standard Master MIPI properties and also provides
133 MIPI specification, so Bus calls the "sdw_master_port_ops" callback
141 The MIPI specification requires each Slave interface to expose a unique
154 board-file, ACPI or DT. The MIPI Software specification defines additional
181 For capabilities, Bus implements API to read standard Slave MIPI properties
198 SoundWire MIPI specification 1.1 is available at:
[all …]
/kernel/linux/linux-4.19/Documentation/driver-api/soundwire/
Dsummary.rst5 SoundWire is a new interface ratified in 2015 by the MIPI Alliance.
58 The MIPI SoundWire specification uses the term 'device' to refer to a Master
69 Programs all the MIPI-defined Slave registers. Represents a SoundWire
77 Driver controlling the Slave device. MIPI-specified registers are controlled
91 Bus implements API to read standard Master MIPI properties and also provides
132 MIPI specification, so Bus calls the "sdw_master_port_ops" callback
140 The MIPI specification requires each Slave interface to expose a unique
153 board-file, ACPI or DT. The MIPI Software specification defines additional
180 For capabilities, Bus implements API to read standard Slave MIPI properties
197 SoundWire MIPI specification 1.1 is available at:
[all …]

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