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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/clock/
Drenesas,cpg-mstp-clocks.txt1 * Renesas CPG Module Stop (MSTP) Clocks
7 Clocks are referenced by user nodes by the MSTP node phandle and the clock
13 - "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks
14 - "renesas,r8a73a4-mstp-clocks" for R8A73A4 (R-Mobile APE6) MSTP gate clocks
15 - "renesas,r8a7740-mstp-clocks" for R8A7740 (R-Mobile A1) MSTP gate clocks
16 - "renesas,r8a7778-mstp-clocks" for R8A7778 (R-Car M1) MSTP gate clocks
17 - "renesas,r8a7779-mstp-clocks" for R8A7779 (R-Car H1) MSTP gate clocks
18 - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
19 - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2-W) MSTP gate clocks
20 - "renesas,r8a7792-mstp-clocks" for R8A7792 (R-Car V2H) MSTP gate clocks
[all …]
Drenesas,r8a7778-cpg-clocks.txt6 CPG Module Stop (MSTP) Clocks.
17 SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed
18 through an MSTP clock should refer to the CPG device node in their
39 - CPG/MSTP Clock Domain member device node:
Drenesas,r8a7779-cpg-clocks.txt6 CPG Module Stop (MSTP) Clocks.
19 SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed
20 through an MSTP clock should refer to the CPG device node in their
41 - CPG/MSTP Clock Domain member device node:
Drenesas,rz-cpg-clocks.txt6 CPG Module Stop (MSTP) Clocks.
21 SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed
22 through an MSTP clock should refer to the CPG device node in their
43 - CPG/MSTP Clock Domain member device node:
Drenesas,rcar-gen2-cpg-clocks.txt6 CPG Module Stop (MSTP) Clocks.
28 SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed
29 through an MSTP clock should refer to the CPG device node in their
52 - CPG/MSTP Clock Domain member device node:
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh4a/
Dclock-sh7343.c125 #define MSTP(_parent, _reg, _bit, _flags) \ macro
139 [MSTP031] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT),
140 [MSTP030] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT),
141 [MSTP029] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT),
142 [MSTP028] = MSTP(&div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
143 [MSTP026] = MSTP(&div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
144 [MSTP023] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 23, 0),
145 [MSTP022] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 22, 0),
146 [MSTP021] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 21, 0),
147 [MSTP020] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 20, 0),
[all …]
Dclock-sh7366.c128 #define MSTP(_parent, _reg, _bit, _flags) \ macro
142 [MSTP031] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT),
143 [MSTP030] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT),
144 [MSTP029] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT),
145 [MSTP028] = MSTP(&div4_clks[DIV4_SH], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
146 [MSTP026] = MSTP(&div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
147 [MSTP023] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 23, 0),
148 [MSTP022] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 22, 0),
149 [MSTP021] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 21, 0),
150 [MSTP020] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 20, 0),
[all …]
/kernel/linux/linux-4.19/arch/sh/kernel/cpu/sh4a/
Dclock-sh7343.c137 #define MSTP(_parent, _reg, _bit, _flags) \ macro
151 [MSTP031] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT),
152 [MSTP030] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT),
153 [MSTP029] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT),
154 [MSTP028] = MSTP(&div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
155 [MSTP026] = MSTP(&div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
156 [MSTP023] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 23, 0),
157 [MSTP022] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 22, 0),
158 [MSTP021] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 21, 0),
159 [MSTP020] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 20, 0),
[all …]
Dclock-sh7366.c140 #define MSTP(_parent, _reg, _bit, _flags) \ macro
154 [MSTP031] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT),
155 [MSTP030] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT),
156 [MSTP029] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT),
157 [MSTP028] = MSTP(&div4_clks[DIV4_SH], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
158 [MSTP026] = MSTP(&div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
159 [MSTP023] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 23, 0),
160 [MSTP022] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 22, 0),
161 [MSTP021] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 21, 0),
162 [MSTP020] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 20, 0),
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Drenesas,cpg-mstp-clocks.yaml4 $id: http://devicetree.org/schemas/clock/renesas,cpg-mstp-clocks.yaml#
7 title: Renesas Clock Pulse Generator (CPG) Module Stop (MSTP) Clocks
17 Clocks are referenced by user nodes by the Module Stop (MSTP) node phandle
24 - renesas,r7s72100-mstp-clocks # RZ/A1
25 - renesas,r8a73a4-mstp-clocks # R-Mobile APE6
26 - renesas,r8a7740-mstp-clocks # R-Mobile A1
27 - renesas,r8a7778-mstp-clocks # R-Car M1
28 - renesas,r8a7779-mstp-clocks # R-Car H1
29 - renesas,sh73a0-mstp-clocks # SH-Mobile AG5
30 - const: renesas,cpg-mstp-clocks
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dr7s72100.dtsi407 /* MSTP clocks */
410 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
419 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
432 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
441 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
450 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
459 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
468 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
479 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
491 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
Dr8a7740.dtsi575 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
586 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
604 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
632 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
654 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
Dsh73a0.dtsi825 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
836 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
859 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
883 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
911 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
924 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
Dr8a7778.dtsi526 compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks";
567 compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks";
582 compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks";
606 compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks";
Dr8a7779.dtsi524 compatible = "renesas,r8a7779-mstp-clocks",
525 "renesas,cpg-mstp-clocks";
561 compatible = "renesas,r8a7779-mstp-clocks",
562 "renesas,cpg-mstp-clocks";
590 compatible = "renesas,r8a7779-mstp-clocks",
591 "renesas,cpg-mstp-clocks";
/kernel/linux/linux-5.10/drivers/clk/renesas/
Dclk-mstp.c3 * R-Car MSTP clocks
24 * MSTP clocks. We can't use standard gate clocks as we need to poll on the
31 * struct mstp_clock_group - MSTP gating clocks group
50 * struct mstp_clock - MSTP gating clock
53 * @group: MSTP clocks group
166 pr_debug("MSTP %s setting CLK_IS_CRITICAL\n", name); in cpg_mstp_clock_register()
208 if (of_device_is_compatible(np, "renesas,r7s72100-mstp-clocks")) in cpg_mstp_clocks_init()
264 CLK_OF_DECLARE(cpg_mstp_clks, "renesas,cpg-mstp-clocks", cpg_mstp_clocks_init);
277 "renesas,cpg-mstp-clocks")) in cpg_mstp_attach_dev()
280 /* BSC on r8a73a4/sh73a0 uses zb_clk instead of an mstp clock */ in cpg_mstp_attach_dev()
/kernel/linux/linux-4.19/drivers/clk/renesas/
Dclk-mstp.c2 * R-Car MSTP clocks
27 * MSTP clocks. We can't use standard gate clocks as we need to poll on the
34 * struct mstp_clock_group - MSTP gating clocks group
51 * struct mstp_clock - MSTP gating clock
54 * @group: MSTP clocks group
167 pr_debug("MSTP %s setting CLK_IS_CRITICAL\n", name); in cpg_mstp_clock_register()
213 if (of_device_is_compatible(np, "renesas,r7s72100-mstp-clocks")) in cpg_mstp_clocks_init()
269 CLK_OF_DECLARE(cpg_mstp_clks, "renesas,cpg-mstp-clocks", cpg_mstp_clocks_init);
282 "renesas,cpg-mstp-clocks")) in cpg_mstp_attach_dev()
285 /* BSC on r8a73a4/sh73a0 uses zb_clk instead of an mstp clock */ in cpg_mstp_attach_dev()
DKconfig34 hierarchical representation of the various CPG and MSTP clocks.
166 bool "MSTP clock support" if COMPILE_TEST
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dr7s72100.dtsi407 /* MSTP clocks */
410 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
419 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
432 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
441 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
450 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
459 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
468 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
480 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
492 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
Dr8a7740.dtsi575 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
586 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
604 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
632 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
654 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
Dr8a7778.dtsi554 compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks";
599 compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks";
614 compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks";
638 compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks";
Dsh73a0.dtsi839 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
850 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
873 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
897 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
925 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
938 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
Dr8a7779.dtsi551 compatible = "renesas,r8a7779-mstp-clocks",
552 "renesas,cpg-mstp-clocks";
588 compatible = "renesas,r8a7779-mstp-clocks",
589 "renesas,cpg-mstp-clocks";
617 compatible = "renesas,r8a7779-mstp-clocks",
618 "renesas,cpg-mstp-clocks";
/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dr8a7779-clock.h21 /* MSTP 0 */
39 /* MSTP 1 */
51 /* MSTP 3 */
/kernel/linux/linux-4.19/include/dt-bindings/clock/
Dr8a7779-clock.h25 /* MSTP 0 */
43 /* MSTP 1 */
55 /* MSTP 3 */

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