| /kernel/linux/linux-5.10/drivers/nvmem/ |
| D | rockchip-otp.c | 3 * Rockchip OTP Driver 22 /* OTP Register Offsets */ 35 /* OTP Register bits and masks */ 67 "otp", "apb_pclk", "phy", 74 static int rockchip_otp_reset(struct rockchip_otp *otp) in rockchip_otp_reset() argument 78 ret = reset_control_assert(otp->rst); in rockchip_otp_reset() 80 dev_err(otp->dev, "failed to assert otp phy %d\n", ret); in rockchip_otp_reset() 86 ret = reset_control_deassert(otp->rst); in rockchip_otp_reset() 88 dev_err(otp->dev, "failed to deassert otp phy %d\n", ret); in rockchip_otp_reset() 95 static int rockchip_otp_wait_status(struct rockchip_otp *otp, u32 flag) in rockchip_otp_wait_status() argument [all …]
|
| D | mxs-ocotp.c | 3 * Freescale MXS On-Chip OTP driver 36 static int mxs_ocotp_wait(struct mxs_ocotp *otp) in mxs_ocotp_wait() argument 42 status = readl(otp->base); in mxs_ocotp_wait() 61 struct mxs_ocotp *otp = context; in mxs_ocotp_read() local 65 ret = clk_enable(otp->clk); in mxs_ocotp_read() 69 writel(BM_OCOTP_CTRL_ERROR, otp->base + STMP_OFFSET_REG_CLR); in mxs_ocotp_read() 71 ret = mxs_ocotp_wait(otp); in mxs_ocotp_read() 76 writel(BM_OCOTP_CTRL_RD_BANK_OPEN, otp->base + STMP_OFFSET_REG_SET); in mxs_ocotp_read() 81 ret = mxs_ocotp_wait(otp); in mxs_ocotp_read() 90 *buf++ = readl(otp->base + offset); in mxs_ocotp_read() [all …]
|
| D | lpc18xx_otp.c | 3 * NXP LPC18xx/43xx OTP memory NVMEM driver 10 * TODO: add support for writing OTP register via API in boot ROM. 22 * LPC18xx OTP memory contains 4 banks with 4 32-bit words. Bank 0 starts 44 struct lpc18xx_otp *otp = context; in lpc18xx_otp_read() local 54 *buf++ = readl(otp->base + i * LPC18XX_OTP_WORD_SIZE); in lpc18xx_otp_read() 60 .name = "lpc18xx-otp", 70 struct lpc18xx_otp *otp; in lpc18xx_otp_probe() local 73 otp = devm_kzalloc(&pdev->dev, sizeof(*otp), GFP_KERNEL); in lpc18xx_otp_probe() 74 if (!otp) in lpc18xx_otp_probe() 78 otp->base = devm_ioremap_resource(&pdev->dev, res); in lpc18xx_otp_probe() [all …]
|
| D | Kconfig | 36 tristate "i.MX 6/7/8 On-Chip OTP Controller support" 40 This is a driver for the On-Chip OTP Controller (OCOTP) available on 48 tristate "i.MX8 SCU On-Chip OTP Controller support" 52 This is a driver for the SCU On-Chip OTP Controller (OCOTP) 78 tristate "NXP LPC18XX OTP Memory Support" 82 Say Y here to include support for NXP LPC18xx OTP memory found on 88 tristate "Freescale MXS On-Chip OTP Memory Support" 141 tristate "Rockchip OTP controller support" 146 from otp, such as cpu-leakage. 152 tristate "Broadcom On-Chip OTP Controller support" [all …]
|
| D | imx-ocotp.c | 27 * OTP Bank0 Word0 30 * of two consecutive OTP words. 215 * ipg_clk. OTP writes will work at maximum bus frequencies as long in imx_ocotp_set_imx6_timing() 218 * Note: there are minimum timings required to ensure an OTP fuse burns in imx_ocotp_set_imx6_timing() 227 * - Minimum STROBE_READ i.e. the time to wait post OTP fuse burn before in imx_ocotp_set_imx6_timing() 237 * value will mess up a re-load of the shadow registers post OTP in imx_ocotp_set_imx6_timing() 290 /* allow only writing one complete OTP word at a time */ in imx_ocotp_write() 328 * In banked/i.MX7 mode the OTP register bank goes into waddr in imx_ocotp_write() 338 * OTP write/read address specifies one of 128 word address in imx_ocotp_write() 354 * protect programming same OTP bit twice, before program OCOTP will in imx_ocotp_write() [all …]
|
| /kernel/linux/linux-4.19/drivers/mfd/ |
| D | ab3100-otp.c | 6 * Driver to read out OTP from the AB3100 Mixed-signal circuit 19 /* The OTP registers */ 33 * @locked whether the OTP is locked, after locking, no more bits 36 * @freq clocking frequency for the OTP, this frequency is either 62 static int __init ab3100_otp_read(struct ab3100_otp *otp) in ab3100_otp_read() argument 68 err = abx500_get_register_interruptible(otp->dev, 0, in ab3100_otp_read() 71 dev_err(otp->dev, "unable to read OTPP register\n"); in ab3100_otp_read() 75 err = abx500_get_register_page_interruptible(otp->dev, 0, in ab3100_otp_read() 78 dev_err(otp->dev, "unable to read OTP register page\n"); in ab3100_otp_read() 82 /* Cache OTP properties, they never change by nature */ in ab3100_otp_read() [all …]
|
| /kernel/linux/linux-5.10/drivers/mfd/ |
| D | ab3100-otp.c | 6 * Driver to read out OTP from the AB3100 Mixed-signal circuit 19 /* The OTP registers */ 33 * @locked: whether the OTP is locked, after locking, no more bits 36 * @freq: clocking frequency for the OTP, this frequency is either 62 static int __init ab3100_otp_read(struct ab3100_otp *otp) in ab3100_otp_read() argument 68 err = abx500_get_register_interruptible(otp->dev, 0, in ab3100_otp_read() 71 dev_err(otp->dev, "unable to read OTPP register\n"); in ab3100_otp_read() 75 err = abx500_get_register_page_interruptible(otp->dev, 0, in ab3100_otp_read() 78 dev_err(otp->dev, "unable to read OTP register page\n"); in ab3100_otp_read() 82 /* Cache OTP properties, they never change by nature */ in ab3100_otp_read() [all …]
|
| /kernel/linux/linux-4.19/drivers/nvmem/ |
| D | mxs-ocotp.c | 2 * Freescale MXS On-Chip OTP driver 46 static int mxs_ocotp_wait(struct mxs_ocotp *otp) in mxs_ocotp_wait() argument 52 status = readl(otp->base); in mxs_ocotp_wait() 71 struct mxs_ocotp *otp = context; in mxs_ocotp_read() local 75 ret = clk_enable(otp->clk); in mxs_ocotp_read() 79 writel(BM_OCOTP_CTRL_ERROR, otp->base + STMP_OFFSET_REG_CLR); in mxs_ocotp_read() 81 ret = mxs_ocotp_wait(otp); in mxs_ocotp_read() 86 writel(BM_OCOTP_CTRL_RD_BANK_OPEN, otp->base + STMP_OFFSET_REG_SET); in mxs_ocotp_read() 91 ret = mxs_ocotp_wait(otp); in mxs_ocotp_read() 100 *buf++ = readl(otp->base + offset); in mxs_ocotp_read() [all …]
|
| D | lpc18xx_otp.c | 2 * NXP LPC18xx/43xx OTP memory NVMEM driver 13 * TODO: add support for writing OTP register via API in boot ROM. 25 * LPC18xx OTP memory contains 4 banks with 4 32-bit words. Bank 0 starts 47 struct lpc18xx_otp *otp = context; in lpc18xx_otp_read() local 57 *buf++ = readl(otp->base + i * LPC18XX_OTP_WORD_SIZE); in lpc18xx_otp_read() 63 .name = "lpc18xx-otp", 73 struct lpc18xx_otp *otp; in lpc18xx_otp_probe() local 76 otp = devm_kzalloc(&pdev->dev, sizeof(*otp), GFP_KERNEL); in lpc18xx_otp_probe() 77 if (!otp) in lpc18xx_otp_probe() 81 otp->base = devm_ioremap_resource(&pdev->dev, res); in lpc18xx_otp_probe() [all …]
|
| D | imx-ocotp.c | 33 * OTP Bank0 Word0 36 * of two consecutive OTP words. 185 * ipg_clk. OTP writes will work at maximum bus frequencies as long in imx_ocotp_set_imx6_timing() 188 * Note: there are minimum timings required to ensure an OTP fuse burns in imx_ocotp_set_imx6_timing() 197 * - Minimum STROBE_READ i.e. the time to wait post OTP fuse burn before in imx_ocotp_set_imx6_timing() 207 * value will mess up a re-load of the shadow registers post OTP in imx_ocotp_set_imx6_timing() 260 /* allow only writing one complete OTP word at a time */ in imx_ocotp_write() 298 * In banked/i.MX7 mode the OTP register bank goes into waddr in imx_ocotp_write() 308 * OTP write/read address specifies one of 128 word address in imx_ocotp_write() 324 * protect programming same OTP bit twice, before program OCOTP will in imx_ocotp_write() [all …]
|
| D | Kconfig | 28 tristate "i.MX6 On-Chip OTP Controller support" 32 This is a driver for the On-Chip OTP Controller (OCOTP) available on 50 tristate "NXP LPC18XX OTP Memory Support" 54 Say Y here to include support for NXP LPC18xx OTP memory found on 60 tristate "Freescale MXS On-Chip OTP Memory Support" 105 tristate "Broadcom On-Chip OTP Controller support" 110 Say y here to enable read/write access to the Broadcom OTP
|
| /kernel/linux/linux-4.19/drivers/net/wireless/intel/iwlwifi/ |
| D | iwl-eeprom-read.c | 148 IWL_ERR(trans, "OTP with bad signature: 0x%08x\n", gp); in iwl_eeprom_verify_signature() 155 "bad EEPROM/OTP signature, type=%s, EEPROM_GP=0x%08x\n", in iwl_eeprom_verify_signature() 156 nvm_is_otp ? "OTP" : "EEPROM", gp); in iwl_eeprom_verify_signature() 163 * OTP related functions 179 /* OTP only valid for CP/PP and after */ in iwl_nvm_is_otp() 212 IWL_ERR(trans, "Time out access OTP\n"); in iwl_init_otp_access() 222 * this is only applicable for HW with OTP shadow RAM in iwl_init_otp_access() 245 IWL_ERR(trans, "Time out reading OTP[%d]\n", addr); in iwl_read_otp_word() 253 /* set the uncorrectable OTP ECC bit for acknowledgment */ in iwl_read_otp_word() 256 IWL_ERR(trans, "Uncorrectable OTP ECC error, abort OTP read\n"); in iwl_read_otp_word() [all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/nvmem/ |
| D | rockchip-otp.txt | 1 Rockchip internal OTP (One Time Programmable) memory device tree bindings 5 - "rockchip,px30-otp" - for PX30 SoCs. 6 - "rockchip,rk3308-otp" - for RK3308 SoCs. 9 - clock-names: Should be "otp", "apb_pclk" and "phy". 17 otp: otp@ff290000 { 18 compatible = "rockchip,px30-otp"; 24 clock-names = "otp", "apb_pclk", "phy";
|
| D | lpc1850-otp.txt | 1 * NXP LPC18xx OTP memory 3 Internal OTP (One Time Programmable) memory for NXP LPC18xx/43xx devices. 6 - compatible: Should be "nxp,lpc1850-otp" 15 otp: otp@40045000 { 16 compatible = "nxp,lpc1850-otp";
|
| D | st,stm32-romem.yaml | 11 flash, OTP, read-only HW regs... This contains various information such as: 24 - st,stm32f4-otp 32 st,non-secure-otp: 50 compatible = "st,stm32f4-otp"; 61 st,non-secure-otp;
|
| D | brcm,ocotp.txt | 1 Broadcom OTP memory controller 8 - reg: Base address of the OTP controller. 13 otp: otp@301c800 {
|
| /kernel/linux/linux-5.10/drivers/net/wireless/intel/iwlwifi/ |
| D | iwl-eeprom-read.c | 143 IWL_ERR(trans, "OTP with bad signature: 0x%08x\n", gp); in iwl_eeprom_verify_signature() 150 "bad EEPROM/OTP signature, type=%s, EEPROM_GP=0x%08x\n", in iwl_eeprom_verify_signature() 151 nvm_is_otp ? "OTP" : "EEPROM", gp); in iwl_eeprom_verify_signature() 158 * OTP related functions 174 /* OTP only valid for CP/PP and after */ in iwl_nvm_is_otp() 208 * this is only applicable for HW with OTP shadow RAM in iwl_init_otp_access() 231 IWL_ERR(trans, "Time out reading OTP[%d]\n", addr); in iwl_read_otp_word() 239 /* set the uncorrectable OTP ECC bit for acknowledgment */ in iwl_read_otp_word() 242 IWL_ERR(trans, "Uncorrectable OTP ECC error, abort OTP read\n"); in iwl_read_otp_word() 247 /* set the correctable OTP ECC bit for acknowledgment */ in iwl_read_otp_word() [all …]
|
| /kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt76/mt7615/ |
| D | eeprom.c | 54 dev->mt76.otp.data = devm_kzalloc(dev->mt76.dev, len, GFP_KERNEL); in mt7615_efuse_init() 55 dev->mt76.otp.size = len; in mt7615_efuse_init() 56 if (!dev->mt76.otp.data) in mt7615_efuse_init() 59 buf = dev->mt76.otp.data; in mt7615_efuse_init() 273 u8 *otp = dev->mt76.otp.data; in mt7615_apply_cal_free_data() local 276 if (!otp) in mt7615_apply_cal_free_data() 280 if (!otp[ical[i]]) in mt7615_apply_cal_free_data() 284 eeprom[ical[i]] = otp[ical[i]]; in mt7615_apply_cal_free_data() 287 eeprom[ical_nocheck[i]] = otp[ical_nocheck[i]]; in mt7615_apply_cal_free_data() 296 u8 *otp = dev->mt76.otp.data; in mt7622_apply_cal_free_data() local [all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/nvmem/ |
| D | lpc1850-otp.txt | 1 * NXP LPC18xx OTP memory 3 Internal OTP (One Time Programmable) memory for NXP LPC18xx/43xx devices. 6 - compatible: Should be "nxp,lpc1850-otp" 15 otp: otp@40045000 { 16 compatible = "nxp,lpc1850-otp";
|
| D | brcm,ocotp.txt | 1 Broadcom OTP memory controller 8 - reg: Base address of the OTP controller. 13 otp: otp@301c800 {
|
| /kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt76/mt7603/ |
| D | eeprom.c | 51 dev->mt76.otp.data = devm_kzalloc(dev->mt76.dev, len, GFP_KERNEL); in mt7603_efuse_init() 52 dev->mt76.otp.size = len; in mt7603_efuse_init() 53 if (!dev->mt76.otp.data) in mt7603_efuse_init() 56 buf = dev->mt76.otp.data; in mt7603_efuse_init() 109 if (!np || !of_property_read_bool(np, "mediatek,eeprom-merge-otp")) in mt7603_apply_cal_free_data() 164 if (dev->mt76.otp.data) { in mt7603_eeprom_init() 166 mt7603_apply_cal_free_data(dev, dev->mt76.otp.data); in mt7603_eeprom_init() 168 memcpy(dev->mt76.eeprom.data, dev->mt76.otp.data, in mt7603_eeprom_init()
|
| /kernel/linux/linux-5.10/include/linux/mfd/wm831x/ |
| D | otp.h | 3 * include/linux/mfd/wm831x/otp.h -- OTP interface for WM831x 73 * R30728 (0x7808) - Factory OTP ID 84 * R30729 (0x7809) - Factory OTP 1 97 * R30730 (0x780A) - Factory OTP 2 104 * R30731 (0x780B) - Factory OTP 3 117 * R30732 (0x780C) - Factory OTP 4 128 * R30733 (0x780D) - Factory OTP 5 135 * R30736 (0x7810) - Customer OTP ID
|
| /kernel/linux/linux-4.19/include/linux/mfd/wm831x/ |
| D | otp.h | 2 * include/linux/mfd/wm831x/otp.h -- OTP interface for WM831x 78 * R30728 (0x7808) - Factory OTP ID 89 * R30729 (0x7809) - Factory OTP 1 102 * R30730 (0x780A) - Factory OTP 2 109 * R30731 (0x780B) - Factory OTP 3 122 * R30732 (0x780C) - Factory OTP 4 133 * R30733 (0x780D) - Factory OTP 5 140 * R30736 (0x7810) - Customer OTP ID
|
| /kernel/linux/linux-5.10/drivers/mtd/nand/onenand/ |
| D | Kconfig | 43 bool "OneNAND OTP Support" 47 Also, 1st Block of NAND Flash Array can be used as OTP. 49 The OTP block can be read, programmed and locked using the same 51 OTP block cannot be erased. 53 OTP block is fully-guaranteed to be a valid block.
|
| /kernel/linux/linux-4.19/drivers/mtd/nand/onenand/ |
| D | Kconfig | 43 bool "OneNAND OTP Support" 47 Also, 1st Block of NAND Flash Array can be used as OTP. 49 The OTP block can be read, programmed and locked using the same 51 OTP block cannot be erased. 53 OTP block is fully-guaranteed to be a valid block.
|