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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/
Dl2c2x0.txt3 ARM cores often have a separate L2C210/L2C220/L2C310 (also known as PL210/PL220/
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/
Dl2c2x0.yaml14 PL220/PL310 and variants) based level 2 cache controller. All these various