| /kernel/linux/linux-4.19/tools/perf/Documentation/ |
| D | perf-list.txt | 119 ARBITRARY PMUS
123 to PMUs. Using this typically requires looking up the specific event
126 The available PMUs and their raw parameters can be listed with
139 PER SOCKET PMUS
142 Some PMUs are not associated with a core, but with a whole CPU socket.
143 Events on these PMUs generally cannot be sampled, but only counted globally
153 bandwidth would require specifying all imc PMUs (see perf list output),
173 Other PMUs and global measurements are normally root only.
186 Some PMUs control advanced hardware tracing capabilities, such as Intel PT,
232 Events from multiple different PMUs cannot be mixed in a group, with
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| /kernel/linux/linux-5.10/tools/perf/Documentation/ |
| D | perf-list.txt | 128 ARBITRARY PMUS
132 to PMUs. Using this typically requires looking up the specific event
135 The available PMUs and their raw parameters can be listed with
148 PER SOCKET PMUS
151 Some PMUs are not associated with a core, but with a whole CPU socket.
152 Events on these PMUs generally cannot be sampled, but only counted globally
162 bandwidth would require specifying all imc PMUs (see perf list output),
182 Other PMUs and global measurements are normally root only.
195 Some PMUs control advanced hardware tracing capabilities, such as Intel PT,
253 Events from multiple different PMUs cannot be mixed in a group, with
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| /kernel/linux/linux-4.19/arch/x86/events/intel/ |
| D | uncore.c | 877 struct intel_uncore_pmu *pmu = type->pmus; in uncore_type_exit()
885 kfree(type->pmus); in uncore_type_exit()
886 type->pmus = NULL; in uncore_type_exit()
900 struct intel_uncore_pmu *pmus; in uncore_type_init() local
904 pmus = kcalloc(type->num_boxes, sizeof(*pmus), GFP_KERNEL); in uncore_type_init()
905 if (!pmus) in uncore_type_init()
911 pmus[i].func_id = setid ? i : -1; in uncore_type_init()
912 pmus[i].pmu_idx = i; in uncore_type_init()
913 pmus[i].type = type; in uncore_type_init()
914 pmus[i].boxes = kzalloc(size, GFP_KERNEL); in uncore_type_init()
[all …]
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| /kernel/linux/linux-4.19/Documentation/perf/ |
| D | qcom_l3_pmu.txt | 4 This driver supports the L3 cache PMUs found in Qualcomm Datacenter Technologies
11 options in sysfs, see /sys/devices/l3cache*. Given that these are uncore PMUs
24 Given that these are uncore PMUs the driver does not support sampling, therefore
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| D | xgene-pmu.txt | 4 X-Gene SoC PMU consists of various independent system device PMUs such as
7 same model as the PMU for ARM cores. The PMUs share the same top level
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| D | hisi-pmu.txt | 3 The HiSilicon SoC chip includes various independent system device PMUs
4 such as L3 cache (L3C), Hydra Home Agent (HHA) and DDRC. These PMUs are
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| D | arm_dsu_pmu.txt | 10 cores connected to the same DSU. Like most of the other uncore PMUs, DSU
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| /kernel/linux/linux-5.10/arch/x86/events/intel/ |
| D | uncore.c | 894 struct intel_uncore_pmu *pmu = type->pmus; in uncore_type_exit()
905 kfree(type->pmus); in uncore_type_exit()
906 type->pmus = NULL; in uncore_type_exit()
920 struct intel_uncore_pmu *pmus; in uncore_type_init() local
924 pmus = kcalloc(type->num_boxes, sizeof(*pmus), GFP_KERNEL); in uncore_type_init()
925 if (!pmus) in uncore_type_init()
931 pmus[i].func_id = setid ? i : -1; in uncore_type_init()
932 pmus[i].pmu_idx = i; in uncore_type_init()
933 pmus[i].type = type; in uncore_type_init()
934 pmus[i].boxes = kzalloc(size, GFP_KERNEL); in uncore_type_init()
[all …]
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| /kernel/linux/linux-5.10/Documentation/admin-guide/perf/ |
| D | qcom_l3_pmu.rst | 5 This driver supports the L3 cache PMUs found in Qualcomm Datacenter Technologies
12 options in sysfs, see /sys/devices/l3cache*. Given that these are uncore PMUs
25 Given that these are uncore PMUs the driver does not support sampling, therefore
|
| D | thunderx2-pmu.rst | 6 PMUs such as the Level 3 Cache (L3C), DDR4 Memory Controller (DMC) and
21 The thunderx2_pmu driver registers per-socket perf PMUs for the DMC and
23 (CCPI2) events simultaneously. The PMUs provide a description of their
|
| D | xgene-pmu.rst | 5 X-Gene SoC PMU consists of various independent system device PMUs such as
8 same model as the PMU for ARM cores. The PMUs share the same top level
|
| D | hisi-pmu.rst | 5 The HiSilicon SoC chip includes various independent system device PMUs
6 such as L3 cache (L3C), Hydra Home Agent (HHA) and DDRC. These PMUs are
|
| D | arm_dsu_pmu.rst | 11 cores connected to the same DSU. Like most of the other uncore PMUs, DSU
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| /kernel/linux/linux-4.19/arch/powerpc/include/asm/ |
| D | imc-pmu.h | 73 * registers new IMC pmus. This structure will hold the
121 * Domains for IMC PMUs
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| /kernel/linux/linux-4.19/arch/arm/oprofile/ |
| D | common.c | 28 * OProfile has a curious naming scheme for the ARM PMUs, but they are
30 * supported PMUs.
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| /kernel/linux/linux-5.10/arch/arm/oprofile/ |
| D | common.c | 28 * OProfile has a curious naming scheme for the ARM PMUs, but they are
30 * supported PMUs.
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| /kernel/linux/linux-4.19/tools/perf/util/ |
| D | pmu.c | 37 static LIST_HEAD(pmus);
548 /* Add all pmus in sysfs to pmu list: */
569 /* add to static LIST_HEAD(pmus): */ in pmu_read_sysfs()
591 * Uncore PMUs have a "cpumask" file under sysfs. CPU PMUs (e.g. on arm/arm64)
724 * PMUs other than CORE PMUs. in perf_pmu__find_map()
840 list_add_tail(&pmu->list, &pmus); in pmu_lookup()
851 list_for_each_entry(pmu, &pmus, list) in pmu_find()
866 pmu = list_prepare_entry(pmu, &pmus, list); in perf_pmu__scan()
868 list_for_each_entry_continue(pmu, &pmus, list) in perf_pmu__scan()
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| /kernel/linux/linux-5.10/tools/perf/util/ |
| D | pmu.c | 41 static LIST_HEAD(pmus);
554 /* Add all pmus in sysfs to pmu list: */
575 /* add to static LIST_HEAD(pmus): */ in pmu_read_sysfs()
597 * Uncore PMUs have a "cpumask" file under sysfs. CPU PMUs (e.g. on arm/arm64)
684 * PMUs other than CORE PMUs. in perf_pmu__find_map()
858 list_add_tail(&pmu->list, &pmus); in pmu_lookup()
869 list_for_each_entry(pmu, &pmus, list) in pmu_find()
880 list_for_each_entry(pmu, &pmus, list) in perf_pmu__find_by_type()
895 pmu = list_prepare_entry(pmu, &pmus, list); in perf_pmu__scan()
897 list_for_each_entry_continue(pmu, &pmus, list) in perf_pmu__scan()
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | imc-pmu.h | 110 * registers new IMC pmus. This structure will hold the
159 * Domains for IMC PMUs
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| /kernel/linux/linux-5.10/drivers/perf/ |
| D | qcom_l2_pmu.c | 107 * the hardware PMUs.
123 * This structure represents one of the hardware PMUs.
424 * physical PMUs (per cluster), because we do not support per-task mode in l2_cache_pmu_enable()
471 /* Don't allow groups with mixed PMUs, except for s/w events */ in l2_cache_event_init()
946 dev_err(&pdev->dev, "No hardware L2 cache PMUs found\n"); in l2_cache_pmu_probe()
963 dev_info(&pdev->dev, "Registered L2 cache PMU using %d HW PMUs\n", in l2_cache_pmu_probe()
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| /kernel/linux/linux-4.19/drivers/perf/ |
| D | qcom_l2_pmu.c | 157 * the hardware PMUs.
173 * This structure represents one of the hardware PMUs.
474 * physical PMUs (per cluster), because we do not support per-task mode in l2_cache_pmu_enable()
529 /* Don't allow groups with mixed PMUs, except for s/w events */ in l2_cache_event_init()
1007 dev_err(&pdev->dev, "No hardware L2 cache PMUs found\n"); in l2_cache_pmu_probe()
1024 dev_info(&pdev->dev, "Registered L2 cache PMU using %d HW PMUs\n", in l2_cache_pmu_probe()
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| D | arm_pmu_acpi.c | 92 * them with their PMUs. in arm_pmu_acpi_parse_irqs()
226 * Initialise and register the set of PMUs which we know about right in arm_pmu_acpi_probe()
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| /kernel/linux/linux-5.10/include/linux/regulator/ |
| D | act8865.h | 3 * act8865.h -- Voltage regulation for active-semi act88xx PMUs
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_pmu.c | 197 /* vega20 pmus */
235 pr_warn("Error initializing AMDGPU %s PMUs.\n", pmu_type_name); in init_pmu_by_type()
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| /kernel/linux/linux-4.19/arch/sh/oprofile/ |
| D | common.c | 28 * This will need to be reworked when multiple PMUs are supported.
|